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path: root/drivers/gpu/drm/i915/display/intel_dpll.c
AgeCommit message (Expand)AuthorFilesLines
2025-11-11drm/i915/de: Include units in intel_de_wait*() function namesVille Syrjälä1-2/+2
2025-11-01drm/i915/ltphy: Add function to calculate LT PHY port clockSuraj Kandpal1-0/+2
2025-11-01drm/i915/ltphy: Add LT Phy Programming recipe tablesSuraj Kandpal1-1/+28
2025-06-11drm/i915/display: drop i915_reg.h include where possibleJani Nikula1-1/+0
2025-06-09drm/i915: split out display register macros to a separate fileJani Nikula1-0/+1
2025-05-20drm/i915/dpll: Rename intel_compute_dpllSuraj Kandpal1-3/+3
2025-05-20drm/i915/dpll: Rename intel_<release/reserve>_dpllSuraj Kandpal1-2/+2
2025-05-20drm/i915/dpll: Rename crtc_get_shared_dpllSuraj Kandpal1-12/+12
2025-05-20drm/i915/dpll: Move away from using shared dpllSuraj Kandpal1-5/+5
2025-05-20drm/i915/dpll: Rename intel_shared_dpllSuraj Kandpal1-2/+2
2025-05-20drm/i915/dpll: Rename intel_dpll_funcsSuraj Kandpal1-11/+11
2025-05-13drm/i915: convert VLV IOSF SB interface to struct drm_deviceJani Nikula1-72/+63
2025-05-13drm/i915: move VLV IOSF SB unit specific helpers under displayJani Nikula1-1/+1
2025-05-13drm/i915: rename vlv_sideband*.[ch] to vlv_iosf_sb*.[ch]Jani Nikula1-1/+1
2025-04-22drm/i915/display: pass struct intel_display to PCH macrosJani Nikula1-8/+3
2025-03-28drm/i915/dpll: convert intel_dpll.[ch] to struct intel_displayJani Nikula1-163/+149
2025-03-25drm/i915/lvds: convert intel_lvds.[ch] to struct intel_displayJani Nikula1-6/+7
2025-02-13drm/i915/display: convert assert_transcoder*() to struct intel_displayJani Nikula1-14/+16
2025-02-12drm/i915/dpll: Use intel_display for asserting pllSuraj Kandpal1-6/+5
2024-12-16drm/i915/uncore: add to_intel_uncore() and use itJani Nikula1-0/+1
2024-10-29drm/i915/display: convert I915_STATE_WARN() to struct intel_displayJani Nikula1-4/+5
2024-10-23drm/i915/panel: Convert panel code to intel_displayVille Syrjälä1-9/+18
2024-10-02drm/i915: remove IS_LP()Jani Nikula1-2/+5
2024-09-16drm/i915/display: fix typo in the commentYan Zhen1-1/+1
2024-09-05drm/i915/display: pass display to intel_crtc_for_pipe()Jani Nikula1-1/+2
2024-09-03drm/i915/pps: convert intel_pps.[ch] to struct intel_displayJani Nikula1-3/+6
2024-06-07drm/i915: pass dev_priv explicitly to DPLL_MDJani Nikula1-7/+11
2024-06-07drm/i915: pass dev_priv explicitly to DPLLJani Nikula1-22/+23
2024-04-30drm/i915/dpio: Extract vlv_dpio_phy_regs.hVille Syrjälä1-0/+1
2024-04-30drm/i915/dpio: Clean up the vlv/chv PHY register bitsVille Syrjälä1-43/+42
2024-04-30drm/i915/dpio: s/pipe/ch/Ville Syrjälä1-24/+25
2024-04-30drm/i915/dpio: s/port/ch/Ville Syrjälä1-27/+27
2024-04-30drm/i915/dpio: Rename some variablesVille Syrjälä1-49/+48
2024-04-30drm/i915/dpio: Remove pointless variables from vlv/chv DPLL codeVille Syrjälä1-36/+28
2024-04-30drm/i915/dpio: Fix VLV DPIO PLL register dword numberingVille Syrjälä1-9/+9
2024-04-30drm/i915/dpio: s/VLV_PLL_DW9_BCAST/VLV_PCS_DW17_BCAST/Ville Syrjälä1-1/+1
2024-04-30drm/i915/dpio: s/VLV_REF_DW13/VLV_REF_DW11/Ville Syrjälä1-4/+4
2024-04-17drm/i915: Suck snps/cx0 PLL states into dpll_hw_stateVille Syrjälä1-1/+1
2024-04-17drm/i915: Carve up struct intel_dpll_hw_stateVille Syrjälä1-15/+16
2024-04-17drm/i915: Add local DPLL 'hw_state' variablesVille Syrjälä1-46/+56
2024-04-17drm/i915: s/pipe_config/crtc_state/ in legacy PLL codeVille Syrjälä1-15/+15
2024-04-17drm/i915: Drop pointless 'crtc' argument from *_crtc_clock_get()Ville Syrjälä1-12/+9
2024-04-17drm/i915: Modernize i9xx_pll_refclk()Ville Syrjälä1-8/+7
2024-04-17drm/i915: Inline {i9xx,ilk}_update_pll_dividers()Ville Syrjälä1-33/+13
2024-04-17drm/i915: Extract {i9xx,i8xx,ilk,vlv,chv}_dpll()Ville Syrjälä1-33/+68
2024-04-17drm/i915: Extract i965_dpll_md()Ville Syrjälä1-9/+9
2024-04-17drm/i915: Extract i9xx_dpll_get_hw_state()Ville Syrjälä1-0/+30
2024-04-17drm/i915: Extract ilk_dpll_compute_fp()Ville Syrjälä1-10/+12
2024-04-17drm/i915: Extract ilk_fb_cb_factor()Ville Syrjälä1-15/+17
2023-11-17drm/i915: convert vlv_dpio_read()/write() from pipe to phyJani Nikula1-51/+55
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