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path: root/drivers/gpu/drm/i915/display/intel_cdclk.c
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2025-11-11drm/i915/de: Use intel_de_wait_for_{set,clear}_us()Ville Syrjälä1-4/+4
2025-11-11drm/i915/de: Use intel_de_wait_us()Ville Syrjälä1-6/+4
2025-11-11drm/i915/de: Include units in intel_de_wait*() function namesVille Syrjälä1-10/+10
2025-11-11Merge drm/drm-next into drm-intel-nextJani Nikula1-0/+1
2025-11-07Merge tag 'drm-misc-next-2025-11-05-1' of https://gitlab.freedesktop.org/drm/...Dave Airlie1-0/+1
2025-11-06drm/i915/xe3p_lpd: Add CDCLK tableGustavo Sousa1-2/+42
2025-10-31drm/i915/display: switch to intel_display_utils.hJani Nikula1-1/+1
2025-10-31drm: include drm_print.h where neededJani Nikula1-0/+1
2025-10-29drm/i915: Add fallback for CDCLK selection when min_cdclk is too highNaladala Ramanaidu1-1/+1
2025-10-17drm/i915: Compute per-crtc min_cdclk earlierVille Syrjälä1-4/+4
2025-10-17drm/i915: s/min_cdck[]/plane_min_cdclk[]/Ville Syrjälä1-1/+1
2025-10-17drm/i915/fbc: Decouple FBC from intel_cdclk_atomic_check()Ville Syrjälä1-0/+1
2025-10-17drm/i915/bw: Relocate intel_bw_crtc_min_cdclk()Ville Syrjälä1-2/+1
2025-10-17drm/i915/bw: Untangle dbuf bw from the sagv/mem bw stuffVille Syrjälä1-18/+14
2025-10-16drm/i915/cdclk: Add intel_cdclk_min_cdclk_for_prefill()Ville Syrjälä1-0/+12
2025-10-16drm/i915/cdclk: Add prefill helpers for CDCLKVille Syrjälä1-2/+66
2025-10-11drm/i915/cdclk: Move intel_cdclk_atomic_check()Ville Syrjälä1-42/+40
2025-10-11drm/i915/cdclk: Hide intel_modeset_calc_cdclk()Ville Syrjälä1-7/+15
2025-10-11drm/i915/cdclk: Use enabled_pipes instead of active_pipes for the glk audio w/aVille Syrjälä1-3/+13
2025-10-11drm/i915/cdclk: Decouple cdclk from state->modesetVille Syrjälä1-0/+6
2025-10-11drm/i915/cdclk: Move intel_bw_crtc_min_cdclk() handling into intel_crtc_compu...Ville Syrjälä1-0/+1
2025-10-11drm/i915/cdclk: Rework crtc min_cdclk handlingVille Syrjälä1-22/+17
2025-10-11drm/i915/cdclk: Relocate intel_plane_calc_min_cdclk() callsVille Syrjälä1-11/+0
2025-10-11drm/i915/cdclk: Do intel_cdclk_update_crtc_min_cdclk() per-pipeVille Syrjälä1-9/+31
2025-10-11drm/i915/cdclk: Rework bw_min_cdclk handlingVille Syrjälä1-20/+18
2025-10-11drm/i915/cdclk: Extract intel_cdclk_update_crtc_min_cdclk()Ville Syrjälä1-0/+30
2025-10-11drm/i915/cdclk: Extract intel_cdclk_update_bw_min_cdclk()Ville Syrjälä1-0/+28
2025-10-11drm/i915/cdclk: Handle the force_min_cdclk state locking in intel_cdclk_atomi...Ville Syrjälä1-4/+8
2025-10-11drm/i915/cdclk: Introduce intel_cdclk_modeset_checks()Ville Syrjälä1-5/+43
2025-10-11drm/i915/cdclk: Extract dg2_power_well_count()Ville Syrjälä1-14/+19
2025-10-11drm/i915/cdclk: Extract glk_cdclk_audio_wa_needed()Ville Syrjälä1-2/+9
2025-09-17drm/i915: split out vlv_clock.[ch]Jani Nikula1-0/+1
2025-09-17drm/i915: cache the results in vlv_clock_get_hpll_vco() and use it moreJani Nikula1-7/+3
2025-09-17drm/i915: rename vlv_get_hpll_vco() to vlv_clock_get_hpll_vco()Jani Nikula1-1/+1
2025-09-17drm/i915: add vlv_clock_get_cdclk()Jani Nikula1-3/+1
2025-09-17drm/i915: add vlv_clock_get_hrawclk()Jani Nikula1-8/+1
2025-09-17drm/i915: add vlv_clock_get_czclk()Jani Nikula1-2/+1
2025-09-17drm/i915: do cck get/put inside vlv_get_cck_clock()Jani Nikula1-6/+2
2025-09-17drm/i915: do cck get/put inside vlv_get_hpll_vco()Jani Nikula1-1/+2
2025-09-04drm/i915/cdclk: use generic poll_timeout_us() instead of wait_for()Jani Nikula1-17/+20
2025-08-19drm/i915/dram: add intel_fsb_freq() and use itJani Nikula1-1/+1
2025-08-07drm/i915/display: use drm->debugfs_root for creating debugfs filesJani Nikula1-3/+1
2025-08-04drm/xe/compat: stop including i915_utils.h from compat i915_drv.hJani Nikula1-0/+1
2025-08-01drm/i915/cdclk: use intel_de_wait_custom() instead of wait_for_us()Jani Nikula1-4/+8
2025-06-26drm/i915/cdclk: make struct intel_cdclk_state opaqueJani Nikula1-0/+36
2025-06-26drm/i915/cdclk: abstract intel_cdclk_actual() and intel_cdclk_actual_voltage_...Jani Nikula1-0/+10
2025-06-26drm/i915/cdclk: abstract intel_cdclk_read_hw()Jani Nikula1-0/+12
2025-06-26drm/i915/cdclk: abstract intel_cdclk_force_min_cdclk()Jani Nikula1-0/+5
2025-06-26drm/i915/cdclk: abstract intel_cdclk_pmdemand_needs_update()Jani Nikula1-0/+15
2025-06-26drm/i915/cdclk: abstract intel_cdclk_bw_min_cdclk()Jani Nikula1-0/+5