diff options
| author | Biju Das <biju.das.jz@bp.renesas.com> | 2026-05-05 13:59:16 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2026-05-12 11:52:22 +0200 |
| commit | 8e46bc6370d08a21cc43bb747aef8ffae45df7d7 (patch) | |
| tree | 4758a240cc694c40ef59973258e617e677bf82a7 /rust | |
| parent | 89b67a16a59b66b0dfb26307c5858e9cddcbb242 (diff) | |
arm64: dts: renesas: r9a08g046: Add wdt device node
The RZ/G3L SOC has 3 watchdog timer channels:
- channel0 (wdt0) for Cortex-A55-CPU Non-Secure,
- channel1 (wdt1) for Cortex-A55 CPU Secure,
- channel2 (wdt2) for Cortex-M33 CPU.
Add wdt0 node to RZ/G3L ("R9A08G046") SoC DTSI.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260505125921.149682-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'rust')
0 files changed, 0 insertions, 0 deletions