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// SPDX-License-Identifier: GPL-2.0-only
/*
* Driver for ISSI IS31FL32xx family of I2C LED controllers
*
* Copyright 2015 Allworx Corp.
*
* Datasheets:
* http://www.issi.com/US/product-analog-fxled-driver.shtml
* http://www.si-en.com/product.asp?parentid=890
*/
#include <linux/device.h>
#include <linux/i2c.h>
#include <linux/kernel.h>
#include <linux/leds.h>
#include <linux/module.h>
#include <linux/of.h>
/* Used to indicate a device has no such register */
#define IS31FL32XX_REG_NONE 0xFF
/* Software Shutdown bit in Shutdown Register */
#define IS31FL32XX_SHUTDOWN_SSD_ENABLE 0
#define IS31FL32XX_SHUTDOWN_SSD_DISABLE BIT(0)
/* IS31FL3216 has a number of unique registers */
#define IS31FL3216_CONFIG_REG 0x00
#define IS31FL3216_LIGHTING_EFFECT_REG 0x03
#define IS31FL3216_CHANNEL_CONFIG_REG 0x04
/* Software Shutdown bit in 3216 Config Register */
#define IS31FL3216_CONFIG_SSD_ENABLE BIT(7)
#define IS31FL3216_CONFIG_SSD_DISABLE 0
#define IS31FL32XX_PWM_FREQUENCY_22KHZ 0x01
/* Registers for IS31FL3293 */
#define IS31FL3293_SHUTDOWN_REG 0x01
#define IS31FL3293_SHUTDOWN_SSD_DISABLE BIT(0)
#define IS31FL3293_SHUTDOWN_EN1 BIT(4)
#define IS31FL3293_SHUTDOWN_EN2 BIT(5)
#define IS31FL3293_SHUTDOWN_EN3 BIT(6)
#define IS31FL3293_GCC_REG 0x03
#define IS31FL3293_GCC_LEVEL_MAX 0x3f
#define IS31FL3293_CL_REG 0x10
#define IS31FL3293_COLOR_UPDATE_REG 0x27
#define IS31FL3293_COLOR_UPDATE_MAGIC 0xc5
#define IS31FL3293_RESET_REG 0x3c
#define IS31FL3293_RESET_MAGIC 0xc5
#define IS31FL3293_MAX_MICROAMP 20000
struct is31fl32xx_priv;
struct is31fl32xx_led_data {
struct led_classdev cdev;
u8 channel; /* 1-based, max priv->cdef->channels */
u32 max_microamp;
struct is31fl32xx_priv *priv;
};
struct is31fl32xx_priv {
const struct is31fl32xx_chipdef *cdef;
struct i2c_client *client;
unsigned int num_leds;
struct is31fl32xx_led_data leds[];
};
/**
* struct is31fl32xx_chipdef - chip-specific attributes
* @channels : Number of LED channels
* @shutdown_reg : address of Shutdown register (optional)
* @pwm_update_reg : address of PWM Update register
* @pwm_update_value : value to write to PWM Update register
* @global_control_reg : address of Global Control register (optional)
* @reset_reg : address of Reset register (optional)
* @output_frequency_setting_reg: address of output frequency register (optional)
* @pwm_register_base : address of first PWM register
* @pwm_registers_reversed: : true if PWM registers count down instead of up
* @led_control_register_base : address of first LED control register (optional)
* @enable_bits_per_led_control_register: number of LEDs enable bits in each
* @brightness_steps : number of brightness steps supported by the chip
* @reset_func : pointer to reset function
* @sw_shutdown_func : pointer to software shutdown function
*
* For all optional register addresses, the sentinel value %IS31FL32XX_REG_NONE
* indicates that this chip has no such register.
*
* If non-NULL, @reset_func will be called during probing to set all
* necessary registers to a known initialization state. This is needed
* for chips that do not have a @reset_reg.
*
* @enable_bits_per_led_control_register must be >=1 if
* @led_control_register_base != %IS31FL32XX_REG_NONE.
*/
struct is31fl32xx_chipdef {
u8 channels;
u8 shutdown_reg;
u8 pwm_update_reg;
u8 pwm_update_value;
u8 global_control_reg;
u8 reset_reg;
u8 output_frequency_setting_reg;
u8 pwm_register_base;
bool pwm_registers_reversed;
u8 led_control_register_base;
u8 enable_bits_per_led_control_register;
u16 brightness_steps;
int (*reset_func)(struct is31fl32xx_priv *priv);
int (*sw_shutdown_func)(struct is31fl32xx_priv *priv, bool enable);
};
static int is31fl32xx_write(struct is31fl32xx_priv *priv, u8 reg, u8 val)
{
int ret;
dev_dbg(&priv->client->dev, "writing register 0x%02X=0x%02X", reg, val);
ret = i2c_smbus_write_byte_data(priv->client, reg, val);
if (ret) {
dev_err(&priv->client->dev,
"register write to 0x%02X failed (error %d)",
reg, ret);
}
return ret;
}
/*
* Custom reset function for IS31FL3216 because it does not have a RESET
* register the way that the other IS31FL32xx chips do. We don't bother
* writing the GPIO and animation registers, because the registers we
* do write ensure those will have no effect.
*/
static int is31fl3216_reset(struct is31fl32xx_priv *priv)
{
unsigned int i;
int ret;
ret = is31fl32xx_write(priv, IS31FL3216_CONFIG_REG,
IS31FL3216_CONFIG_SSD_ENABLE);
if (ret)
return ret;
for (i = 0; i < priv->cdef->channels; i++) {
ret = is31fl32xx_write(priv, priv->cdef->pwm_register_base+i,
0x00);
if (ret)
return ret;
}
ret = is31fl32xx_write(priv, priv->cdef->pwm_update_reg, 0);
if (ret)
return ret;
ret = is31fl32xx_write(priv, IS31FL3216_LIGHTING_EFFECT_REG, 0x00);
if (ret)
return ret;
ret = is31fl32xx_write(priv, IS31FL3216_CHANNEL_CONFIG_REG, 0x00);
if (ret)
return ret;
return 0;
}
/*
* Custom Software-Shutdown function for IS31FL3216 because it does not have
* a SHUTDOWN register the way that the other IS31FL32xx chips do.
* We don't bother doing a read/modify/write on the CONFIG register because
* we only ever use a value of '0' for the other fields in that register.
*/
static int is31fl3216_software_shutdown(struct is31fl32xx_priv *priv,
bool enable)
{
u8 value = enable ? IS31FL3216_CONFIG_SSD_ENABLE :
IS31FL3216_CONFIG_SSD_DISABLE;
return is31fl32xx_write(priv, IS31FL3216_CONFIG_REG, value);
}
/*
* Custom Reset function for IS31FL3293. We need to set the global current limit
* and write to the color update register once.
*/
static int is31fl3293_reset(struct is31fl32xx_priv *priv)
{
int i, ret;
ret = is31fl32xx_write(priv, IS31FL3293_RESET_REG,
IS31FL3293_RESET_MAGIC);
if (ret)
return ret;
/* Set the global current limit to maximum */
ret = is31fl32xx_write(priv, IS31FL3293_GCC_REG,
IS31FL3293_GCC_LEVEL_MAX);
if (ret)
return ret;
for (i = 0; i < priv->num_leds; i++) {
struct is31fl32xx_led_data *led_data = &priv->leds[i];
int current_level_reg = IS31FL3293_CL_REG + led_data->channel - 1;
int microamp = max(led_data->max_microamp, IS31FL3293_MAX_MICROAMP);
int current_level = (microamp * 0xff) / IS31FL3293_MAX_MICROAMP;
ret = is31fl32xx_write(priv, current_level_reg, current_level);
if (ret)
return ret;
}
ret = is31fl32xx_write(priv, IS31FL3293_COLOR_UPDATE_REG,
IS31FL3293_COLOR_UPDATE_MAGIC);
if (ret)
return ret;
return 0;
}
/*
* Custom Software-Shutdown function for IS31FL3293 because the SHUTDOWN
* register of this device also has bits to enable the channels.
*/
static int is31fl3293_software_shutdown(struct is31fl32xx_priv *priv,
bool enable)
{
u8 value = 0;
if (!enable)
value = IS31FL3293_SHUTDOWN_SSD_DISABLE |
IS31FL3293_SHUTDOWN_EN1 |
IS31FL3293_SHUTDOWN_EN2 |
IS31FL3293_SHUTDOWN_EN3;
return is31fl32xx_write(priv, IS31FL3293_SHUTDOWN_REG, value);
}
/*
* NOTE: A mutex is not needed in this function because:
* - All referenced data is read-only after probe()
* - The I2C core has a mutex on to protect the bus
* - There are no read/modify/write operations
* - Intervening operations between the write of the PWM register
* and the Update register are harmless.
*
* Example:
* PWM_REG_1 write 16
* UPDATE_REG write 0
* PWM_REG_2 write 128
* UPDATE_REG write 0
* vs:
* PWM_REG_1 write 16
* PWM_REG_2 write 128
* UPDATE_REG write 0
* UPDATE_REG write 0
* are equivalent. Poking the Update register merely applies all PWM
* register writes up to that point.
*/
static int is31fl32xx_brightness_set(struct led_classdev *led_cdev,
enum led_brightness brightness)
{
const struct is31fl32xx_led_data *led_data =
container_of(led_cdev, struct is31fl32xx_led_data, cdev);
const struct is31fl32xx_chipdef *cdef = led_data->priv->cdef;
u8 pwm_register_offset;
int ret;
dev_dbg(led_cdev->dev, "%s: %d\n", __func__, brightness);
/* NOTE: led_data->channel is 1-based */
if (cdef->pwm_registers_reversed)
pwm_register_offset = cdef->channels - led_data->channel;
else
pwm_register_offset = led_data->channel - 1;
switch (cdef->brightness_steps) {
case 256:
ret = is31fl32xx_write(led_data->priv,
cdef->pwm_register_base + pwm_register
|