path: root/drivers/interconnect/qcom/sdx55.c

// SPDX-License-Identifier: GPL-2.0
/*
 * Qualcomm SDX55 interconnect driver
 * Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
 *
 * Copyright (c) 2021, Linaro Ltd.
 *
 */

#include <linux/device.h>
#include <linux/interconnect.h>
#include <linux/interconnect-provider.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <dt-bindings/interconnect/qcom,sdx55.h>

#include "bcm-voter.h"
#include "icc-rpmh.h"
#include "sdx55.h"

static struct qcom_icc_node llcc_mc = {
	.name = "llcc_mc",
	.id = SDX55_MASTER_LLCC,
	.channels = 4,
	.buswidth = 4,
	.num_links = 1,
	.links = { SDX55_SLAVE_EBI_CH0 },
};

static struct qcom_icc_node acm_tcu = {
	.name = "acm_tcu",
	.id = SDX55_MASTER_TCU_0,
	.channels = 1,
	.buswidth = 8,
	.num_links = 3,
	.links = { SDX55_SLAVE_LLCC,
		   SDX55_SLAVE_MEM_NOC_SNOC,
		   SDX55_SLAVE_MEM_NOC_PCIE_SNOC
	},
};

static struct qcom_icc_node qnm_snoc_gc = {
	.name = "qnm_snoc_gc",
	.id = SDX55_MASTER_SNOC_GC_MEM_NOC,
	.channels = 1,
	.buswidth = 8,
	.num_links = 1,
	.links = { SDX55_SLAVE_LLCC },
};

static struct qcom_icc_node xm_apps_rdwr = {
	.name = "xm_apps_rdwr",
	.id = SDX55_MASTER_AMPSS_M0,
	.channels = 1,
	.buswidth = 16,
	.num_links = 3,
	.links = { SDX55_SLAVE_LLCC,
		   SDX55_SLAVE_MEM_NOC_SNOC,
		   SDX55_SLAVE_MEM_NOC_PCIE_SNOC
	},
};

static struct qcom_icc_node qhm_audio = {
	.name = "qhm_audio",
	.id = SDX55_MASTER_AUDIO,
	.channels = 1,
	.buswidth = 4,
	.num_links = 1,
	.links = { SDX55_SLAVE_ANOC_SNOC },
};

static struct qcom_icc_node qhm_blsp1 = {
	.name = "qhm_blsp1",
	.id = SDX55_MASTER_BLSP_1,
	.channels = 1,
	.buswidth = 4,
	.num_links = 1,
	.links = { SDX55_SLAVE_ANOC_SNOC },
};

static struct qcom_icc_node qhm_qdss_bam = {
	.name = "qhm_qdss_bam",
	.id = SDX55_MASTER_QDSS_BAM,
	.channels = 1,
	.buswidth = 4,
	.num_links = 28,
	.links = { SDX55_SLAVE_SNOC_CFG,
		   SDX55_SLAVE_EMAC_CFG,
		   SDX55_SLAVE_USB3,
		   SDX55_SLAVE_TLMM,
		   SDX55_SLAVE_SPMI_FETCHER,
		   SDX55_SLAVE_QDSS_CFG,
		   SDX55_SLAVE_PDM,
		   SDX55_SLAVE_SNOC_MEM_NOC_GC,
		   SDX55_SLAVE_TCSR,
		   SDX55_SLAVE_CNOC_DDRSS,
		   SDX55_SLAVE_SPMI_VGI_COEX,
		   SDX55_SLAVE_QPIC,
		   SDX55_SLAVE_OCIMEM,
		   SDX55_SLAVE_IPA_CFG,
		   SDX55_SLAVE_USB3_PHY_CFG,
		   SDX55_SLAVE_AOP,
		   SDX55_SLAVE_BLSP_1,
		   SDX55_SLAVE_SDCC_1,
		   SDX55_SLAVE_CNOC_MSS,
		   SDX55_SLAVE_PCIE_PARF,
		   SDX55_SLAVE_ECC_CFG,
		   SDX55_SLAVE_AUDIO,
		   SDX55_SLAVE_AOSS,
		   SDX55_SLAVE_PRNG,
		   SDX55_SLAVE_CRYPTO_0_CFG,
		   SDX55_SLAVE_TCU,
		   SDX55_SLAVE_CLK_CTL,
		   SDX55_SLAVE_IMEM_CFG
	},
};

static struct qcom_icc_node qhm_qpic = {
	.name = "qhm_qpic",
	.id = SDX55_MASTER_QPIC,
	.channels = 1,
	.buswidth = 4,
	.num_links = 5,
	.links = { SDX55_SLAVE_AOSS,
		   SDX55_SLAVE_IPA_CFG,
		   SDX55_SLAVE_ANOC_SNOC,
		   SDX55_SLAVE_AOP,
		   SDX55_SLAVE_AUDIO
	},
};

static struct qcom_icc_node qhm_snoc_cfg = {
	.name = "qhm_snoc_cfg",
	.id = SDX55_MASTER_SNOC_CFG,
	.channels = 1,
	.buswidth = 4,
	.num_links = 1,
	.links = { SDX55_SLAVE_SERVICE_SNOC },
};

static struct qcom_icc_node qhm_spmi_fetcher1 = {
	.name = "qhm_spmi_fetcher1",
	.id = SDX55_MASTER_SPMI_FETCHER,
	.channels = 1,
	.buswidth = 4,
	.num_links = 3,
	.links = { SDX55_SLAVE_AOSS,
		   SDX55_SLAVE_ANOC_SNOC,
		   SDX55_SLAVE_AOP
	},
};

static struct qcom_icc_node qnm_aggre_noc = {
	.name = "qnm_aggre_noc",
	.id = SDX55_MASTER_ANOC_SNOC,
	.channels = 1,
	.buswidth = 8,
	.num_links = 30,
	.links = { SDX55_SLAVE_PCIE_0,
		   SDX55_SLAVE_SNOC_CFG,
		   SDX55_SLAVE_SDCC_1,
		   SDX55_SLAVE_TLMM,
		   SDX55_SLAVE_SPMI_FETCHER,
		   SDX55_SLAVE_QDSS_CFG,
		   SDX55_SLAVE_PDM,
		   SDX55_SLAVE_SNOC_MEM_NOC_GC,
		   SDX55_SLAVE_TCSR,
		   SDX55_SLAVE_CNOC_DDRSS,
		   SDX55_SLAVE_SPMI_VGI_COEX,
		   SDX55_SLAVE_QDSS_STM,
		   SDX55_SLAVE_QPIC,
		   SDX55_SLAVE_OCIMEM,
		   SDX55_SLAVE_IPA_CFG,
		   SDX55_SLAVE_USB3_PHY_CFG,