path: root/drivers/infiniband/hw/mana/mana_ib.h

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Copyright (c) 2022 Microsoft Corporation. All rights reserved.
 */

#ifndef _MANA_IB_H_
#define _MANA_IB_H_

#include <rdma/ib_verbs.h>
#include <rdma/ib_mad.h>
#include <rdma/iter.h>
#include <rdma/mana-abi.h>
#include <rdma/uverbs_ioctl.h>
#include <linux/dmapool.h>

#include <net/mana/mana.h>
#include "shadow_queue.h"
#include "counters.h"

#define PAGE_SZ_BM                                                             \
	(SZ_4K | SZ_8K | SZ_16K | SZ_32K | SZ_64K | SZ_128K | SZ_256K |        \
	 SZ_512K | SZ_1M | SZ_2M)

/* MANA doesn't have any limit for MR size */
#define MANA_IB_MAX_MR_SIZE	U64_MAX

/* Send queue ID mask */
#define MANA_SENDQ_MASK	BIT(31)

/*
 * The hardware limit of number of MRs is greater than maximum number of MRs
 * that can possibly represent in 24 bits
 */
#define MANA_IB_MAX_MR		0xFFFFFFu

/*
 * The CA timeout is approx. 260ms (4us * 2^(DELAY))
 */
#define MANA_CA_ACK_DELAY	16

/*
 * The buffer used for writing AV
 */
#define MANA_AV_BUFFER_SIZE	64

#define MANA_GSI_QPN		(1)

struct mana_ib_adapter_caps {
	u32 max_sq_id;
	u32 max_rq_id;
	u32 max_cq_id;
	u32 max_qp_count;
	u32 max_cq_count;
	u32 max_mr_count;
	u32 max_pd_count;
	u32 max_inbound_read_limit;
	u32 max_outbound_read_limit;
	u32 mw_count;
	u32 max_srq_count;
	u32 max_qp_wr;
	u32 max_send_sge_count;
	u32 max_recv_sge_count;
	u32 max_inline_data_size;
	u64 feature_flags;
	u64 page_size_cap;
};

struct mana_ib_queue {
	struct ib_umem *umem;
	struct gdma_queue *kmem;
	u64 gdma_region;
	u64 id;
};

struct mana_ib_dev {
	struct ib_device ib_dev;
	struct gdma_dev *gdma_dev;
	mana_handle_t adapter_handle;
	struct gdma_queue *fatal_err_eq;
	struct gdma_queue **eqs;
	struct xarray qp_table_wq;
	struct mana_ib_adapter_caps adapter_caps;
	struct dma_pool *av_pool;
	netdevice_tracker dev_tracker;
	struct notifier_block nb;
};

struct mana_ib_wq {
	struct ib_wq ibwq;
	struct mana_ib_queue queue;
	int wqe;
	u32 wq_buf_size;
	mana_handle_t rx_object;
};

struct mana_ib_pd {
	struct ib_pd ibpd;
	u32 pdn;
	mana_handle_t pd_handle;

	/* Mutex for sharing access to vport_use_count */
	struct mutex vport_mutex;
	int vport_use_count;

	bool tx_shortform_allowed;
	u32 tx_vp_offset;
};

struct mana_ib_av {
	u8 dest_ip[16];
	u8 dest_mac[ETH_ALEN];
	u16 udp_src_port;
	u8 src_ip[16];
	u32 hop_limit	: 8;
	u32 reserved1	: 12;
	u32 dscp	: 6;
	u32 reserved2	: 5;
	u32 is_ipv6	: 1;
	u32 reserved3	: 32;
};

struct mana_ib_ah {
	struct ib_ah ibah;
	struct mana_ib_av *av;
	dma_addr_t dma_handle;
};

struct mana_ib_mw {
	struct ib_mw ibmw;
	mana_handle_t mw_handle;
};

struct mana_ib_mr {
	struct ib_mr ibmr;
	struct ib_umem *umem;
	mana_handle_t mr_handle;
};

struct mana_ib_dm {
	struct ib_dm ibdm;
	mana_handle_t dm_handle;
};

struct mana_ib_cq {
	struct ib_cq ibcq;
	struct mana_ib_queue queue;
	/* protects CQ polling */
	spinlock_t cq_lock;
	struct list_head list_send_qp;
	struct list_head list_recv_qp;
	int cqe;
	u32 comp_vector;
	mana_handle_t  cq_handle;
};

enum mana_rc_queue_type {
	MANA_RC_SEND_QUEUE_REQUESTER = 0,
	MANA_RC_SEND_QUEUE_RESPONDER,
	MANA_RC_SEND_QUEUE_FMR,
	MANA_RC_RECV_QUEUE_REQUESTER,
	MANA_RC_RECV_QUEUE_RESPONDER,
	MANA_RC_QUEUE_TYPE_MAX,
};

struct mana_ib_rc_qp {
	struct mana_ib_queue queues[MANA_RC_QUEUE_TYPE_MAX];
};

enum mana_ud_queue_type {
	MANA_UD_SEND_QUEUE = 0,
	MANA_UD_RECV_QUEUE,
	MANA_UD_QUEUE_TYPE_MAX,
};

struct mana_ib_ud_qp {
	struct mana_ib_queue queues[MANA_UD_QUEUE_TYPE_MAX];
	u32 sq_psn;
};

struct mana_ib_qp {
	struct ib_qp ibqp;

	mana_handle_t qp_handle;
	union {
		struct mana_ib_queue raw_sq;
		struct mana_ib_rc_qp rc_qp;
		struct mana_ib_ud_qp ud_qp;
	};

	/* The port on the IB device, starting with 1 */
	u32 port;

	struct list_head cq_send_list;
	struct list_head cq_recv_list;
	struct shadow_queue shadow_rq;
	struct shadow_queue shadow_sq;

	refcount_t		refcount;
	struct completion	free;
};

struct mana_ib_ucontext {
	struct ib_ucontext ibucontext;
	u32 doorbell;
};

struct mana_ib_rwq_ind_table {
	struct ib_rwq_ind_table ib_ind_table;
};

enum mana_ib_command_code {
	MANA_IB_GET_ADAPTER_CAP = 0x30001,
	MANA_IB_CREATE_ADAPTER  = 0x30002,
	MANA_IB_DESTROY_ADAPTER = 0x30003,
	MANA_IB_CONFIG_IP_ADDR	= 0x30004,
	MANA_IB_CONFIG_MAC_ADDR	= 0x30005,
	MANA_IB_CREATE_UD_QP	= 0x30006,
	MANA_IB_DESTROY_UD_QP	= 0x30007,
	MANA_IB_CREATE_CQ       = 0x30008,
	MANA_IB_DESTROY_CQ      = 0x30009,
	MANA_IB_CREATE_RC_QP    = 0x3000a,
	MANA_IB_DESTROY_RC_QP   = 0x3000b,
	MANA_IB_SET_QP_STATE	= 0x3000d,
	MANA_IB_QUERY_VF_COUNTERS = 0x30022,
	MANA_IB_QUERY_DEVICE_COUNTERS = 0x30023,
};

struct mana_ib_query_adapter_caps_req {
	struct gdma_req_hdr hdr;
}; /*HW Data */

enum mana_ib_adapter_features {
	MANA_IB_FEATURE_CLIENT_ERROR_CQE_SUPPORT = BIT(4),
	MANA_IB_FEATURE_DEV_COUNTERS_SUPPORT = BIT(5),
	MANA_IB_FEATURE_MULTI_PORTS_SUPPORT = BIT(6),
};

struct mana_ib_query_adapter_caps_resp {
	struct gdma_resp_hdr hdr;
	u32 max_sq_id;
	u32 max_rq_id;
	u32 max_cq_id;
	u32 max_qp_count;
	u32 max_cq_count;
	u32 max_mr_count;
	u32 max_pd_count;
	u32 max_inbound_read_limit;
	u32 max_outbound_read_limit;
	u32 mw_count;
	u32 max_srq_count;
	u32 max_requester_sq_size;
	u32 max_responder_sq_size;
	u32 max_requester_rq_size;
	u32 max_responder_rq_size;
	u32 max_send_sge_count;
	u32 max_recv_sge_count;
	u32 max_inline_data_size;
	u64 feature_flags;
}; /* HW Data */

enum mana_ib_adapter_features_request {
	MANA_IB_FEATURE_CLIENT_ERROR_CQE_REQUEST = BIT(1),
}; /*HW Data */

struct mana_rnic_create_adapter_req {
	struct gdma_req_hdr hdr;
	u32 notify_eq_id;
	u32 reserved;
	u64 feature_flags