// SPDX-License-Identifier: GPL-2.0
/*
* ZynqMP Display Controller Driver
*
* Copyright (C) 2017 - 2020 Xilinx, Inc.
*
* Authors:
* - Hyun Woo Kwon <hyun.kwon@xilinx.com>
* - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
*/
#include <drm/drm_fb_dma_helper.h>
#include <drm/drm_fourcc.h>
#include <drm/drm_framebuffer.h>
#include <drm/drm_plane.h>
#include <linux/clk.h>
#include <linux/dma/xilinx_dpdma.h>
#include <linux/dma-mapping.h>
#include <linux/dmaengine.h>
#include <linux/media-bus-format.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include "zynqmp_disp.h"
#include "zynqmp_disp_regs.h"
#include "zynqmp_dp.h"
#include "zynqmp_dpsub.h"
/*
* Overview
* --------
*
* The display controller part of ZynqMP DP subsystem, made of the Audio/Video
* Buffer Manager, the Video Rendering Pipeline (blender) and the Audio Mixer.
*
* +------------------------------------------------------------+
* +--------+ | +----------------+ +-----------+ |
* | DPDMA | --->| | --> | Video | Video +-------------+ |
* | 4x vid | | | | | Rendering | -+--> | | | +------+
* | 2x aud | | | Audio/Video | --> | Pipeline | | | DisplayPort |---> | PHY0 |
* +--------+ | | Buffer Manager | +-----------+ | | Source | | +------+
* | | and STC | +-----------+ | | Controller | | +------+
* Live Video --->| | --> | Audio | Audio | |---> | PHY1 |
* | | | | Mixer | --+-> | | | +------+
* Live Audio --->| | --> | | || +-------------+ |
* | +----------------+ +-----------+ || |
* +---------------------------------------||-------------------+
* vv
* Blended Video and
* Mixed Audio to PL
*
* Only non-live input from the DPDMA and output to the DisplayPort Source
* Controller are currently supported. Interface with the programmable logic
* for live streams is not implemented.
*
* The display controller code creates planes for the DPDMA video and graphics
* layers, and a CRTC for the Video Rendering Pipeline.
*/
#define ZYNQMP_DISP_AV_BUF_NUM_VID_GFX_BUFFERS 4
#define ZYNQMP_DISP_AV_BUF_NUM_BUFFERS 6
#define ZYNQMP_DISP_MAX_NUM_SUB_PLANES 3
/**
* enum zynqmp_dpsub_layer_mode - Layer mode
* @ZYNQMP_DPSUB_LAYER_NONLIVE: non-live (memory) mode
* @ZYNQMP_DPSUB_LAYER_LIVE: live (stream) mode
*/
enum zynqmp_dpsub_layer_mode {
ZYNQMP_DPSUB_LAYER_NONLIVE,
ZYNQMP_DPSUB_LAYER_LIVE,
};
/**
* struct zynqmp_disp_format - Display subsystem format information
* @drm_fmt: DRM format (4CC)
* @bus_fmt: Media bus format
* @buf_fmt: AV buffer format
* @swap: Flag to swap R & B for RGB formats, and U & V for YUV formats
* @sf: Scaling factors for color components
*/
struct zynqmp_disp_format {
u32 drm_fmt;
u32 bus_fmt;
u32 buf_fmt;
bool swap;
const u32 *sf;
};
/**
* struct zynqmp_disp_layer_dma - DMA channel for one data plane of a layer
* @chan: DMA channel
* @xt: Interleaved DMA descriptor template
* @sgl: 