path: root/drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h

/*
 * Copyright 2017 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 */
/*
 * stream_encoder.h
 *
 */

#ifndef STREAM_ENCODER_H_
#define STREAM_ENCODER_H_

#include "audio_types.h"
#include "hw_shared.h"

struct dc_bios;
struct dc_context;
struct dc_crtc_timing;

enum dp_pixel_encoding_type {
	DP_PIXEL_ENCODING_TYPE_RGB444		= 0x00000000,
	DP_PIXEL_ENCODING_TYPE_YCBCR422		= 0x00000001,
	DP_PIXEL_ENCODING_TYPE_YCBCR444		= 0x00000002,
	DP_PIXEL_ENCODING_TYPE_RGB_WIDE_GAMUT	= 0x00000003,
	DP_PIXEL_ENCODING_TYPE_Y_ONLY		= 0x00000004,
	DP_PIXEL_ENCODING_TYPE_YCBCR420		= 0x00000005
};

enum dp_component_depth {
	DP_COMPONENT_PIXEL_DEPTH_6BPC		= 0x00000000,
	DP_COMPONENT_PIXEL_DEPTH_8BPC		= 0x00000001,
	DP_COMPONENT_PIXEL_DEPTH_10BPC		= 0x00000002,
	DP_COMPONENT_PIXEL_DEPTH_12BPC		= 0x00000003,
	DP_COMPONENT_PIXEL_DEPTH_16BPC		= 0x00000004
};

struct audio_clock_info {
	/* pixel clock frequency*/
	uint32_t pixel_clock_in_10khz;
	/* N - 32KHz audio */
	uint32_t n_32khz;
	/* CTS - 32KHz audio*/
	uint32_t cts_32khz;
	uint32_t n_44khz;
	uint32_t cts_44khz;
	uint32_t n_48khz;
	uint32_t cts_48khz;
};

enum dynamic_metadata_mode {
	dmdata_dp,
	dmdata_hdmi,
	dmdata_dolby_vision
};

struct frl_audio_clock_info {
	uint32_t frl_character_clock_kHz;
	uint32_t n_32khz;
	uint32_t cts_32khz;
	uint32_t n_44khz;
	uint32_t cts_44khz;
	uint32_t n_48khz;
	uint32_t cts_48khz;
};

struct enc_sdp_line_num {
	/* Adaptive Sync SDP */
	bool adaptive_sync_line_num_valid;
	uint32_t adaptive_sync_line_num;
};

struct encoder_info_frame {
	/* auxiliary video information */
	struct dc_info_packet avi;
	struct dc_info_packet gamut;
	struct dc_info_packet vendor;
	struct dc_info_packet hfvsif;
	struct dc_info_packet vtem;
	/* source product description */
	struct dc_info_packet spd;
	/* video stream configuration */
	struct dc_info_packet vsc;
	/* HDR Static MetaData */
	struct dc_info_packet hdrsmd;
	/* Adaptive Sync SDP*/
	struct dc_info_packet adaptive_sync;
	struct enc_sdp_line_num sdp_line_num;
	bool firmware_controlled_hdr_info_packet;
};

struct encoder_unblank_param {
	struct dc_link_settings link_settings;
	struct dc_crtc_timing timing;
	int opp_cnt;
	uint32_t pix_per_cycle;
};

struct encoder_set_dp_phy_pattern_param {
	enum dp_test_pattern dp_phy_pattern;
	const uint8_t *custom_pattern;
	uint32_t custom_pattern_size;
	enum dp_panel_mode dp_panel_mode;
};

struct stream_encoder {
	const struct stream_encoder_funcs *funcs;
	struct dc_context *ctx;
	struct dc_bios *bp;
	enum engine_id id;
	uint32_t stream_enc_inst;
	struct vpg *vpg;
	struct afmt *afmt;
	struct apg *apg;
};

struct enc_state {
	uint32_t dsc_mode;  // DISABLED  0; 1 or 2 indicate enabled state.
	uint32_t dsc_slice_width;
	uint32_t sec_gsp_pps_line_num;
	uint32_t vbid6_line_reference;
	uint32_t vbid6_line_num;
	uint32_t sec_gsp_pps_enable;
	uint32_t sec_stream_enable;
};

struct stream_encoder_funcs {
	void (*dp_set_stream_attribute)(
		struct stream_encoder *enc,
		struct dc_crtc_timing *crtc_timing,
		enum dc_color_space output_color_space,
		bool use_vsc_sdp_for_colorimetry,
		uint32_t enable_sdp_splitting);

	void (*hdmi_set_stream_attribute)(
		struct stream_encoder *enc,
		struct dc_crtc_timing *crtc_timing,
		int actual_pix_clk_khz,
		bool enable_audio);

	void (*dvi_set_stream_attribute)(
		struct stream_encoder *enc,
		struct dc_crtc_timing *crtc_timing,
		bool is_dual_link);

	void (*lvds_set_stream_attribute)(
		struct stream_encoder *enc,
		struct dc_crtc_timing *crtc_timing);

	void (*set_throttled_vcp_size)(
		struct stream_encoder *enc,
		struct fixed31_32 avg_time_slots_per_mtp);

	void (*update_hdmi_info_packets)(
		struct stream_encoder *enc,
		const struct encoder_info_frame *info_frame);

	void (*stop_hdmi_info_packets)(
		struct stream_encoder *enc);

	void (*update_dp_info_packets_sdp_line_num)(
		struct stream_encoder *enc,
		struct encoder_info_frame *info_frame);

	void (*update_dp_info_packets)(
		struct stream_encoder *enc,
		const struct encoder_info_frame *info_frame);

	void (*send_immediate_sdp_message)(
				struct stream_encoder *enc,
				const uint8_t *custom_sdp_message,
				unsigned int sdp_message_size);

	void (*stop_dp_info_packets)(
		struct stream_encoder *enc);

	void (*dp_blank)(
		struct dc_link *link,
		struct stream_encoder *enc);

	void (*dp_unblank)(
		struct dc_link *link,
		struct stream_encoder *enc,
		const struct encoder_unblank_param *param);

	void (*audio_mute_control)(
		struct stream_encoder *enc, bool mute);

	void (*dp_audio_setup)(
		struct stream_encoder *enc,
		unsigned int az_inst,
		struct audio_info *info);

	void (*dp_audio_enable) (
			struct stream_encoder *enc);

	void (*dp_audio_disable) (
			struct stream_encoder *enc);

	void (*hdmi_audio_setup)(
		struct stream_encoder *enc,
		unsigned int az_inst,
		struct audio_info *info,
		struct audio_crtc_info *audio_crtc_info);

	void (*hdmi_audio_disable) (
			struct stream_encoder *enc);

	void (*setup_stereo_sync) (
			struct stream_encoder *enc,
			int tg_inst,
			bool enable);

	void (*set_avmute)(
		struct stream_encoder *enc, bool enable);

	void (*dig_connect_to_otg)(
		struct stream_encoder *enc,
		int tg_inst);

	void (*enable_stream)(
		struct stream_encoder *enc,
		enum signal_type signal,
		bool enable);

	void (*hdmi_reset_stream_attribute)(
		struct stream_encoder *enc);

	unsigned int (*dig_source_otg)(
		struct stream_encoder *enc);

	bool (*dp_get_pixel_format)(
		struct stream_encoder *enc,
		enum dc_pixel_encoding *encoding,
		enum dc_color_depth *depth);

	void (*enc_read_state)(struct stream_encoder *enc, struct enc_state *s);

	void (*dp_set_dsc_config)(
			struct stream_encoder *enc,
			enum optc_dsc_mode dsc_mode,
			uint32_t dsc_bytes_per_pixel,
			uint32_t dsc_slice_width);

	void (*dp_set_dsc_pps_info_packet)(struct stream_encoder *enc,
				bool enable,
				uint8_t *dsc_packed_pps,
				bool immediate_update);

	void (*set_dynamic_metadata)(struct stream_encoder *enc,
			bool enable,
			uint32_t hubp_requestor_id,
			enum dynamic_metadata_mode dmdata_mode);

	/**
	 * @dp_set_odm_combine: Sets up DP stream encoder for ODM.
	 */
	void (*dp_set_odm_combine)(
		struct stream_encoder *enc,
		bool odm_combine);

	uint32_t (*get_fifo_cal_average_level)(
		struct stream_encoder *enc);

	void (*set_input_mode)(
		struct stream_encoder *enc, unsigned int pix_per_container);
	void (*enable_fifo)(struct stream_encoder *enc);
	void (*disable_fifo)(struct stream_encoder *enc);
	bool (*is_fifo_enabled)(struct stream_encoder *enc);
	void (*map_stream_to_link)(struct stream_encoder *enc, uint32_t stream_enc_inst, uint32_t link_enc_inst);
	uint32_t (*get_pixels_per_cycle)(struct stream_encoder *enc);
};

/**
 * @hpo_frl_stream_encoder_state - Stream encoder parameters
 */
struct hpo_frl_stream_encoder_state {
	uint32_t stream_enc_enabled;
	uint32_t otg_inst;
	uint32_t color_depth;
	uint32_t num_odm_segments;
	uint32_t h_active;
	uint32_t h_blank;
	uint32_t borrow_mode;
	enum dc_pixel_encoding pixel_format;
};

/**
 * @hpo_frl_stream_encoder - Encoder stream instance
 *
 * This struct keeps the reference to the struct with the FRL stream encoder
 * callbacks. Additionally, it has other references that simplify the stream
 * configuration.
 */
struct hpo_frl_stream_encoder {
	/**
	 * @funcs: callback functions for using FRL stream encoder.
	 */
	const struct hpo_frl_stream_encoder_funcs *funcs;

	/**
	 * @stream_enc_inst: Instance ID reference.
	 */
	uint32_t stream_enc_inst;

	/**
	 * @ctx: DC context.
	 */
	struct dc_context *ctx;

	/**
	 * @bp: Bios parser reference.
	 */
	struct dc_bios *bp;

	/**
	 * @id: ID to the Engine object type.
	 */
	enum engine_id id;

	/**
	 * @afmt:
	 *
	 * Audio Formatter (AFMT) reference used for select the correct audio
	 * reference.
	 */
	struct afmt *afmt;

	/**
	 * @vpg:
	 *
	 * The VBI Packet Generator (VPG) reference which is used for
	 * generating the HDMI data island packet headers for ISRC1 and generic
	 * packages.
	 */
	struct vpg *vpg;

	/**
	 * @afmt:
	 *
	 * Audio Pattern Generator (APG) reference used for select the correct audio
	 * reference.
	 */
	struct apg *apg;
};

/**
 * @hpo_frl_stream_encoder_funcs - FRL stream encoder functions callbacks
 *
 * DC must set up the FRL encoder and the stream encoder; however, each ASIC
 * may have some quirks in setting FRL. Thus, this struct, adds all the encoder
 * stream interfaces for setup the FRL stream encoder.
 */
struct hpo_frl_stream_encoder_funcs {
	void (*hdmi_frl_set_dsc_config)(
		struct hpo_frl_stream_encoder *enc,
		struct dc_crtc_timing *timing,
		uint8_t *dsc_packed_pps);
	/**
	 * @hdmi_frl_enable:
	 *
	 * This callback initializes a new FRL stream by enabling HDMI Dispclk,
	 * SOCCLK, and HDMI stream clock. Additionally, this callback is also
	 * used to initialize some debug options, such as the CRC validation.
	 * Finally, it must setup the OTG instance.
	 */
	void (*hdmi_frl_enable)(struct hpo_frl_stream_encoder *enc,
				int otg_inst);

	/**
	 * @hdmi_frl_unblank:
	 *
	 * Ensure that the FIFO video stream is active, reset the necessary
	 * FIFO registers, enable HDMI tribyte encoder, and finally, adjust the
	 * clock ramp registers for FIFO. Notice that all the configuration
	 * made by this function it is at the register level.
	 */
	void (*hdmi_frl_unblank)(struct hpo_frl_stream_encoder *enc,
				 int otg_inst);

	/**
	 * @hdmi_frl_blank:
	 *
	 * This callback is a register-level configuration that must disable
	 * the clock ramp adjuster FIFO, disable the HDMI Tribyte encoder, and
	 * disable the stream clocks (dispclk, socclk, and hdmistreamclk).
	 */
	void (*hdmi_frl_blank)(struct hpo_frl_stream_encoder *enc);

	/**
	 * @hdmi_frl_fifo_odm_enabled:
	 *
	 * This callback checks if the FIFO ODM Combine mode is enabled
	 */
	bool (*hdmi_frl_fifo_odm_enabled)(struct hpo_frl_stream_encoder *enc);

	/**
	 * @hdmi_frl_set_stream_attribute:
	 *
	 * This callback should be invoked only after the link is trained. The
	 * implementation should configure the pixel encode, color depth, ODM
	 * mode, configure horizontal blank/active size, configure borrow
	 * parameters, enable general control packet, enable/setup audio, and
	 * AVMute.
	 */
	void (*hdmi_frl_set_stream_attribute)(struct hpo_frl_stream_encoder *enc,
					      struct dc_crtc_timing *crtc_timing,
					      struct frl_borrow_params *borrow_params,
					      int odm_combine_num_segments);

	/**
	 * @update_hdmi_info_packets:
	 *
	 * Update the HDMI packet control option.
	 */
	void (*update_hdmi_info_packets)(struct hpo_frl_stream_encoder *enc,
					 const struct encoder_info_frame *info_frame);

	/**
	 * @stop_hdmi_info_packets:
	 *
	 * Update HDMI info packet (avi, vendoer, gamut, spd, hdrsmd, hfvsif,
	 * vtem, etc).
	 */
	void (*stop_hdmi_info_packets)(struct hpo_frl_stream_encoder *enc);

	/**
	 * @audio_mute_control:
	 *
	 * Just mute the audio.
	 */
	void (*audio_mute_control)(struct hpo_frl_stream_encoder *enc,
				   bool mute);

	/**
	 * @hdmi_audio_setup:
	 *
	 * Setup HDMI audio based on the Azila info.
	 */
	void (*hdmi_audio_setup)(struct hpo_frl_stream_encoder *enc,
				 unsigned int az_inst,
				 struct audio_info *info,
				 struct audio_crtc_info *audio_crtc_info);

	/**
	 * @hdmi_audio_disable:
	 *
	 * Disable audio.
	 */
	void (*hdmi_audio_disable)(struct hpo_frl_stream_encoder *enc);

	/**
	 * @set_avmute:
	 *
	 * Disable AVmute at the register-level.
	 */
	void (*set_avmute)(struct hpo_frl_stream_encoder *enc, bool enable);

	/**
	 * @validate_hdmi_frl_output:
	 *
	 * Validate FRL inputs, DSC, audio parameters, FRL capacity, and borrow
	 * parameters.
	 */
	bool (*validate_hdmi_frl_output)(struct hpo_frl_stream_encoder *enc,
					 const struct dc_crtc_timing *timing,
					 const struct audio_check *audio,
					 struct dc_hdmi_frl_link_settings *frl_link_settings,
					 unsigned int dsc_max_rate);

	/**
	 * @read_state:
	 *
	 * Fill out the hpo_frl_stream_encoder_state with the info retrieved
	 * from ASIC registers.
	 */
	void (*read_state)(struct hpo_frl_stream_encoder *enc,
			   struct hpo_frl_stream_encoder_state *state);

	/**
	 * @set_dynamic_metadata:
	 *
	 * Metadata configuration that sets:
	 *  - Using Enfine or disable DME.
	 *  - HUBP setup for the physical instance that has the DME enabled.
	 *  - Metadata packet type.
	 *  - Ensure OTG master update locks in the changing DME configuration.
	 */
	void (*set_dynamic_metadata)(struct hpo_frl_stream_encoder *enc,
				     bool enable_dme,
				     uint32_t hubp_requestor_id,
				     enum dynamic_metadata_mode dmdata_mode);
};

struct hpo_dp_stream_encoder_state {
	uint32_t stream_enc_enabled;
	uint32_t vid_stream_enabled;
	uint32_t otg_inst;
	uint32_t pixel_encoding;
	uint32_t component_depth;
	uint32_t compressed_format;
	uint32_t sdp_enabled;
	uint32_t mapped_to_link_enc;
};

struct hpo_dp_stream_encoder {
	const struct hpo_dp_stream_encoder_funcs *funcs;
	struct dc_context *ctx;
	struct dc_bios *bp;
	uint32_t inst;
	enum engine_id id;
	struct vpg *vpg;
	struct apg *apg;
};

struct hpo_dp_stream_encoder_funcs {
	void (*enable_stream)(
			struct hpo_dp_stream_encoder *enc);

	void (*dp_unblank)(
			struct hpo_dp_stream_encoder *enc,
			uint32_t stream_source);

	void (*dp_blank)(
			struct hpo_dp_stream_encoder *enc);

	void (*disable)(
			struct hpo_dp_stream_encoder *enc);

	void (*set_stream_attribute)(
		struct hpo_dp_stream_encoder *enc,
		struct dc_crtc_timing *crtc_timing,
		enum dc_color_space output_color_space,
		bool use_vsc_sdp_for_colorimetry,
		bool compressed_format,
		bool double_buffer_en);

	void (*update_dp_info_packets_sdp_line_num)(
		struct hpo_dp_stream_encoder *enc,
		struct encoder_info_frame *info_frame);

	void (*update_dp_info_packets)(
		struct hpo_dp_stream_encoder *enc,
		const struct encoder_info_frame *info_frame);

	void (*stop_dp_info_packets)(
		struct hpo_dp_stream_encoder *enc);

	void (*dp_set_dsc_pps_info_packet)(
			struct hpo_dp_stream_encoder *enc,
			bool enable,
			uint8_t *dsc_packed_pps,
			bool immediate_update);

	void (*map_stream_to_link)(
			struct hpo_dp_stream_encoder *enc,
			uint32_t stream_enc_inst,
			uint32_t link_enc_inst);

	void (*dp_audio_setup)(
			struct hpo_dp_stream_encoder *enc,
			unsigned int az_inst,
			struct audio_info *info);

	void (*dp_audio_enable)(
			struct hpo_dp_stream_encoder *enc);

	void (*dp_audio_disable)(
			struct hpo_dp_stream_encoder *enc);

	void (*read_state)(
			struct hpo_dp_stream_encoder *enc,
			struct hpo_dp_stream_encoder_state *state);

	void (*set_hblank_min_symbol_width)(
			struct hpo_dp_stream_encoder *enc,
			uint16_t width);
};

#endif /* STREAM_ENCODER_H_ */