path: root/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c

/*
 * Copyright 2011 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: Alex Deucher
 */

#include "drmP.h"
#include "amdgpu.h"
#include "amdgpu_atombios.h"
#include "amdgpu_i2c.h"
#include "amdgpu_dpm.h"
#include "atom.h"

void amdgpu_dpm_print_class_info(u32 class, u32 class2)
{
	printk("\tui class: ");
	switch (class & ATOM_PPLIB_CLASSIFICATION_UI_MASK) {
	case ATOM_PPLIB_CLASSIFICATION_UI_NONE:
	default:
		printk("none\n");
		break;
	case ATOM_PPLIB_CLASSIFICATION_UI_BATTERY:
		printk("battery\n");
		break;
	case ATOM_PPLIB_CLASSIFICATION_UI_BALANCED:
		printk("balanced\n");
		break;
	case ATOM_PPLIB_CLASSIFICATION_UI_PERFORMANCE:
		printk("performance\n");
		break;
	}
	printk("\tinternal class: ");
	if (((class & ~ATOM_PPLIB_CLASSIFICATION_UI_MASK) == 0) &&
	    (class2 == 0))
		printk("none");
	else {
		if (class & ATOM_PPLIB_CLASSIFICATION_BOOT)
			printk("boot ");
		if (class & ATOM_PPLIB_CLASSIFICATION_THERMAL)
			printk("thermal ");
		if (class & ATOM_PPLIB_CLASSIFICATION_LIMITEDPOWERSOURCE)
			printk("limited_pwr ");
		if (class & ATOM_PPLIB_CLASSIFICATION_REST)
			printk("rest ");
		if (class & ATOM_PPLIB_CLASSIFICATION_FORCED)
			printk("forced ");
		if (class & ATOM_PPLIB_CLASSIFICATION_3DPERFORMANCE)
			printk("3d_perf ");
		if (class & ATOM_PPLIB_CLASSIFICATION_OVERDRIVETEMPLATE)
			printk("ovrdrv ");
		if (class & ATOM_PPLIB_CLASSIFICATION_UVDSTATE)
			printk("uvd ");
		if (class & ATOM_PPLIB_CLASSIFICATION_3DLOW)
			printk("3d_low ");
		if (class & ATOM_PPLIB_CLASSIFICATION_ACPI)
			printk("acpi ");
		if (class & ATOM_PPLIB_CLASSIFICATION_HD2STATE)
			printk("uvd_hd2 ");
		if (class & ATOM_PPLIB_CLASSIFICATION_HDSTATE)
			printk("uvd_hd ");
		if (class & ATOM_PPLIB_CLASSIFICATION_SDSTATE)
			printk("uvd_sd ");
		if (class2 & ATOM_PPLIB_CLASSIFICATION2_LIMITEDPOWERSOURCE_2)
			printk("limited_pwr2 ");
		if (class2 & ATOM_PPLIB_CLASSIFICATION2_ULV)
			printk("ulv ");
		if (class2 & ATOM_PPLIB_CLASSIFICATION2_MVC)
			printk("uvd_mvc ");
	}
	printk("\n");
}

void amdgpu_dpm_print_cap_info(u32 caps)
{
	printk("\tcaps: ");
	if (caps & ATOM_PPLIB_SINGLE_DISPLAY_ONLY)
		printk("single_disp ");
	if (caps & ATOM_PPLIB_SUPPORTS_VIDEO_PLAYBACK)
		printk("video ");
	if (caps & ATOM_PPLIB_DISALLOW_ON_DC)
		printk("no_dc ");
	printk("\n");
}

void amdgpu_dpm_print_ps_status(struct amdgpu_device *adev,
				struct amdgpu_ps *rps)
{
	printk("\tstatus: ");
	if (rps == adev->pm.dpm.current_ps)
		printk("c ");
	if (rps == adev->pm.dpm.requested_ps)
		printk("r ");
	if (rps == adev->pm.dpm.boot_ps)
		printk("b ");
	printk("\n");
}

u32 amdgpu_dpm_get_vblank_time(struct amdgpu_device *adev)
{
	struct drm_device *dev = adev->ddev;
	struct drm_crtc *crtc;
	struct amdgpu_crtc *amdgpu_crtc;
	u32 line_time_us, vblank_lines;
	u32 vblank_time_us = 0xffffffff; /* if the displays are off, vblank time is max */

	if (adev->mode_info.num_crtc && adev->mode_info.mode_config_initialized) {
		list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
			amdgpu_crtc = to_amdgpu_crtc(crtc);
			if (crtc->enabled && amdgpu_crtc->enabled && amdgpu_crtc->hw_mode.clock) {
				line_time_us = (amdgpu_crtc->hw_mode.crtc_htotal * 1000) /
					amdgpu_crtc->hw_mode.clock;
				vblank_lines = amdgpu_crtc->hw_mode.crtc_vblank_end -
					amdgpu_crtc->hw_mode.crtc_vdisplay +
					(amdgpu_crtc->v_border * 2);
				vblank_time_us = vblank_lines * line_time_us;
				break;