// SPDX-License-Identifier: GPL-2.0
/*
* Microchip Switchtec(tm) DMA Controller Driver
* Copyright (c) 2025, Kelvin Cao <kelvin.cao@microchip.com>
* Copyright (c) 2025, Microchip Corporation
*/
#include <linux/bitfield.h>
#include <linux/circ_buf.h>
#include <linux/dmaengine.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/iopoll.h>
#include "dmaengine.h"
MODULE_DESCRIPTION("Switchtec PCIe Switch DMA Engine");
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Kelvin Cao");
#define SWITCHTEC_DMAC_CHAN_CTRL_OFFSET 0x1000
#define SWITCHTEC_DMAC_CHAN_CFG_STS_OFFSET 0x160000
#define SWITCHTEC_DMA_CHAN_HW_REGS_SIZE 0x1000
#define SWITCHTEC_DMA_CHAN_FW_REGS_SIZE 0x80
#define SWITCHTEC_REG_CAP 0x80
#define SWITCHTEC_REG_CHAN_CNT 0x84
#define SWITCHTEC_REG_TAG_LIMIT 0x90
#define SWITCHTEC_REG_CHAN_STS_VEC 0x94
#define SWITCHTEC_REG_SE_BUF_CNT 0x98
#define SWITCHTEC_REG_SE_BUF_BASE 0x9a
#define SWITCHTEC_DESC_MAX_SIZE 0x100000
#define SWITCHTEC_CHAN_CTRL_PAUSE BIT(0)
#define SWITCHTEC_CHAN_CTRL_HALT BIT(1)
#define SWITCHTEC_CHAN_CTRL_RESET BIT(2)
#define SWITCHTEC_CHAN_CTRL_ERR_PAUSE BIT(3)
#define SWITCHTEC_CHAN_STS_PAUSED BIT(9)
#define SWITCHTEC_CHAN_STS_HALTED BIT(10)
#define SWITCHTEC_CHAN_STS_PAUSED_MASK GENMASK(29, 13)
#define SWITCHTEC_INVALID_HFID 0xffff
#define SWITCHTEC_DMA_SQ_SIZE SZ_32K
#define SWITCHTEC_DMA_CQ_SIZE SZ_32K
#define SWITCHTEC_DMA_RING_SIZE SZ_32K
static const char * const channel_status_str[] = {
[13] = "received a VDM with length error status",
[14] = "received a VDM or Cpl with Unsupported Request error status",
[15] = "received a VDM or Cpl with Completion Abort error status",
[16] = "received a VDM with ECRC error status",
[17] = "received a VDM with EP error status",
[18] = "received a VDM with Reserved Cpl error status",
[19] = "received only part of split SE CplD",
[20] = "the ISP_DMAC detected a Completion Time Out",
[21] = "received a Cpl with Unsupported Request status",
[22] = "received a Cpl with Completion Abort status"