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2018-05-29kconfig: test: add Kconfig macro language testsMasahiro Yamada3-0/+62
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_TIME_NSEC_REG); writel(ts->tv_sec >> HCLGE_PTP_SEC_H_OFFSET, hdev->ptp->io_base + HCLGE_PTP_TIME_SEC_H_REG); writel(ts->tv_sec & HCLGE_PTP_SEC_L_MASK, hdev->ptp->io_base + HCLGE_PTP_TIME_SEC_L_REG); /* synchronize the time of phc */ writel(HCLGE_PTP_TIME_SYNC_EN, hdev->ptp->io_base + HCLGE_PTP_TIME_SYNC_REG); spin_unlock_irqrestore(&hdev->ptp->lock, flags); return 0; } static int hclge_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta) { struct hclge_dev *hdev = hclge_ptp_get_hdev(ptp); unsigned long flags; bool is_neg = false; u32 adj_val = 0; if (delta < 0) { adj_val |= HCLGE_PTP_TIME_NSEC_NEG; delta = -delta; is_neg = true; } if (delta > HCLGE_PTP_TIME_NSEC_MASK) { struct timespec64 ts; s64 ns; hclge_ptp_gettimex(ptp, &ts, NULL); ns = timespec64_to_ns(&ts); ns = is_neg ? ns - delta : ns + delta; ts = ns_to_timespec64(ns); return hclge_ptp_settime(ptp, &ts); } adj_val |= delta & HCLGE_PTP_TIME_NSEC_MASK; spin_lock_irqsave(&hdev->ptp->lock, flags); writel(adj_val, hdev->ptp->io_base + HCLGE_PTP_TIME_NSEC_REG); writel(HCLGE_PTP_TIME_ADJ_EN, hdev->ptp->io_base + HCLGE_PTP_TIME_ADJ_REG); spin_unlock_irqrestore(&hdev->ptp->lock, flags); return 0; } int hclge_ptp_get_cfg(struct hclge_dev *hdev, struct ifreq *ifr) { if (!test_bit(HCLGE_STATE_PTP_EN, &hdev->state)) return -EOPNOTSUPP; return copy_to_user(ifr->ifr_data, &hdev->ptp->ts_cfg, sizeof(struct hwtstamp_config)) ? -EFAULT : 0; } static int hclge_ptp_int_en(struct hclge_dev *hdev, bool en) { struct hclge_ptp_int_cmd *req; struct hclge_desc desc; int ret; req = (struct hclge_ptp_int_cmd *)desc.data; hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_PTP_INT_EN, false); req->int_en = en ? 1 : 0; ret = hclge_cmd_send(&hdev->hw, &desc, 1); if (ret) dev_err(&hdev->pdev->dev, "failed to %s ptp interrupt, ret = %d\n", en ? "enable" : "disable", ret); return ret; } int hclge_ptp_cfg_qry(struct hclge_dev *hdev, u32 *cfg) { struct hclge_ptp_cfg_cmd *req; struct hclge_desc desc; int ret; req = (struct hclge_ptp_cfg_cmd *)desc.data; hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_PTP_MODE_CFG, true); ret = hclge_cmd_send(&hdev->hw, &desc, 1); if (ret) { dev_err(&hdev->pdev->dev, "failed to query ptp config, ret = %d\n", ret); return ret; } *cfg = le32_to_cpu(req->cfg); return 0; } static int hclge_ptp_cfg(struct hclge_dev *hdev, u32 cfg) { struct hclge_ptp_cfg_cmd *req; struct hclge_desc desc; int ret; req = (struct hclge_ptp_cfg_cmd *)desc.data; hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_PTP_MODE_CFG, false); req->cfg = cpu_to_le32(cfg); ret = hclge_cmd_send(&hdev->hw, &desc, 1); if (ret) dev_err(&hdev->pdev->dev, "failed to config ptp, ret = %d\n", ret); return ret; } static int hclge_ptp_set_tx_mode(struct hwtstamp_config *cfg, unsigned long *flags, u32 *ptp_cfg) { switch (cfg->tx_type) { case HWTSTAMP_TX_OFF: clear_bit(HCLGE_PTP_FLAG_TX_EN, flags); break; case HWTSTAMP_TX_ON: set_bit(HCLGE_PTP_FLAG_TX_EN, flags); *ptp_cfg |= HCLGE_PTP_TX_EN_B; break; default: return -ERANGE; } return 0; } static int hclge_ptp_set_rx_mode(struct hwtstamp_config *cfg, unsigned long *flags, u32 *ptp_cfg) { int rx_filter = cfg->rx_filter; switch (cfg->rx_filter) { case HWTSTAMP_FILTER_NONE: clear_bit(HCLGE_PTP_FLAG_RX_EN, flags); break; case HWTSTAMP_FILTER_PTP_V1_L4_SYNC: case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ: case HWTSTAMP_FILTER_PTP_V1_L4_EVENT: set_bit(HCLGE_PTP_FLAG_RX_EN, flags); *ptp_cfg |= HCLGE_PTP_RX_EN_B; *ptp_cfg |= HCLGE_PTP_UDP_FULL_TYPE << HCLGE_PTP_UDP_EN_SHIFT; rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_EVENT; break; case HWTSTAMP_FILTER_PTP_V2_EVENT: case HWTSTAMP_FILTER_PTP_V2_L4_EVENT: case HWTSTAMP_FILTER_PTP_V2_SYNC: case HWTSTAMP_FILTER_PTP_V2_L4_SYNC: case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ: case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ: case HWTSTAMP_FILTER_PTP_V2_L2_EVENT: case HWTSTAMP_FILTER_PTP_V2_L2_SYNC: case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ: set_bit(HCLGE_PTP_FLAG_RX_EN, flags); *ptp_cfg |= HCLGE_PTP_RX_EN_B; *ptp_cfg |= HCLGE_PTP_UDP_FULL_TYPE << HCLGE_PTP_UDP_EN_SHIFT; *ptp_cfg |= HCLGE_PTP_MSG1_V2_DEFAULT << HCLGE_PTP_MSG1_SHIFT; *ptp_cfg |= HCLGE_PTP_MSG0_V2_EVENT << HCLGE_PTP_MSG0_SHIFT; *ptp_cfg |= HCLGE_PTP_MSG_TYPE_V2 << HCLGE_PTP_MSG_TYPE_SHIFT; rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT; break; case HWTSTAMP_FILTER_ALL: default: return -ERANGE; } cfg->rx_filter = rx_filter; return 0; } static int hclge_ptp_set_ts_mode(struct hclge_dev *hdev, struct hwtstamp_config *cfg) { unsigned long flags = hdev->ptp->flags; u32 ptp_cfg = 0; int ret; if (test_bit(HCLGE_PTP_FLAG_EN, &hdev->ptp->flags)) ptp_cfg |= HCLGE_PTP_EN_B; ret = hclge_ptp_set_tx_mode(cfg, &flags, &ptp_cfg); if (ret) return ret; ret = hclge_ptp_set_rx_mode(cfg, &flags, &ptp_cfg); if (ret) return ret; ret = hclge_ptp_cfg(hdev, ptp_cfg); if (ret) return ret; hdev->ptp->flags = flags; hdev->ptp->ptp_cfg = ptp_cfg; return 0; } int hclge_ptp_set_cfg(struct hclge_dev *hdev, struct ifreq *ifr) { struct hwtstamp_config cfg; int ret; if (!test_bit(HCLGE_STATE_PTP_EN, &hdev->state)) { dev_err(&hdev->pdev->dev, "phc is unsupported\n"); return -EOPNOTSUPP; } if (copy_from_user(&cfg, ifr->ifr_data, sizeof(cfg))) return -EFAULT; ret = hclge_ptp_set_ts_mode(hdev, &cfg); if (ret) return ret; hdev->ptp->ts_cfg = cfg; return copy_to_user(ifr->ifr_data, &cfg, sizeof(cfg)) ? -EFAULT : 0; } int hclge_ptp_get_ts_info(struct hnae3_handle *handle, struct ethtool_ts_info *info) { struct hclge_vport *vport = hclge_get_vport(handle); struct hclge_dev *hdev = vport->back; if (!test_bit(HCLGE_STATE_PTP_EN, &hdev->state)) { dev_err(&hdev->pdev->dev, "phc is unsupported\n"); return -EOPNOTSUPP; } info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | SOF_TIMESTAMPING_RX_SOFTWARE | SOF_TIMESTAMPING_SOFTWARE | SOF_TIMESTAMPING_TX_HARDWARE | SOF_TIMESTAMPING_RX_HARDWARE | SOF_TIMESTAMPING_RAW_HARDWARE; if (hdev->ptp->clock) info->phc_index = ptp_clock_index(hdev->ptp->clock); else info->phc_index = -1; info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON); info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) | BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT) | BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC) | BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ); info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) | BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) | BIT(HWTSTAMP_FILTER_PTP_V2_EVENT) | BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT) | BIT(HWTSTAMP_FILTER_PTP_V2_SYNC) | BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC) | BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) | BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ); return 0; } static int hclge_ptp_create_clock(struct hclge_dev *hdev) { struct hclge_ptp *ptp; ptp = devm_kzalloc(&hdev->pdev->dev, sizeof(*ptp), GFP_KERNEL); if (!ptp) return -ENOMEM; ptp->hdev = hdev; snprintf(ptp->info.name, sizeof(ptp->info.name), "%s", HCLGE_DRIVER_NAME); ptp->info.owner = THIS_MODULE; ptp->info.max_adj = HCLGE_PTP_CYCLE_ADJ_MAX; ptp->info.n_ext_ts = 0;