aboutsummaryrefslogtreecommitdiff
path: root/drivers/gpu
AgeCommit message (Expand)AuthorFilesLines
2025-10-13drm/amdgpu: enable suspend/resume all for gfx 12Jonathan Kim1-7/+4
2025-10-13drm/amd/ras: Add mp1 v13_0 ras functionsYiPeng Chai2-0/+135
2025-10-13drm/amdgpu: fix hung reset queue array memory allocationJonathan Kim5-10/+20
2025-10-13drm/amd/ras: Add aca common ras functionsYiPeng Chai2-0/+836
2025-10-13drm/amdgpu: fix initialization of doorbell array for detect and hangJonathan Kim1-1/+1
2025-10-13drm/amd/ras: Add ras aca parser v1.0YiPeng Chai2-0/+450
2025-10-13drm/amdgpu: clean up amdgpu hmm range functionsSunil Khatri8-74/+56
2025-10-13drm/amdgpu: use user provided hmm_range buffer in amdgpu_ttm_tt_get_user_pagesSunil Khatri8-26/+38
2025-10-13drm/amdgpu: fix gfx12 mes packet status return checkJonathan Kim1-1/+6
2025-10-13drm/amdgpu: Fix NULL pointer dereference in VRAM logic for APU devicesJesse.Zhang3-6/+7
2025-10-13drm/amdgpu: hide VRAM sysfs attributes on GPUs without VRAMChristian König1-0/+3
2025-10-13drm/amdgpu: fix bit shift logicSathishkumar S1-1/+1
2025-10-13drm/amd/powerplay: Fix CIK shutdown temperatureTimur Kristóf1-2/+1
2025-10-13drm/amdgpu: use atomic functions with memory barriers for vm fault infoGui-Dong Han3-11/+8
2025-10-13drm/amdgpu: set an error on all fences from a bad contextAlex Deucher3-6/+37
2025-10-13drm/amdgpu: handle wrap around in reemit handlingAlex Deucher1-5/+10
2025-10-13drm/amdgpu: fix handling of harvesting for ip_discovery firmwareAlex Deucher1-1/+17
2025-10-13drm/amdgpu: block CE CS if not explicitely allowed by module optionChristian König3-1/+14
2025-10-13drm/amdgpu: remove two invalid BUG_ON()sChristian König2-4/+0
2025-10-13drm/amd: Disable ASPM on SITimur Kristóf1-0/+7
2025-10-13drm/amd/pm: Disable MCLK switching on SI at high pixel clocksTimur Kristóf1-0/+5
2025-10-13Revert "drm/amd/display: Only restore backlight after amdgpu_dm_init or dm_re...Matthew Schwartz2-15/+4
2025-10-13drm/i915/fb: Fix the set_tiling vs. addfb race, againVille Syrjälä1-18/+20
2025-10-13drm/i915/frontbuffer: Move bo refcounting intel_frontbuffer_{get,release}()Ville Syrjälä2-3/+9
2025-10-13drm/i915/guc: Skip communication warning on reset in progressZhanjun Dong1-1/+8
2025-10-13drm/xe/guc: Check GuC running state before deregistering exec queueShuicheng Lin1-1/+12
2025-10-13drm/xe/i2c: Wire up reset/postinstall for I2C IRQRaag Jadav4-0/+30
2025-10-13drm/xe/i2c: Introduce xe_i2c_irq_present()Raag Jadav1-1/+6
2025-10-13drm/xe: Sort include files alphabetically.Arun Abhishek Chowhan3-3/+3
2025-10-13drm/atomic: Change state pointers to a more meaningful nameMaxime Ripard3-18/+18
2025-10-13Merge drm/drm-next into drm-misc-nextThomas Zimmermann578-10249/+14926
2025-10-11drm/bridge: lt9211: Drop check for last nibble of version registerMarek Vasut1-2/+1
2025-10-11drm/i915/cdclk: Move intel_cdclk_atomic_check()Ville Syrjälä1-42/+40
2025-10-11drm/i915/cdclk: Hide intel_modeset_calc_cdclk()Ville Syrjälä3-28/+20
2025-10-11drm/i915/cdclk: Use enabled_pipes instead of active_pipes for the glk audio w/aVille Syrjälä1-3/+13
2025-10-11drm/i915: Introduce intel_calc_enabled_pipes()Ville Syrjälä2-0/+19
2025-10-11drm/i915/cdclk: Decouple cdclk from state->modesetVille Syrjälä2-6/+14
2025-10-11drm/i915/cdclk: Move intel_bw_crtc_min_cdclk() handling into intel_crtc_compu...Ville Syrjälä3-13/+6
2025-10-11drm/i915/cdclk: Rework crtc min_cdclk handlingVille Syrjälä1-22/+17
2025-10-11drm/i915/cdclk: Relocate intel_plane_calc_min_cdclk() callsVille Syrjälä3-15/+5
2025-10-11drm/i915/cdclk: Do intel_cdclk_update_crtc_min_cdclk() per-pipeVille Syrjälä4-32/+36
2025-10-11drm/i915/cdclk: Rework bw_min_cdclk handlingVille Syrjälä1-20/+18
2025-10-11drm/i915/cdclk: Extract intel_cdclk_update_crtc_min_cdclk()Ville Syrjälä3-37/+41
2025-10-11drm/i915/cdclk: Extract intel_cdclk_update_bw_min_cdclk()Ville Syrjälä3-36/+38
2025-10-11drm/i915/cdclk: Handle the force_min_cdclk state locking in intel_cdclk_atomi...Ville Syrjälä1-4/+8
2025-10-11drm/i915/cdclk: Introduce intel_cdclk_modeset_checks()Ville Syrjälä1-5/+43
2025-10-11drm/i915/cdclk: Extract dg2_power_well_count()Ville Syrjälä1-14/+19
2025-10-11drm/i915/cdclk: Extract glk_cdclk_audio_wa_needed()Ville Syrjälä1-2/+9
2025-10-11drm/1915/bw: Drop redundant display version checksVille Syrjälä1-4/+0
2025-10-11drm/i915/bw: Skip the bw_state->active_pipes update if no pipe is changing it...Ville Syrjälä3-15/+14
generated by cgit