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path: root/drivers/gpu/drm/amd
AgeCommit message (Expand)AuthorFilesLines
2025-10-20drm/amd/display: Move all DCCG RCG into HWSS root_clock_controlOvidiu Bunea2-8/+2
2025-10-20drm/amd/display: update perfmon measurement interfacesWenjing Liu1-7/+29
2025-10-20drm/amd/display: fix dppclk rcg poweron checkYihan Zhu1-1/+5
2025-10-20drm/amd/display: not skip hpd irq for bw alloc modePeichen Huang2-5/+18
2025-10-20drm/amd/display: Update spacing in structAlvin Lee1-3/+3
2025-10-20drm/amd/display: Update DCN401 path for cursor offloadAlvin Lee3-27/+45
2025-10-20drm/amd/display: increase max link count and fix link->enc NULL pointer accessCharlene Liu2-1/+10
2025-10-20drm/amd/display: Rework HDMI data channel readsRelja Vojvodic3-1/+7
2025-10-20drm/amd/display: fix typo in display_mode_core_structs.hAdi Gollamudi1-1/+1
2025-10-20drm/amd/display: add dccg dfs mask defCharlene Liu1-0/+8
2025-10-20drm/amd/display: Remove unused field in DMLAlvin Lee1-1/+0
2025-10-20drm/amd/display: Fix NULL pointer dereferenceMeenakshikumar Somasundaram1-1/+2
2025-10-20drm/amd/display: add dispclk ramping to dcn35.Charlene Liu1-0/+12
2025-10-20drm/amd/display: Add debug option to override EASF scaler tapsSamson Tam3-0/+18
2025-10-20drm/amd/display: fix duplicate aux command with AMD aux backlightHarry VanZyllDeJong1-1/+2
2025-10-20drm/amdgpu: Add ras module eeprom safety watermark checkYiPeng Chai1-0/+4
2025-10-20drm/amdgpu: Avoid hive seqno increment in legacy rasYiPeng Chai1-0/+3
2025-10-20drm/amdgpu: Add poison consumption sequence numbers for gfx and sdmaYiPeng Chai1-1/+6
2025-10-20drm/amdgpu: Avoid loading bad pages into legacy rasYiPeng Chai1-0/+3
2025-10-20drm/amdgpu: add ras module rma checkYiPeng Chai1-0/+3
2025-10-20drm/amdgpu: Improve ras fatal error handling functionYiPeng Chai3-9/+14
2025-10-20drm/amdgpu: Intercept ras interrupts to ras moduleYiPeng Chai4-4/+35
2025-10-18drm/client: Remove holds_console_lock parameter from suspend/resumeThomas Zimmermann1-4/+4
2025-10-13drm/amd: Drop calls to restore power limit and clock from smu_resume()Mario Limonciello1-13/+0
2025-10-13drm/amdgpu: update remove after reset flag for MES remove queueJonathan Kim5-2/+13
2025-10-13drm/amdgpu: Add ras module files into amdgpuYiPeng Chai11-18/+20
2025-10-13drm/amdgpu/userqueue: validate userptrs for userqueuesSunil Khatri1-0/+79
2025-10-13drm/amdgpu: update the functions to use amdgpu version of hmmSunil Khatri13-44/+56
2025-10-13drm/amdgpu: Reserve discovery TMR only if neededLijo Lazar3-14/+19
2025-10-13drm/amd/pm: export a function amdgpu_smu_ras_send_msg to allow send msg directlyYiPeng Chai3-0/+41
2025-10-13drm/amd/pm: Grant interface access after full initLijo Lazar1-1/+2
2025-10-13drm/amdgpu: Move reset-on-init sequence earlierLijo Lazar1-3/+2
2025-10-13drm/amdgpu: Add amdgpu_discovery_infoLijo Lazar6-97/+129
2025-10-13drm/amdgpu: Reorganize sysfs ini/fini callsLijo Lazar1-37/+51
2025-10-13drm/amdgpu: clean up and unify hw fence handlingAlex Deucher8-167/+63
2025-10-13drm/amd: Save and restore all limit typesMario Limonciello2-8/+14
2025-10-13drm/amd: Remove second call to set_power_limit()Mario Limonciello1-12/+9
2025-10-13drm/amd: Stop overloading power limit with limit typeMario Limonciello7-13/+10
2025-10-13drm/amdgpu/userq: drop VCN and VPE doorbell handlingAlex Deucher1-11/+0
2025-10-13drm/amd: Pass userq suspend failures up to callerMario Limonciello1-1/+3
2025-10-13drm/amd: Fix error handling with multiple userq IDRsMario Limonciello1-14/+11
2025-10-13drm/amd: Pass IP suspend errors up to callersMario Limonciello1-3/+8
2025-10-13drm/amd: Don't always set IP block HW status to falseMario Limonciello1-1/+0
2025-10-13drm/amd: Remove comment about handling errors in amdgpu_device_ip_suspend_pha...Mario Limonciello1-1/+0
2025-10-13drm/amd: Stop exporting amdgpu_device_ip_suspend() outside amdgpu_deviceMario Limonciello2-2/+1
2025-10-13drm/amd: Unify shutdown() callback behaviorMario Limonciello1-1/+2
2025-10-13drm/amdgpu: validate userq va for GEM unmapPrike Liang3-0/+46
2025-10-13drm/amdgpu: validate the queue va for resuming the queuePrike Liang1-0/+44
2025-10-13drm/amdgpu: keeping waiting userq fence infinitelyPrike Liang1-4/+9
2025-10-13drm/amdgpu: track the userq bo va for its obj managementPrike Liang1-0/+36
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