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4 daysReplace <linux/mod_devicetable.h> by more specific <linux/device-id/*.h> (c f...Uwe Kleine-König (The Capable Hub)6-6/+0
13 daysMerge tag 'pci-v7.2-changes' of git://git.kernel.org/pub/scm/linux/kernel/git...Linus Torvalds1-3/+0
14 daysMerge tag 'dmaengine-7.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/gi...Linus Torvalds24-548/+1149
2026-06-21Merge tag 'mm-nonmm-stable-2026-06-21-10-22' of git://git.kernel.org/pub/scm/...Linus Torvalds1-0/+1
2026-06-11dmaengine: qcom: Unify user-visible "Qualcomm" nameKrzysztof Kozlowski1-4/+4
2026-06-11dmaengine: qcom: hidma: use sysfs_emit() in sysfs show callbacksHungyu Lin2-15/+10
2026-06-11dmaengine: dw-axi-dmac: fix PM for system sleep and channel allocTze Yee Ng1-2/+9
2026-06-11dmaengine: dw-axi-dmac: drop redundant DMAC enable in block startNiravkumar L Rabara1-2/+0
2026-06-11dmaengine: altera-msgdma: Use memcpy_toio for descriptor FIFO writesAdrian Ng Ho Yin1-9/+15
2026-06-09PCI/P2PDMA: Add Intel QAT, DSA, IAA devices to whitelistLukas Wunner1-3/+0
2026-06-08dmaengine: tegra: Fix burst size calculationKartik Rajput1-0/+7
2026-06-08dmaengine: dma-axi-dmac: use DMA pool to manange DMA descriptorNuno Sá1-26/+40
2026-06-08dmaengine: dma-axi-dmac: Drop struct clk from main structNuno Sá1-5/+4
2026-06-08dmaengine: dma-axi-dmac: Properly free struct axi_dmac_descNuno Sá1-1/+1
2026-06-08dmaengine: Fix possible use after freeNuno Sá1-1/+2
2026-06-08dmaengine: dw-edma: Add spinlock to protect DONE_INT_MASK and ABORT_INT_MASKFrank Li2-1/+7
2026-06-08dmaengine: dw-edma-pcie: Reject devices without driver dataKoichiro Den1-0/+3
2026-06-08dmaengine: sh: rz-dmac: Add DMA ACK signal routing supportJohn Madieu1-0/+69
2026-06-08dmaengine: dw-edma: Remove dw_edma_add_irq_mask()Devendra K Verma1-11/+0
2026-06-08dmaengine: nbpfaxi: Drop unused platform_device_id arrayUwe Kleine-König (The Capable Hub)1-15/+0
2026-06-08dmaengine: cirrus: Drop left-over from platform probingUwe Kleine-König (The Capable Hub)1-7/+0
2026-06-08dmaengine: dmatest: split struct dmatest_info from variable declarationRosen Penev1-2/+4
2026-06-08dmaengine: qcom: gpi: set DMA_PRIVATE capabilityIcenowy Zheng1-0/+1
2026-06-08dmaengine: ste_dma40: turn d40_base phy_chans into a flexible arrayRosen Penev1-6/+8
2026-06-08dmaengine: tegra210-adma: Add error logging on failure pathsSheetal1-19/+44
2026-06-08dmaengine: dw-edma: Add Xilinx CPM6-DMA DeviceIDDevendra K Verma1-0/+16
2026-06-04dmaengine: sh: rz-dmac: Set the Link End (LE) bit on the last descriptorClaudiu Beznea1-2/+3
2026-06-04dmaengine: sh: rz-dmac: Add suspend to RAM supportClaudiu Beznea1-5/+175
2026-06-04dmaengine: sh: rz-dmac: Add runtime PM supportClaudiu Beznea1-3/+57
2026-06-04dmaengine: sh: rz-dmac: Adjust rz_dmac_chan_get_residue() to return error codesClaudiu Beznea1-5/+14
2026-06-04dmaengine: sh: rz-dmac: Add cyclic DMA supportClaudiu Beznea1-6/+130
2026-06-04dmaengine: sh: rz-dmac: Drop the update of channel->chctrl with CHCTRL_SETENClaudiu Beznea1-2/+2
2026-06-04dmaengine: sh: rz-dmac: Refactor pause/resume codeClaudiu Beznea1-11/+62
2026-06-04dmaengine: sh: rz-dmac: Use virt-dma APIs for channel descriptor processingClaudiu Beznea1-147/+86
2026-06-04dmaengine: sh: rz-dmac: Add helper to check if the channel is pausedClaudiu Beznea1-4/+8
2026-06-04dmaengine: sh: rz-dmac: Add helper to check if the channel is enabledClaudiu Beznea1-2/+8
2026-06-04dmaengine: sh: rz-dmac: Save the start LM descriptorClaudiu Beznea1-3/+8
2026-06-04dmaengine: sh: rz-dmac: Add helper to compute the lmdesc addressClaudiu Beznea1-3/+7
2026-06-04dmaengine: sh: rz-dmac: Use rz_dmac_disable_hw()Claudiu Beznea1-4/+4
2026-06-04dmaengine: sh: rz-dmac: Use list_first_entry_or_null()Claudiu Beznea1-6/+4
2026-06-04dmaengine: sh: rz-dmac: Fix incorrect NULL check for list_first_entry()Claudiu Beznea1-2/+2
2026-06-04dmaengine: sh: rz-dmac: Move interrupt request after everything is set upClaudiu Beznea1-55/+33
2026-06-04dmaengine: tegra: Add Tegra264 supportAkhil R1-0/+30
2026-06-04dmaengine: tegra: Use iommu-map for stream IDAkhil R1-9/+44
2026-06-04dmaengine: tegra: Use managed DMA controller registrationAkhil R1-15/+4
2026-06-04dmaengine: tegra: Support address width > 39 bitsAkhil R1-31/+52
2026-06-04dmaengine: tegra: Use struct for register offsetsAkhil R1-140/+142
2026-06-04dmaengine: tegra: Make reset control optionalAkhil R1-2/+2
2026-06-04dmaengine: imx-sdma: Refine spba bus searching in probeShengjiu Wang1-1/+3
2026-05-28raid6: hide internalsChristoph Hellwig1-0/+1
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