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path: root/drivers/clk/meson/g12a.c
AgeCommit message (Expand)AuthorFilesLines
2025-09-19clk: amlogic: fix recent code refactoringMarek Szyprowski1-1/+1
2025-09-04clk: amlogic: introduce a common pclk definitionJerome Brunet1-2/+4
2025-09-04clk: amlogic: pclk explicitly use CLK_IGNORE_UNUSEDJerome Brunet1-83/+93
2025-09-04clk: amlogic: drop meson-clkceeJerome Brunet1-14/+14
2025-08-25clk: amlogic: naming consistency alignmentJerome Brunet1-985/+961
2025-07-29Merge branches 'clk-renesas', 'clk-samsung', 'clk-spacemit', 'clk-allwinner' ...Stephen Boyd1-262/+110
2025-07-26clk: Fix typosBjorn Helgaas1-3/+3
2025-07-02clk: amlogic: drop clk_regmap tablesJerome Brunet1-261/+0
2025-06-30clk: amlogic: remove unnecessary headersJerome Brunet1-1/+110
2025-05-15clk: meson-g12a: add missing fclk_div2 to spiccDa Xue1-0/+1
2025-03-14clk: amlogic: g12b: fix cluster A parent dataJerome Brunet1-12/+24
2025-03-14clk: amlogic: g12a: fix mmc A peripheral clockJerome Brunet1-1/+1
2024-12-02module: Convert symbol namespace to string literalPeter Zijlstra1-1/+1
2024-09-30clk: meson: mpll: Delete a useless spinlock from the MPLLChuan Liu1-6/+0
2024-07-29clk: meson: introduce symbol namespace for amlogic clocksJerome Brunet1-0/+1
2024-06-14clk: meson: add missing MODULE_DESCRIPTION() macrosJerome Brunet1-1/+2
2024-04-10clk: meson: fix module license to GPL onlyNeil Armstrong1-1/+1
2024-04-10clk: meson: g12a: make VCLK2 and ENCL clock path configurable by CCFNeil Armstrong1-20/+56
2023-11-24clk: meson: g12a: add CSI & ISP gates clocksNeil Armstrong1-0/+9
2023-11-24clk: meson: g12a: add MIPI ISP clocksNeil Armstrong1-0/+66
2023-11-24clk: meson: g12a: add CTS_ENCL & CTS_ENCL_SEL clocksNeil Armstrong1-0/+40
2023-08-30Merge branches 'clk-versa', 'clk-strdup', 'clk-amlogic', 'clk-allwinner' and ...Stephen Boyd1-745/+744
2023-08-08clk: meson: eeclk: move bindings include to main driverNeil Armstrong1-0/+2
2023-08-08clk: meson: migrate meson-eeclk out of hw_onecell_data to drop NR_CLKSNeil Armstrong1-745/+742
2023-07-19clk: Explicitly include correct DT includesRob Herring1-1/+1
2021-06-09clk: meson: g12a: Add missing NNA source clocks for g12bNick Xie1-0/+6
2021-05-20clk: meson: g12a: fix gp0 and hifi rangesJerome Brunet1-1/+1
2020-11-26clk: meson: g12a: add MIPI DSI Host Pixel ClockNeil Armstrong1-0/+74
2020-11-23clk: meson: enable building as modulesKevin Hilman1-1/+4
2020-11-14clk: meson: g12: use devm variant to register notifiersJerome Brunet1-14/+20
2020-11-14clk: meson: g12: drop use of __clk_lookup()Jerome Brunet1-36/+32
2020-08-29clk: meson: g12a: mark fclk_div2 as criticalStefan Agner1-0/+11
2020-06-19clk: meson: g12a: Add support for NNA CLK source clocksDmitry Shmidt1-0/+119
2020-04-16clk: meson: g12a: Prepare the GPU clock tree to change at runtimeMartin Blumenstingl1-8/+22
2020-02-19clk: meson: g12a: add support for the SPICC SCLK Source clocksNeil Armstrong1-0/+129
2019-12-16clk: meson: g12a: fix missing uart2 in regmap tableJerome Brunet1-0/+1
2019-10-01clk: meson: g12a: set CLK_MUX_ROUND_CLOSEST on the cpu clock muxesNeil Armstrong1-0/+9
2019-10-01clk: meson: g12a: fix cpu clock rate settingNeil Armstrong1-2/+2
2019-08-26clk: meson: g12a: add support for SM1 CPU 1, 2 & 3 clocksNeil Armstrong1-0/+60
2019-08-26clk: meson: g12a: add support for SM1 DynamIQ Shared Unit clockNeil Armstrong1-0/+184
2019-08-26clk: meson: g12a: add support for SM1 GP1 PLLNeil Armstrong1-0/+300
2019-08-09clk: meson: g12a: add notifiers to handle cpu clock changeNeil Armstrong1-54/+481
2019-07-29clk: meson: clk-regmap: migrate to new parent description methodAlexandre Mergnat1-0/+6
2019-07-29clk: meson: g12a: migrate to the new parent description methodAlexandre Mergnat1-394/+693
2019-07-25clk: meson: g12a: fix hifi typo in mali parent_namesAlexandre Mergnat1-1/+1
2019-06-11clk: meson: g12a: mark fclk_div3 as criticalNeil Armstrong1-0/+10
2019-06-11clk: meson: g12a: Add support for G12B CPUB clocksNeil Armstrong1-0/+762
2019-06-11clk: meson-g12a: add temperature sensor clocksGuillaume La Roque1-0/+31
2019-05-20clk: meson: g12a: add controller register initJerome Brunet1-1/+7
2019-05-20clk: meson: g12a: add mpll register init sequencesJerome Brunet1-0/+24