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Age	Commit message (Expand)	Author	Files	Lines
2025-06-05	Merge tag 'riscv-mw1-6.16-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/ker...	Palmer Dabbelt	15	-691/+971
2025-06-05	Merge patch series "riscv: Add Zicbop & prefetchw support"	Alexandre Ghiti	1	-0/+21
2025-06-05	riscv: process: use unsigned int instead of unsigned long for put_user()	Clément Léger	1	-1/+1
2025-06-05	riscv: hwprobe: export Zabha extension	Alexandre Ghiti	1	-0/+1
2025-06-05	Merge patch series "riscv: kexec_file: Support loading Image binary file"	Palmer Dabbelt	5	-486/+602
2025-06-05	riscv: module: Optimize PLT/GOT entry counting	Samuel Holland	1	-16/+65
2025-06-05	Merge patch series "riscv: ftrace: atmoic patching and preempt improvements"	Alexandre Ghiti	3	-164/+208
2025-06-05	riscv: Add support for Zicbop	Alexandre Ghiti	1	-0/+21
2025-06-05	riscv/kexec_file: Fix comment in purgatory relocator	Yao Zi	1	-1/+1
2025-06-05	riscv: kexec_file: Support loading Image binary file	Song Shuai	3	-1/+98
2025-06-05	riscv: kexec_file: Split the loading of kernel and others	Song Shuai	4	-486/+505
2025-06-05	riscv: ftrace: support direct call using call_ops	Andy Chiu	3	-26/+41
2025-06-05	riscv: Implement HAVE_DYNAMIC_FTRACE_WITH_CALL_OPS	Puranjay Mohan	3	-4/+101
2025-06-05	riscv: ftrace: do not use stop_machine to update code	Andy Chiu	1	-54/+10
2025-06-05	riscv: ftrace: prepare ftrace for atomic code patching	Andy Chiu	2	-70/+76
2025-06-05	riscv: ftrace factor out code defined by !WITH_ARG	Andy Chiu	2	-49/+0
2025-06-05	riscv: ftrace: support fastcc in Clang for WITH_ARGS	Andy Chiu	2	-2/+21
2025-06-04	riscv: misaligned: add a function to check misalign trap delegability	Clément Léger	1	-2/+15
2025-06-04	riscv: misaligned: move emulated access uniformity check in a function	Clément Léger	1	-6/+14
2025-06-04	riscv: misaligned: declare misaligned_access_speed under CONFIG_RISCV_MISALIGNED	Clément Léger	1	-2/+0
2025-06-04	riscv: misaligned: use on_each_cpu() for scalar misaligned access probing	Clément Léger	1	-2/+6
2025-06-04	riscv: misaligned: request misaligned exception from SBI	Clément Léger	2	-4/+75
2025-06-04	riscv: sbi: add SBI FWFT extension calls	Clément Léger	1	-1/+19
2025-06-04	riscv: sbi: add FWFT extension interface	Clément Léger	1	-0/+57
2025-06-04	riscv: sbi: remove useless parenthesis	Clément Léger	1	-3/+3
2025-06-02	Revert "RISC-V: vDSO: Wire up getrandom() vDSO implementation"	Palmer Dabbelt	4	-267/+0
2025-05-30	Merge tag 'efi-next-for-v6.16' of git://git.kernel.org/pub/scm/linux/kernel/g...	Linus Torvalds	1	-4/+4
2025-05-29	Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm	Linus Torvalds	1	-0/+10
2025-05-27	Merge tag 'core-entry-2025-05-25' of git://git.kernel.org/pub/scm/linux/kerne...	Linus Torvalds	2	-11/+30
2025-05-26	Merge tag 'kvm-riscv-6.16-1' of https://github.com/kvm-riscv/linux into HEAD	Paolo Bonzini	1	-0/+10
2025-05-21	include: pe.h: Fix PE definitions	Pali Rohár	1	-4/+4
2025-05-21	RISC-V: KVM: Remove scounteren initialization	Atish Patra	1	-0/+10
2025-05-08	Merge patch series "riscv: Add vendor extensions support for SiFive"	Palmer Dabbelt	5	-0/+60
2025-05-08	riscv: hwprobe: Add SiFive xsfvfwmaccqqq vendor extension	Cyan Yang	1	-0/+1
2025-05-08	riscv: Add SiFive xsfvfwmaccqqq vendor extension	Cyan Yang	1	-0/+1
2025-05-08	riscv: hwprobe: Add SiFive xsfvfnrclipxfqf vendor extension	Cyan Yang	1	-0/+1
2025-05-08	riscv: Add SiFive xsfvfnrclipxfqf vendor extension	Cyan Yang	1	-0/+1
2025-05-08	riscv: hwprobe: Add SiFive vendor extension support and probe for xsfqmaccdod...	Cyan Yang	3	-0/+26
2025-05-08	riscv: Add SiFive xsfvqmaccdod and xsfvqmaccqoq vendor extensions	Cyan Yang	3	-0/+30
2025-05-08	riscv: vDSO: Remove --hash-style=both	Xi Ruoyao	1	-1/+1
2025-05-08	Merge patch series "riscv: uaccess: optimisations"	Palmer Dabbelt	2	-0/+13
2025-05-08	riscv: save the SR_SUM status over switches	Ben Dooks	2	-0/+13
2025-05-08	riscv: Disallow PR_GET_TAGGED_ADDR_CTRL without Supm	Samuel Holland	1	-0/+3
2025-05-08	riscv: Fix kernel crash due to PR_SET_TAGGED_ADDR_CTRL	Nam Cao	1	-0/+3
2025-05-08	riscv: misaligned: use get_user() instead of __get_user()	Clément Léger	1	-1/+1
2025-05-08	riscv: misaligned: enable IRQs while handling misaligned accesses	Clément Léger	1	-4/+8
2025-05-08	riscv: misaligned: factorize trap handling	Clément Léger	1	-30/+36
2025-05-05	riscv: misaligned: Add handling for ZCB instructions	Nylon Chen	1	-0/+17
2025-04-29	riscv: entry: Split ret_from_fork() into user and kernel	Charlie Jenkins	2	-9/+21
2025-04-29	riscv: entry: Convert ret_from_fork() to C	Charlie Jenkins	2	-11/+18