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-rw-r--r--arch/arm/mach-davinci/Kconfig16
-rw-r--r--arch/arm/mach-davinci/Makefile9
-rw-r--r--arch/arm/mach-davinci/asp.h57
-rw-r--r--arch/arm/mach-davinci/common.h7
-rw-r--r--arch/arm/mach-davinci/cputype.h21
-rw-r--r--arch/arm/mach-davinci/da830.c274
-rw-r--r--arch/arm/mach-davinci/da850.c400
-rw-r--r--arch/arm/mach-davinci/da8xx.h95
-rw-r--r--arch/arm/mach-davinci/davinci.h136
-rw-r--r--arch/arm/mach-davinci/devices-da8xx.c1095
-rw-r--r--arch/arm/mach-davinci/irqs.h217
-rw-r--r--arch/arm/mach-davinci/mux.c15
-rw-r--r--arch/arm/mach-davinci/mux.h315
-rw-r--r--arch/arm/mach-davinci/psc.h64
-rw-r--r--arch/arm/mach-davinci/serial.c88
-rw-r--r--arch/arm/mach-davinci/serial.h35
-rw-r--r--arch/arm/mach-davinci/usb-da8xx.c146
-rw-r--r--arch/arm/mach-davinci/usb.c74
18 files changed, 11 insertions, 3053 deletions
diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig
index 588213583051..4316e1370627 100644
--- a/arch/arm/mach-davinci/Kconfig
+++ b/arch/arm/mach-davinci/Kconfig
@@ -18,8 +18,6 @@ comment "DaVinci Core Type"
config ARCH_DAVINCI_DA830
bool "DA830/OMAP-L137/AM17x based system"
- depends on AUTO_ZRELADDR && ARM_PATCH_PHYS_VIRT
- depends on ATAGS
select ARCH_DAVINCI_DA8XX
# needed on silicon revs 1.0, 1.1:
select CPU_DCACHE_WRITETHROUGH if !CPU_DCACHE_DISABLE
@@ -27,25 +25,11 @@ config ARCH_DAVINCI_DA830
config ARCH_DAVINCI_DA850
bool "DA850/OMAP-L138/AM18x based system"
- depends on AUTO_ZRELADDR && ARM_PATCH_PHYS_VIRT
- depends on ATAGS
- select ARCH_DAVINCI_DA8XX
select DAVINCI_CP_INTC
config ARCH_DAVINCI_DA8XX
bool
-comment "DaVinci Board Type"
-
-config MACH_DA8XX_DT
- bool "Support DA8XX platforms using device tree"
- default y
- depends on ARCH_DAVINCI_DA850
- select PINCTRL
- help
- Say y here to include support for TI DaVinci DA850 based using
- Flattened Device Tree. More information at Documentation/devicetree
-
config DAVINCI_MUX
bool "DAVINCI multiplexing support"
depends on ARCH_DAVINCI
diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile
index 5b15a3bbf909..450883ea0e73 100644
--- a/arch/arm/mach-davinci/Makefile
+++ b/arch/arm/mach-davinci/Makefile
@@ -5,16 +5,15 @@
#
#
# Common objects
-obj-y := serial.o usb.o common.o sram.o
+obj-y := common.o sram.o devices-da8xx.o
obj-$(CONFIG_DAVINCI_MUX) += mux.o
# Chip specific
-obj-$(CONFIG_ARCH_DAVINCI_DA830) += da830.o devices-da8xx.o usb-da8xx.o
-obj-$(CONFIG_ARCH_DAVINCI_DA850) += da850.o devices-da8xx.o usb-da8xx.o
+obj-$(CONFIG_ARCH_DAVINCI_DA830) += da830.o
+obj-$(CONFIG_ARCH_DAVINCI_DA850) += da850.o pdata-quirks.o
-# Board specific
-obj-$(CONFIG_MACH_DA8XX_DT) += da8xx-dt.o pdata-quirks.o
+obj-y += da8xx-dt.o
# Power Management
obj-$(CONFIG_CPU_IDLE) += cpuidle.o
diff --git a/arch/arm/mach-davinci/asp.h b/arch/arm/mach-davinci/asp.h
deleted file mode 100644
index d0ecd1d0f084..000000000000
--- a/arch/arm/mach-davinci/asp.h
+++ /dev/null
@@ -1,57 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * TI DaVinci Audio definitions
- */
-#ifndef __ASM_ARCH_DAVINCI_ASP_H
-#define __ASM_ARCH_DAVINCI_ASP_H
-
-/* Bases of dm644x and dm355 register banks */
-#define DAVINCI_ASP0_BASE 0x01E02000
-#define DAVINCI_ASP1_BASE 0x01E04000
-
-/* Bases of dm365 register banks */
-#define DAVINCI_DM365_ASP0_BASE 0x01D02000
-
-/* Bases of dm646x register banks */
-#define DAVINCI_DM646X_MCASP0_REG_BASE 0x01D01000
-#define DAVINCI_DM646X_MCASP1_REG_BASE 0x01D01800
-
-/* Bases of da850/da830 McASP0 register banks */
-#define DAVINCI_DA8XX_MCASP0_REG_BASE 0x01D00000
-
-/* Bases of da830 McASP1 register banks */
-#define DAVINCI_DA830_MCASP1_REG_BASE 0x01D04000
-
-/* Bases of da830 McASP2 register banks */
-#define DAVINCI_DA830_MCASP2_REG_BASE 0x01D08000
-
-/* EDMA channels of dm644x and dm355 */
-#define DAVINCI_DMA_ASP0_TX 2
-#define DAVINCI_DMA_ASP0_RX 3
-#define DAVINCI_DMA_ASP1_TX 8
-#define DAVINCI_DMA_ASP1_RX 9
-
-/* EDMA channels of dm646x */
-#define DAVINCI_DM646X_DMA_MCASP0_AXEVT0 6
-#define DAVINCI_DM646X_DMA_MCASP0_AREVT0 9
-#define DAVINCI_DM646X_DMA_MCASP1_AXEVT1 12
-
-/* EDMA channels of da850/da830 McASP0 */
-#define DAVINCI_DA8XX_DMA_MCASP0_AREVT 0
-#define DAVINCI_DA8XX_DMA_MCASP0_AXEVT 1
-
-/* EDMA channels of da830 McASP1 */
-#define DAVINCI_DA830_DMA_MCASP1_AREVT 2
-#define DAVINCI_DA830_DMA_MCASP1_AXEVT 3
-
-/* EDMA channels of da830 McASP2 */
-#define DAVINCI_DA830_DMA_MCASP2_AREVT 4
-#define DAVINCI_DA830_DMA_MCASP2_AXEVT 5
-
-/* Interrupts */
-#define DAVINCI_ASP0_RX_INT DAVINCI_INTC_IRQ(IRQ_MBRINT)
-#define DAVINCI_ASP0_TX_INT DAVINCI_INTC_IRQ(IRQ_MBXINT)
-#define DAVINCI_ASP1_RX_INT DAVINCI_INTC_IRQ(IRQ_MBRINT)
-#define DAVINCI_ASP1_TX_INT DAVINCI_INTC_IRQ(IRQ_MBXINT)
-
-#endif /* __ASM_ARCH_DAVINCI_ASP_H */
diff --git a/arch/arm/mach-davinci/common.h b/arch/arm/mach-davinci/common.h
index 772b51e0ac5e..b4fd0e9acf6c 100644
--- a/arch/arm/mach-davinci/common.h
+++ b/arch/arm/mach-davinci/common.h
@@ -17,8 +17,8 @@
#include <asm/irq.h>
-#define DAVINCI_INTC_START NR_IRQS
-#define DAVINCI_INTC_IRQ(_irqnum) (DAVINCI_INTC_START + (_irqnum))
+#define DAVINCI_INTC_START NR_IRQS
+#define DAVINCI_INTC_IRQ(_irqnum) (DAVINCI_INTC_START + (_irqnum))
struct davinci_gpio_controller;
@@ -45,9 +45,6 @@ struct davinci_soc_info {
unsigned gpio_num;
unsigned gpio_irq;
unsigned gpio_unbanked;
- struct davinci_gpio_controller *gpio_ctlrs;
- int gpio_ctlrs_num;
- struct emac_platform_data *emac_pdata;
dma_addr_t sram_dma;
unsigned sram_len;
};
diff --git a/arch/arm/mach-davinci/cputype.h b/arch/arm/mach-davinci/cputype.h
index 87ee56068a16..148a738391dc 100644
--- a/arch/arm/mach-davinci/cputype.h
+++ b/arch/arm/mach-davinci/cputype.h
@@ -28,25 +28,4 @@ struct davinci_id {
#define DAVINCI_CPU_ID_DA830 0x08300000
#define DAVINCI_CPU_ID_DA850 0x08500000
-#define IS_DAVINCI_CPU(type, id) \
-static inline int is_davinci_ ##type(void) \
-{ \
- return (davinci_soc_info.cpu_id == (id)); \
-}
-
-IS_DAVINCI_CPU(da830, DAVINCI_CPU_ID_DA830)
-IS_DAVINCI_CPU(da850, DAVINCI_CPU_ID_DA850)
-
-#ifdef CONFIG_ARCH_DAVINCI_DA830
-#define cpu_is_davinci_da830() is_davinci_da830()
-#else
-#define cpu_is_davinci_da830() 0
-#endif
-
-#ifdef CONFIG_ARCH_DAVINCI_DA850
-#define cpu_is_davinci_da850() is_davinci_da850()
-#else
-#define cpu_is_davinci_da850() 0
-#endif
-
#endif
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
index eab5fac18806..2e497745b624 100644
--- a/arch/arm/mach-davinci/da830.c
+++ b/arch/arm/mach-davinci/da830.c
@@ -12,7 +12,6 @@
#include <linux/init.h>
#include <linux/io.h>
#include <linux/irqchip/irq-davinci-cp-intc.h>
-#include <linux/platform_data/gpio-davinci.h>
#include <clocksource/timer-davinci.h>
@@ -448,181 +447,6 @@ static const struct mux_config da830_pins[] = {
#endif
};
-const short da830_emif25_pins[] __initconst = {
- DA830_EMA_D_0, DA830_EMA_D_1, DA830_EMA_D_2, DA830_EMA_D_3,
- DA830_EMA_D_4, DA830_EMA_D_5, DA830_EMA_D_6, DA830_EMA_D_7,
- DA830_EMA_D_8, DA830_EMA_D_9, DA830_EMA_D_10, DA830_EMA_D_11,
- DA830_EMA_D_12, DA830_EMA_D_13, DA830_EMA_D_14, DA830_EMA_D_15,
- DA830_EMA_A_0, DA830_EMA_A_1, DA830_EMA_A_2, DA830_EMA_A_3,
- DA830_EMA_A_4, DA830_EMA_A_5, DA830_EMA_A_6, DA830_EMA_A_7,
- DA830_EMA_A_8, DA830_EMA_A_9, DA830_EMA_A_10, DA830_EMA_A_11,
- DA830_EMA_A_12, DA830_EMA_BA_0, DA830_EMA_BA_1, DA830_EMA_CLK,
- DA830_EMA_SDCKE, DA830_NEMA_CS_4, DA830_NEMA_CS_5, DA830_NEMA_WE,
- DA830_NEMA_CS_0, DA830_NEMA_CS_2, DA830_NEMA_CS_3, DA830_NEMA_OE,
- DA830_NEMA_WE_DQM_1, DA830_NEMA_WE_DQM_0, DA830_EMA_WAIT_0,
- -1
-};
-
-const short da830_spi0_pins[] __initconst = {
- DA830_SPI0_SOMI_0, DA830_SPI0_SIMO_0, DA830_SPI0_CLK, DA830_NSPI0_ENA,
- DA830_NSPI0_SCS_0,
- -1
-};
-
-const short da830_spi1_pins[] __initconst = {
- DA830_SPI1_SOMI_0, DA830_SPI1_SIMO_0, DA830_SPI1_CLK, DA830_NSPI1_ENA,
- DA830_NSPI1_SCS_0,
- -1
-};
-
-const short da830_mmc_sd_pins[] __initconst = {
- DA830_MMCSD_DAT_0, DA830_MMCSD_DAT_1, DA830_MMCSD_DAT_2,
- DA830_MMCSD_DAT_3, DA830_MMCSD_DAT_4, DA830_MMCSD_DAT_5,
- DA830_MMCSD_DAT_6, DA830_MMCSD_DAT_7, DA830_MMCSD_CLK,
- DA830_MMCSD_CMD,
- -1
-};
-
-const short da830_uart0_pins[] __initconst = {
- DA830_NUART0_CTS, DA830_NUART0_RTS, DA830_UART0_RXD, DA830_UART0_TXD,
- -1
-};
-
-const short da830_uart1_pins[] __initconst = {
- DA830_UART1_RXD, DA830_UART1_TXD,
- -1
-};
-
-const short da830_uart2_pins[] __initconst = {
- DA830_UART2_RXD, DA830_UART2_TXD,
- -1
-};
-
-const short da830_usb20_pins[] __initconst = {
- DA830_USB0_DRVVBUS, DA830_USB_REFCLKIN,
- -1
-};
-
-const short da830_usb11_pins[] __initconst = {
- DA830_USB_REFCLKIN,
- -1
-};
-
-const short da830_uhpi_pins[] __initconst = {
- DA830_UHPI_HD_0, DA830_UHPI_HD_1, DA830_UHPI_HD_2, DA830_UHPI_HD_3,
- DA830_UHPI_HD_4, DA830_UHPI_HD_5, DA830_UHPI_HD_6, DA830_UHPI_HD_7,
- DA830_UHPI_HD_8, DA830_UHPI_HD_9, DA830_UHPI_HD_10, DA830_UHPI_HD_11,
- DA830_UHPI_HD_12, DA830_UHPI_HD_13, DA830_UHPI_HD_14, DA830_UHPI_HD_15,
- DA830_UHPI_HCNTL0, DA830_UHPI_HCNTL1, DA830_UHPI_HHWIL, DA830_UHPI_HRNW,
- DA830_NUHPI_HAS, DA830_NUHPI_HCS, DA830_NUHPI_HDS1, DA830_NUHPI_HDS2,
- DA830_NUHPI_HINT, DA830_NUHPI_HRDY,
- -1
-};
-
-const short da830_cpgmac_pins[] __initconst = {
- DA830_RMII_TXD_0, DA830_RMII_TXD_1, DA830_RMII_TXEN, DA830_RMII_CRS_DV,
- DA830_RMII_RXD_0, DA830_RMII_RXD_1, DA830_RMII_RXER, DA830_MDIO_CLK,
- DA830_MDIO_D,
- -1
-};
-
-const short da830_emif3c_pins[] __initconst = {
- DA830_EMB_SDCKE, DA830_EMB_CLK_GLUE, DA830_EMB_CLK, DA830_NEMB_CS_0,
- DA830_NEMB_CAS, DA830_NEMB_RAS, DA830_NEMB_WE, DA830_EMB_BA_1,
- DA830_EMB_BA_0, DA830_EMB_A_0, DA830_EMB_A_1, DA830_EMB_A_2,
- DA830_EMB_A_3, DA830_EMB_A_4, DA830_EMB_A_5, DA830_EMB_A_6,
- DA830_EMB_A_7, DA830_EMB_A_8, DA830_EMB_A_9, DA830_EMB_A_10,
- DA830_EMB_A_11, DA830_EMB_A_12, DA830_NEMB_WE_DQM_3,
- DA830_NEMB_WE_DQM_2, DA830_EMB_D_0, DA830_EMB_D_1, DA830_EMB_D_2,
- DA830_EMB_D_3, DA830_EMB_D_4, DA830_EMB_D_5, DA830_EMB_D_6,
- DA830_EMB_D_7, DA830_EMB_D_8, DA830_EMB_D_9, DA830_EMB_D_10,
- DA830_EMB_D_11, DA830_EMB_D_12, DA830_EMB_D_13, DA830_EMB_D_14,
- DA830_EMB_D_15, DA830_EMB_D_16, DA830_EMB_D_17, DA830_EMB_D_18,
- DA830_EMB_D_19, DA830_EMB_D_20, DA830_EMB_D_21, DA830_EMB_D_22,
- DA830_EMB_D_23, DA830_EMB_D_24, DA830_EMB_D_25, DA830_EMB_D_26,
- DA830_EMB_D_27, DA830_EMB_D_28, DA830_EMB_D_29, DA830_EMB_D_30,
- DA830_EMB_D_31, DA830_NEMB_WE_DQM_1, DA830_NEMB_WE_DQM_0,
- -1
-};
-
-const short da830_mcasp0_pins[] __initconst = {
- DA830_AHCLKX0, DA830_ACLKX0, DA830_AFSX0,
- DA830_AHCLKR0, DA830_ACLKR0, DA830_AFSR0, DA830_AMUTE0,
- DA830_AXR0_0, DA830_AXR0_1, DA830_AXR0_2, DA830_AXR0_3,
- DA830_AXR0_4, DA830_AXR0_5, DA830_AXR0_6, DA830_AXR0_7,
- DA830_AXR0_8, DA830_AXR0_9, DA830_AXR0_10, DA830_AXR0_11,
- DA830_AXR0_12, DA830_AXR0_13, DA830_AXR0_14, DA830_AXR0_15,
- -1
-};
-
-const short da830_mcasp1_pins[] __initconst = {
- DA830_AHCLKX1, DA830_ACLKX1, DA830_AFSX1,
- DA830_AHCLKR1, DA830_ACLKR1, DA830_AFSR1, DA830_AMUTE1,
- DA830_AXR1_0, DA830_AXR1_1, DA830_AXR1_2, DA830_AXR1_3,
- DA830_AXR1_4, DA830_AXR1_5, DA830_AXR1_6, DA830_AXR1_7,
- DA830_AXR1_8, DA830_AXR1_9, DA830_AXR1_10, DA830_AXR1_11,
- -1
-};
-
-const short da830_mcasp2_pins[] __initconst = {
- DA830_AHCLKX2, DA830_ACLKX2, DA830_AFSX2,
- DA830_AHCLKR2, DA830_ACLKR2, DA830_AFSR2, DA830_AMUTE2,
- DA830_AXR2_0, DA830_AXR2_1, DA830_AXR2_2, DA830_AXR2_3,
- -1
-};
-
-const short da830_i2c0_pins[] __initconst = {
- DA830_I2C0_SDA, DA830_I2C0_SCL,
- -1
-};
-
-const short da830_i2c1_pins[] __initconst = {
- DA830_I2C1_SCL, DA830_I2C1_SDA,
- -1
-};
-
-const short da830_lcdcntl_pins[] __initconst = {
- DA830_LCD_D_0, DA830_LCD_D_1, DA830_LCD_D_2, DA830_LCD_D_3,
- DA830_LCD_D_4, DA830_LCD_D_5, DA830_LCD_D_6, DA830_LCD_D_7,
- DA830_LCD_D_8, DA830_LCD_D_9, DA830_LCD_D_10, DA830_LCD_D_11,
- DA830_LCD_D_12, DA830_LCD_D_13, DA830_LCD_D_14, DA830_LCD_D_15,
- DA830_LCD_PCLK, DA830_LCD_HSYNC, DA830_LCD_VSYNC, DA830_NLCD_AC_ENB_CS,
- DA830_LCD_MCLK,
- -1
-};
-
-const short da830_pwm_pins[] __initconst = {
- DA830_ECAP0_APWM0, DA830_ECAP1_APWM1, DA830_EPWM0B, DA830_EPWM0A,
- DA830_EPWMSYNCI, DA830_EPWMSYNC0, DA830_ECAP2_APWM2, DA830_EHRPWMGLUETZ,
- DA830_EPWM2B, DA830_EPWM2A, DA830_EPWM1B, DA830_EPWM1A,
- -1
-};
-
-const short da830_ecap0_pins[] __initconst = {
- DA830_ECAP0_APWM0,
- -1
-};
-
-const short da830_ecap1_pins[] __initconst = {
- DA830_ECAP1_APWM1,
- -1
-};
-
-const short da830_ecap2_pins[] __initconst = {
- DA830_ECAP2_APWM2,
- -1
-};
-
-const short da830_eqep0_pins[] __initconst = {
- DA830_EQEP0I, DA830_EQEP0S, DA830_EQEP0A, DA830_EQEP0B,
- -1
-};
-
-const short da830_eqep1_pins[] __initconst = {
- DA830_EQEP1I, DA830_EQEP1S, DA830_EQEP1A, DA830_EQEP1B,
- -1
-};
-
static struct map_desc da830_io_desc[] = {
{
.virtual = IO_VIRT,
@@ -663,30 +487,6 @@ static struct davinci_id da830_ids[] = {
},
};
-static struct davinci_gpio_platform_data da830_gpio_platform_data = {
- .no_auto_base = true,
- .base = 0,
- .ngpio = 128,
-};
-
-int __init da830_register_gpio(void)
-{
- return da8xx_register_gpio(&da830_gpio_platform_data);
-}
-
-/*
- * Bottom half of timer0 is used both for clock even and clocksource.
- * Top half is used by DSP.
- */
-static const struct davinci_timer_cfg da830_timer_cfg = {
- .reg = DEFINE_RES_IO(DA8XX_TIMER64P0_BASE, SZ_4K),
- .irq = {
- DEFINE_RES_IRQ(DAVINCI_INTC_IRQ(IRQ_DA830_T12CMPINT0_0)),
- DEFINE_RES_IRQ(DAVINCI_INTC_IRQ(IRQ_DA8XX_TINT12_0)),
- },
- .cmp_off = DA830_CMP12_0,
-};
-
static const struct davinci_soc_info davinci_soc_info_da830 = {
.io_desc = da830_io_desc,
.io_desc_num = ARRAY_SIZE(da830_io_desc),
@@ -696,7 +496,6 @@ static const struct davinci_soc_info davinci_soc_info_da830 = {
.pinmux_base = DA8XX_SYSCFG0_BASE + 0x120,
.pinmux_pins = da830_pins,
.pinmux_pins_num = ARRAY_SIZE(da830_pins),
- .emac_pdata = &da8xx_emac_pdata,
};
void __init da830_init(void)
@@ -706,76 +505,3 @@ void __init da830_init(void)
da8xx_syscfg0_base = ioremap(DA8XX_SYSCFG0_BASE, SZ_4K);
WARN(!da8xx_syscfg0_base, "Unable to map syscfg0 module");
}
-
-static const struct davinci_cp_intc_config da830_cp_intc_config = {
- .reg = {
- .start = DA8XX_CP_INTC_BASE,
- .end = DA8XX_CP_INTC_BASE + SZ_8K - 1,
- .flags = IORESOURCE_MEM,
- },
- .num_irqs = DA830_N_CP_INTC_IRQ,
-};
-
-void __init da830_init_irq(void)
-{
- davinci_cp_intc_init(&da830_cp_intc_config);
-}
-
-void __init da830_init_time(void)
-{
- void __iomem *pll;
- struct clk *clk;
- int rv;
-
- clk_register_fixed_rate(NULL, "ref_clk", NULL, 0, DA830_REF_FREQ);
-
- pll = ioremap(DA8XX_PLL0_BASE, SZ_4K);
-
- da830_pll_init(NULL, pll, NULL);
-
- clk = clk_get(NULL, "timer0");
- if (WARN_ON(IS_ERR(clk))) {
- pr_err("Unable to get the timer clock\n");
- return;
- }
-
- rv = davinci_timer_register(clk, &da830_timer_cfg);
- WARN(rv, "Unable to register the timer: %d\n", rv);
-}
-
-static struct resource da830_psc0_resources[] = {
- {
- .start = DA8XX_PSC0_BASE,
- .end = DA8XX_PSC0_BASE + SZ_4K - 1,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device da830_psc0_device = {
- .name = "da830-psc0",
- .id = -1,
- .resource = da830_psc0_resources,
- .num_resources = ARRAY_SIZE(da830_psc0_resources),
-};
-
-static struct resource da830_psc1_resources[] = {
- {
- .start = DA8XX_PSC1_BASE,
- .end = DA8XX_PSC1_BASE + SZ_4K - 1,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device da830_psc1_device = {
- .name = "da830-psc1",
- .id = -1,
- .resource = da830_psc1_resources,
- .num_resources = ARRAY_SIZE(da830_psc1_resources),
-};
-
-void __init da830_register_clocks(void)
-{
- /* PLL is registered in da830_init_time() */
- platform_device_register(&da830_psc0_device);
- platform_device_register(&da830_psc1_device);
-}
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 635e88daf5dd..287dd987908e 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -10,19 +10,10 @@
* 2009 (c) MontaVista Software, Inc.
*/
-#include <linux/clk-provider.h>
-#include <linux/clk/davinci.h>
-#include <linux/clkdev.h>
-#include <linux/cpufreq.h>
#include <linux/gpio.h>
#include <linux/init.h>
#include <linux/io.h>
-#include <linux/irqchip/irq-davinci-cp-intc.h>
#include <linux/mfd/da8xx-cfgchip.h>
-#include <linux/platform_data/clk-da8xx-cfgchip.h>
-#include <linux/platform_data/clk-davinci-pll.h>
-#include <linux/platform_data/davinci-cpufreq.h>
-#include <linux/platform_data/gpio-davinci.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>
#include <linux/regulator/consumer.h>
@@ -33,6 +24,7 @@
#include "common.h"
#include "cputype.h"
#include "da8xx.h"
+#include "hardware.h"
#include "pm.h"
#include "irqs.h"
#include "mux.h"
@@ -258,45 +250,6 @@ static const struct mux_config da850_pins[] = {
#endif
};
-const short da850_i2c0_pins[] __initconst = {
- DA850_I2C0_SDA, DA850_I2C0_SCL,
- -1
-};
-
-const short da850_i2c1_pins[] __initconst = {
- DA850_I2C1_SCL, DA850_I2C1_SDA,
- -1
-};
-
-const short da850_lcdcntl_pins[] __initconst = {
- DA850_LCD_D_0, DA850_LCD_D_1, DA850_LCD_D_2, DA850_LCD_D_3,
- DA850_LCD_D_4, DA850_LCD_D_5, DA850_LCD_D_6, DA850_LCD_D_7,
- DA850_LCD_D_8, DA850_LCD_D_9, DA850_LCD_D_10, DA850_LCD_D_11,
- DA850_LCD_D_12, DA850_LCD_D_13, DA850_LCD_D_14, DA850_LCD_D_15,
- DA850_LCD_PCLK, DA850_LCD_HSYNC, DA850_LCD_VSYNC, DA850_NLCD_AC_ENB_CS,
- -1
-};
-
-const short da850_vpif_capture_pins[] __initconst = {
- DA850_VPIF_DIN0, DA850_VPIF_DIN1, DA850_VPIF_DIN2, DA850_VPIF_DIN3,
- DA850_VPIF_DIN4, DA850_VPIF_DIN5, DA850_VPIF_DIN6, DA850_VPIF_DIN7,
- DA850_VPIF_DIN8, DA850_VPIF_DIN9, DA850_VPIF_DIN10, DA850_VPIF_DIN11,
- DA850_VPIF_DIN12, DA850_VPIF_DIN13, DA850_VPIF_DIN14, DA850_VPIF_DIN15,
- DA850_VPIF_CLKIN0, DA850_VPIF_CLKIN1, DA850_VPIF_CLKIN2,
- DA850_VPIF_CLKIN3,
- -1
-};
-
-const short da850_vpif_display_pins[] __initconst = {
- DA850_VPIF_DOUT0, DA850_VPIF_DOUT1, DA850_VPIF_DOUT2, DA850_VPIF_DOUT3,
- DA850_VPIF_DOUT4, DA850_VPIF_DOUT5, DA850_VPIF_DOUT6, DA850_VPIF_DOUT7,
- DA850_VPIF_DOUT8, DA850_VPIF_DOUT9, DA850_VPIF_DOUT10,
- DA850_VPIF_DOUT11, DA850_VPIF_DOUT12, DA850_VPIF_DOUT13,
- DA850_VPIF_DOUT14, DA850_VPIF_DOUT15, DA850_VPIF_CLKO2,
- DA850_VPIF_CLKO3,
- -1
-};
-
static struct map_desc da850_io_desc[] = {
{
.virtual = IO_VIRT,
@@ -330,204 +283,9 @@ static struct davinci_id da850_ids[] = {
},
};
-/*
- * Bottom half of timer 0 is used for clock_event, top half for
- * clocksource.
- */
-static const struct davinci_timer_cfg da850_timer_cfg = {
- .reg = DEFINE_RES_IO(DA8XX_TIMER64P0_BASE, SZ_4K),
- .irq = {
- DEFINE_RES_IRQ(DAVINCI_INTC_IRQ(IRQ_DA8XX_TINT12_0)),
- DEFINE_RES_IRQ(DAVINCI_INTC_IRQ(IRQ_DA8XX_TINT34_0)),
- },
-};
-
-#ifdef CONFIG_CPU_FREQ
-/*
- * Notes:
- * According to the TRM, minimum PLLM results in maximum power savings.
- * The OPP definitions below should keep the PLLM as low as possible.
- *
- * The output of the PLLM must be between 300 to 600 MHz.
- */
-struct da850_opp {
- unsigned int freq; /* in KHz */
- unsigned int prediv;
- unsigned int mult;
- unsigned int postdiv;
- unsigned int cvdd_min; /* in uV */
- unsigned int cvdd_max; /* in uV */
-};
-
-static const struct da850_opp da850_opp_456 = {
- .freq = 456000,
- .prediv = 1,
- .mult = 19,
- .postdiv = 1,
- .cvdd_min = 1300000,
- .cvdd_max = 1350000,
-};
-
-static const struct da850_opp da850_opp_408 = {
- .freq = 408000,
- .prediv = 1,
- .mult = 17,
- .postdiv = 1,
- .cvdd_min = 1300000,
- .cvdd_max = 1350000,
-};
-
-static const struct da850_opp da850_opp_372 = {
- .freq = 372000,
- .prediv = 2,
- .mult = 31,
- .postdiv = 1,
- .cvdd_min = 1200000,
- .cvdd_max = 1320000,
-};
-
-static const struct da850_opp da850_opp_300 = {
- .freq = 300000,
- .prediv = 1,
- .mult = 25,
- .postdiv = 2,
- .cvdd_min = 1200000,
- .cvdd_max = 1320000,
-};
-
-static const struct da850_opp da850_opp_200 = {
- .freq = 200000,
- .prediv = 1,
- .mult = 25,
- .postdiv = 3,
- .cvdd_min = 1100000,
- .cvdd_max = 1160000,
-};
-
-static const struct da850_opp da850_opp_96 = {
- .freq = 96000,
- .prediv = 1,
- .mult = 20,
- .postdiv = 5,
- .cvdd_min = 1000000,
- .cvdd_max = 1050000,
-};
-
-#define OPP(freq) \
- { \
- .driver_data = (unsigned int) &da850_opp_##freq, \
- .frequency = freq * 1000, \
- }
-
-static struct cpufreq_frequency_table da850_freq_table[] = {
- OPP(456),
- OPP(408),
- OPP(372),
- OPP(300),
- OPP(200),
- OPP(96),
- {
- .driver_data = 0,
- .frequency = CPUFREQ_TABLE_END,
- },
-};
-
-#ifdef CONFIG_REGULATOR
-static int da850_set_voltage(unsigned int index);
-static int da850_regulator_init(void);
-#endif
-
-static struct davinci_cpufreq_config cpufreq_info = {
- .freq_table = da850_freq_table,
-#ifdef CONFIG_REGULATOR
- .init = da850_regulator_init,
- .set_voltage = da850_set_voltage,
-#endif
-};
-
-#ifdef CONFIG_REGULATOR
-static struct regulator *cvdd;
-
-static int da850_set_voltage(unsigned int index)
-{
- struct da850_opp *opp;
-
- if (!cvdd)
- return -ENODEV;
-
- opp = (struct da850_opp *) cpufreq_info.freq_table[index].driver_data;
-
- return regulator_set_voltage(cvdd, opp->cvdd_min, opp->cvdd_max);
-}
-
-static int da850_regulator_init(void)
-{
- cvdd = regulator_get(NULL, "cvdd");
- if (WARN(IS_ERR(cvdd), "Unable to obtain voltage regulator for CVDD;"
- " voltage scaling unsupported\n")) {
- return PTR_ERR(cvdd);
- }
-
- return 0;
-}
-#endif
-
-static struct platform_device da850_cpufreq_device = {
- .name = "cpufreq-davinci",
- .dev = {
- .platform_data = &cpufreq_info,
- },
- .id = -1,
-};
-
-unsigned int da850_max_speed = 300000;
-
-int da850_register_cpufreq(char *async_clk)
-{
- int i;
-
- /* cpufreq driver can help keep an "async" clock constant */
- if (async_clk)
- clk_add_alias("async", da850_cpufreq_device.name,
- async_clk, NULL);
- for (i = 0; i < ARRAY_SIZE(da850_freq_table); i++) {
- if (da850_freq_table[i].frequency <= da850_max_speed) {
- cpufreq_info.freq_table = &da850_freq_table[i];
- break;
- }
- }
-
- return platform_device_register(&da850_cpufreq_device);
-}
-#else
-int __init da850_register_cpufreq(char *async_clk)
-{
- return 0;
-}
-#endif
-
/* VPIF resource, platform data */
static u64 da850_vpif_dma_mask = DMA_BIT_MASK(32);
-static struct resource da850_vpif_resource[] = {
- {
- .start = DA8XX_VPIF_BASE,
- .end = DA8XX_VPIF_BASE + 0xfff,
- .flags = IORESOURCE_MEM,
- }
-};
-
-static struct platform_device da850_vpif_dev = {
- .name = "vpif",
- .id = -1,
- .dev = {
- .dma_mask = &da850_vpif_dma_mask,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- },
- .resource = da850_vpif_resource,
- .num_resources = ARRAY_SIZE(da850_vpif_resource),
-};
-
static struct resource da850_vpif_display_resource[] = {
{
.start = DAVINCI_INTC_IRQ(IRQ_DA850_VPIFINT),
@@ -571,11 +329,6 @@ static struct platform_device da850_vpif_capture_dev = {
.num_resources = ARRAY_SIZE(da850_vpif_capture_resource),
};
-int __init da850_register_vpif(void)
-{
- return platform_device_register(&da850_vpif_dev);
-}
-
int __init da850_register_vpif_display(struct vpif_display_config
*display_config)
{
@@ -590,17 +343,6 @@ int __init da850_register_vpif_capture(struct vpif_capture_config
return platform_device_register(&da850_vpif_capture_dev);
}
-static struct davinci_gpio_platform_data da850_gpio_platform_data = {
- .no_auto_base = true,
- .base = 0,
- .ngpio = 144,
-};
-
-int __init da850_register_gpio(void)
-{
- return da8xx_register_gpio(&da850_gpio_platform_data);
-}
-
static const struct davinci_soc_info davinci_soc_info_da850 = {
.io_desc = da850_io_desc,
.io_desc_num = ARRAY_SIZE(da850_io_desc),
@@ -610,7 +352,6 @@ static const struct davinci_soc_info davinci_soc_info_da850 = {
.pinmux_base = DA8XX_SYSCFG0_BASE + 0x120,
.pinmux_pins = da850_pins,
.pinmux_pins_num = ARRAY_SIZE(da850_pins),
- .emac_pdata = &da8xx_emac_pdata,
.sram_dma = DA8XX_SHARED_RAM_BASE,
.sram_len = SZ_128K,
};
@@ -626,142 +367,3 @@ void __init da850_init(void)
da8xx_syscfg1_base = ioremap(DA8XX_SYSCFG1_BASE, SZ_4K);
WARN(!da8xx_syscfg1_base, "Unable to map syscfg1 module");
}
-
-static const struct davinci_cp_intc_config da850_cp_intc_config = {
- .reg = {
- .start = DA8XX_CP_INTC_BASE,
- .end = DA8XX_CP_INTC_BASE + SZ_8K - 1,
- .flags = IORESOURCE_MEM,
- },
- .num_irqs = DA850_N_CP_INTC_IRQ,
-};
-
-void __init da850_init_irq(void)
-{
- davinci_cp_intc_init(&da850_cp_intc_config);
-}
-
-void __init da850_init_time(void)
-{
- void __iomem *pll0;
- struct regmap *cfgchip;
- struct clk *clk;
- int rv;
-
- clk_register_fixed_rate(NULL, "ref_clk", NULL, 0, DA850_REF_FREQ);
-
- pll0 = ioremap(DA8XX_PLL0_BASE, SZ_4K);
- cfgchip = da8xx_get_cfgchip();
-
- da850_pll0_init(NULL, pll0, cfgchip);
-
- clk = clk_get(NULL, "timer0");
- if (WARN_ON(IS_ERR(clk))) {
- pr_err("Unable to get the timer clock\n");
- return;
- }
-
- rv = davinci_timer_register(clk, &da850_timer_cfg);
- WARN(rv, "Unable to register the timer: %d\n", rv);
-}
-
-static struct resource da850_pll1_resources[] = {
- {
- .start = DA850_PLL1_BASE,
- .end = DA850_PLL1_BASE + SZ_4K - 1,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct davinci_pll_platform_data da850_pll1_pdata;
-
-static struct platform_device da850_pll1_device = {
- .name = "da850-pll1",
- .id = -1,
- .resource = da850_pll1_resources,
- .num_resources = ARRAY_SIZE(da850_pll1_resources),
- .dev = {
- .platform_data = &da850_pll1_pdata,
- },
-};
-
-static struct resource da850_psc0_resources[] = {
- {
- .start = DA8XX_PSC0_BASE,
- .end = DA8XX_PSC0_BASE + SZ_4K - 1,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device da850_psc0_device = {
- .name = "da850-psc0",
- .id = -1,
- .resource = da850_psc0_resources,
- .num_resources = ARRAY_SIZE(da850_psc0_resources),
-};
-
-static struct resource da850_psc1_resources[] = {
- {
- .start = DA8XX_PSC1_BASE,
- .end = DA8XX_PSC1_BASE + SZ_4K - 1,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device da850_psc1_device = {
- .name = "da850-psc1",
- .id = -1,
- .resource = da850_psc1_resources,
- .num_resources = ARRAY_SIZE(da850_psc1_resources),
-};
-
-static struct da8xx_cfgchip_clk_platform_data da850_async1_pdata;
-
-static struct platform_device da850_async1_clksrc_device = {
- .name = "da850-async1-clksrc",
- .id = -1,
- .dev = {
- .platform_data = &da850_async1_pdata,
- },
-};
-
-static struct da8xx_cfgchip_clk_platform_data da850_async3_pdata;
-
-static struct platform_device da850_async3_clksrc_device = {
- .name = "da850-async3-clksrc",
- .id = -1,
- .dev = {
- .platform_data = &da850_async3_pdata,
- },
-};
-
-static struct da8xx_cfgchip_clk_platform_data da850_tbclksync_pdata;
-
-static struct platform_device da850_tbclksync_device = {
- .name = "da830-tbclksync",
- .id = -1,
- .dev = {
- .platform_data = &da850_tbclksync_pdata,
- },
-};
-
-void __init da850_register_clocks(void)
-{
- /* PLL0 is registered in da850_init_time() */
-
- da850_pll1_pdata.cfgchip = da8xx_get_cfgchip();
- platform_device_register(&da850_pll1_device);
-
- da850_async1_pdata.cfgchip = da8xx_get_cfgchip();
- platform_device_register(&da850_async1_clksrc_device);
-
- da850_async3_pdata.cfgchip = da8xx_get_cfgchip();
- platform_device_register(&da850_async3_clksrc_device);
-
- platform_device_register(&da850_psc0_device);
-
- platform_device_register(&da850_psc1_device);
-
- da850_tbclksync_pdata.cfgchip = da8xx_get_cfgchip();
- platform_device_register(&da850_tbclksync_device);
-}
diff --git a/arch/arm/mach-davinci/da8xx.h b/arch/arm/mach-davinci/da8xx.h
index 382811dbbc3b..54a255b8d8d8 100644
--- a/arch/arm/mach-davinci/da8xx.h
+++ b/arch/arm/mach-davinci/da8xx.h
@@ -9,39 +9,21 @@
#ifndef __ASM_ARCH_DAVINCI_DA8XX_H
#define __ASM_ARCH_DAVINCI_DA8XX_H
-#include <video/da8xx-fb.h>
-
+#include <linux/dma-mapping.h>
#include <linux/platform_device.h>
-#include <linux/davinci_emac.h>
-#include <linux/spi/spi.h>
-#include <linux/platform_data/davinci_asp.h>
+#include <linux/videodev2.h>
#include <linux/reboot.h>
#include <linux/regmap.h>
-#include <linux/videodev2.h>
-#include "serial.h"
+#include "hardware.h"
#include "pm.h"
-#include <linux/platform_data/edma.h>
-#include <linux/platform_data/i2c-davinci.h>
-#include <linux/platform_data/mmc-davinci.h>
-#include <linux/platform_data/usb-davinci.h>
-#include <linux/platform_data/spi-davinci.h>
-#include <linux/platform_data/uio_pruss.h>
-
#include <media/davinci/vpif_types.h>
extern void __iomem *da8xx_syscfg0_base;
extern void __iomem *da8xx_syscfg1_base;
/*
- * If the DA850/OMAP-L138/AM18x SoC on board is of a higher speed grade
- * (than the regular 300MHz variant), the board code should set this up
- * with the supported speed before calling da850_register_cpufreq().
- */
-extern unsigned int da850_max_speed;
-
-/*
* The cp_intc interrupt controller for the da8xx isn't in the same
* chunk of physical memory space as the other registers (like it is
* on the davincis) so it needs to be mapped separately. It will be
@@ -87,83 +69,14 @@ extern unsigned int da850_max_speed;
#define DA8XX_ARM_RAM_BASE 0xffff0000
void da830_init(void);
-void da830_init_irq(void);
-void da830_init_time(void);
-void da830_register_clocks(void);
void da850_init(void);
-void da850_init_irq(void);
-void da850_init_time(void);
-void da850_register_cl