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-rw-r--r--Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon7
-rw-r--r--drivers/gpu/drm/xe/Kconfig.profile71
-rw-r--r--drivers/gpu/drm/xe/Makefile1
-rw-r--r--drivers/gpu/drm/xe/tests/Makefile1
-rw-r--r--drivers/gpu/drm/xe/tests/xe_pci.c53
-rw-r--r--drivers/gpu/drm/xe/tests/xe_rtp_tables_test.c112
-rw-r--r--drivers/gpu/drm/xe/tests/xe_rtp_test.c52
-rw-r--r--drivers/gpu/drm/xe/tests/xe_wa_test.c3
-rw-r--r--drivers/gpu/drm/xe/xe_debugfs.c1
-rw-r--r--drivers/gpu/drm/xe/xe_device.c30
-rw-r--r--drivers/gpu/drm/xe/xe_device.h17
-rw-r--r--drivers/gpu/drm/xe/xe_device_types.h10
-rw-r--r--drivers/gpu/drm/xe/xe_drm_client.c5
-rw-r--r--drivers/gpu/drm/xe/xe_drm_ras.c41
-rw-r--r--drivers/gpu/drm/xe/xe_eu_stall.c5
-rw-r--r--drivers/gpu/drm/xe/xe_exec_queue_types.h2
-rw-r--r--drivers/gpu/drm/xe/xe_execlist.c7
-rw-r--r--drivers/gpu/drm/xe/xe_ggtt.c8
-rw-r--r--drivers/gpu/drm/xe/xe_gt.c14
-rw-r--r--drivers/gpu/drm/xe/xe_gt_mcr.c19
-rw-r--r--drivers/gpu/drm/xe/xe_guc_submit.c18
-rw-r--r--drivers/gpu/drm/xe/xe_guc_tlb_inval.c6
-rw-r--r--drivers/gpu/drm/xe/xe_hw_engine.c216
-rw-r--r--drivers/gpu/drm/xe/xe_hw_error.c23
-rw-r--r--drivers/gpu/drm/xe/xe_i2c.c3
-rw-r--r--drivers/gpu/drm/xe/xe_lrc.c8
-rw-r--r--drivers/gpu/drm/xe/xe_mmio.c98
-rw-r--r--drivers/gpu/drm/xe/xe_module.c3
-rw-r--r--drivers/gpu/drm/xe/xe_module.h1
-rw-r--r--drivers/gpu/drm/xe/xe_oa.c25
-rw-r--r--drivers/gpu/drm/xe/xe_observation.c32
-rw-r--r--drivers/gpu/drm/xe/xe_observation.h3
-rw-r--r--drivers/gpu/drm/xe/xe_pci.c174
-rw-r--r--drivers/gpu/drm/xe/xe_pci_error.c122
-rw-r--r--drivers/gpu/drm/xe/xe_pci_error.h13
-rw-r--r--drivers/gpu/drm/xe/xe_pci_types.h1
-rw-r--r--drivers/gpu/drm/xe/xe_pcode.c8
-rw-r--r--drivers/gpu/drm/xe/xe_pcode.h2
-rw-r--r--drivers/gpu/drm/xe/xe_pt.c20
-rw-r--r--drivers/gpu/drm/xe/xe_pxp.c35
-rw-r--r--drivers/gpu/drm/xe/xe_query.c7
-rw-r--r--drivers/gpu/drm/xe/xe_ras.c260
-rw-r--r--drivers/gpu/drm/xe/xe_ras.h5
-rw-r--r--drivers/gpu/drm/xe/xe_ras_types.h51
-rw-r--r--drivers/gpu/drm/xe/xe_reg_whitelist.c5
-rw-r--r--drivers/gpu/drm/xe/xe_reg_whitelist.h4
-rw-r--r--drivers/gpu/drm/xe/xe_rtp.c10
-rw-r--r--drivers/gpu/drm/xe/xe_rtp.h19
-rw-r--r--drivers/gpu/drm/xe/xe_rtp_types.h33
-rw-r--r--drivers/gpu/drm/xe/xe_step.c38
-rw-r--r--drivers/gpu/drm/xe/xe_step.h8
-rw-r--r--drivers/gpu/drm/xe/xe_sysctrl_mailbox.c28
-rw-r--r--drivers/gpu/drm/xe/xe_sysctrl_mailbox.h3
-rw-r--r--drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h4
-rw-r--r--drivers/gpu/drm/xe/xe_tile.c4
-rw-r--r--drivers/gpu/drm/xe/xe_tuning.c3
-rw-r--r--drivers/gpu/drm/xe/xe_tuning.h6
-rw-r--r--drivers/gpu/drm/xe/xe_vm_madvise.c19
-rw-r--r--drivers/gpu/drm/xe/xe_wa.c15
-rw-r--r--drivers/gpu/drm/xe/xe_wa.h7
-rw-r--r--drivers/gpu/drm/xe/xe_wa_oob.rules1
-rw-r--r--include/drm/intel/pciids.h5
-rw-r--r--include/linux/perf_event.h31
-rw-r--r--include/uapi/drm/xe_drm.h11
-rw-r--r--kernel/events/core.c18
65 files changed, 1432 insertions, 433 deletions
diff --git a/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon b/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon
index 55ab45f669ac..0da739d9a816 100644
--- a/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon
+++ b/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon
@@ -251,6 +251,13 @@ Description: RO. Fan 2 speed in RPM.
Only supported for particular Intel Xe graphics platforms.
+ On DG2 the driver always shows two fan channels, because the
+ FSC_READ_NUM_FANS command does not work on some cards. OEMs
+ decide how the fans map to tach channels, so two fans can share
+ one tach line. When that happens, the second channel
+ reads 0 RPM even though the fan is spinning. This is normal, not
+ a bug.
+
What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/fan3_input
Date: March 2025
KernelVersion: 6.16
diff --git a/drivers/gpu/drm/xe/Kconfig.profile b/drivers/gpu/drm/xe/Kconfig.profile
index 7530df998148..e07517d120e0 100644
--- a/drivers/gpu/drm/xe/Kconfig.profile
+++ b/drivers/gpu/drm/xe/Kconfig.profile
@@ -1,50 +1,71 @@
# SPDX-License-Identifier: GPL-2.0-only
config DRM_XE_JOB_TIMEOUT_MAX
- int "Default max job timeout (ms)"
+ int "Hard upper limit for job timeout (ms)"
default 10000 # milliseconds
help
- Configures the default max job timeout after which job will
- be forcefully taken away from scheduler.
+ Absolute upper bound (in milliseconds) for the per-engine-class job
+ timeout. This is the maximum value that can be written to the sysfs
+ job_timeout_ms knob, regardless of privileges. To raise this ceiling,
+ increase this value and rebuild the kernel.
config DRM_XE_JOB_TIMEOUT_MIN
- int "Default min job timeout (ms)"
+ int "Hard lower limit for job timeout (ms)"
default 1 # milliseconds
help
- Configures the default min job timeout after which job will
- be forcefully taken away from scheduler.
+ Absolute lower bound (in milliseconds) for the per-engine-class job
+ timeout. This is the minimum value that can be written to the sysfs
+ job_timeout_ms knob, regardless of privileges.
+
+ Note: the job timeout default (5000 ms) is hardcoded in the driver
+ and is not configurable here. Use the sysfs job_timeout_ms knob at
+ runtime to change the engine-class default.
config DRM_XE_TIMESLICE_MAX
- int "Default max timeslice duration (us)"
+ int "Hard upper limit for timeslice duration (us)"
default 10000000 # microseconds
help
- Configures the default max timeslice duration between multiple
- contexts by guc scheduling.
+ Absolute upper bound (in microseconds) for the timeslice duration.
+ This caps both the sysfs timeslice_duration_us knob and the value
+ accepted via the DRM_XE_EXEC_QUEUE_SET_PROPERTY_TIMESLICE UAPI for
+ processes with CAP_SYS_NICE when DRM_XE_ENABLE_SCHEDTIMEOUT_LIMIT
+ is enabled.
config DRM_XE_TIMESLICE_MIN
- int "Default min timeslice duration (us)"
+ int "Hard lower limit for timeslice duration (us)"
default 1 # microseconds
help
- Configures the default min timeslice duration between multiple
- contexts by guc scheduling.
+ Absolute lower bound (in microseconds) for the timeslice duration.
+ This caps both the sysfs timeslice_duration_us knob and the value
+ accepted via the DRM_XE_EXEC_QUEUE_SET_PROPERTY_TIMESLICE UAPI for
+ processes with CAP_SYS_NICE when DRM_XE_ENABLE_SCHEDTIMEOUT_LIMIT
+ is enabled.
config DRM_XE_PREEMPT_TIMEOUT
- int "Preempt timeout (us, jiffy granularity)"
+ int "Default preempt timeout (us, jiffy granularity)"
default 640000 # microseconds
help
- How long to wait (in microseconds) for a preemption event to occur
- when submitting a new context. If the current context does not hit
- an arbitration point and yield to HW before the timer expires, the
- HW will be reset to allow the more important context to execute.
+ Initial per-engine-class preemption timeout (in microseconds). This
+ is the value the driver programs at boot; it can be changed at
+ runtime via the sysfs preempt_timeout_us knob.
+
+ This is how long the driver waits for the current context to reach
+ an arbitration point and yield the GPU voluntarily when a
+ higher-priority context becomes runnable. If the context does not
+ yield before the timer expires, the HW is reset to allow the
+ higher-priority context to execute.
+
+ The range userspace may write via sysfs is bounded by
+ DRM_XE_PREEMPT_TIMEOUT_MIN and DRM_XE_PREEMPT_TIMEOUT_MAX.
config DRM_XE_PREEMPT_TIMEOUT_MAX
- int "Default max preempt timeout (us)"
+ int "Hard upper limit for preempt timeout (us)"
default 10000000 # microseconds
help
- Configures the default max preempt timeout after which context
- will be forcefully taken away and higher priority context will
- run.
+ Absolute upper bound (in microseconds) for the per-engine-class
+ preemption timeout. This is the maximum value that can be written to
+ the sysfs preempt_timeout_us knob, regardless of privileges.
config DRM_XE_PREEMPT_TIMEOUT_MIN
- int "Default min preempt timeout (us)"
+ int "Hard lower limit for preempt timeout (us)"
default 1 # microseconds
help
- Configures the default min preempt timeout after which context
- will be forcefully taken away and higher priority context will
- run.
+ Absolute lower bound (in microseconds) for the per-engine-class
+ preemption timeout. This is the minimum value that can be written to
+ the sysfs preempt_timeout_us knob, regardless of privileges.
config DRM_XE_ENABLE_SCHEDTIMEOUT_LIMIT
bool "Default configuration of limitation on scheduler timeout"
default y
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index e5a04253e73b..6d728f8c4c39 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -101,6 +101,7 @@ xe-y += xe_bb.o \
xe_page_reclaim.o \
xe_pat.o \
xe_pci.o \
+ xe_pci_error.o \
xe_pci_rebar.o \
xe_pcode.o \
xe_pm.o \
diff --git a/drivers/gpu/drm/xe/tests/Makefile b/drivers/gpu/drm/xe/tests/Makefile
index 0e3408f4952c..f7aa47f11a36 100644
--- a/drivers/gpu/drm/xe/tests/Makefile
+++ b/drivers/gpu/drm/xe/tests/Makefile
@@ -9,5 +9,6 @@ obj-$(CONFIG_DRM_XE_KUNIT_TEST) += xe_test.o
xe_test-y = xe_test_mod.o \
xe_args_test.o \
xe_pci_test.o \
+ xe_rtp_tables_test.o \
xe_rtp_test.o \
xe_wa_test.o
diff --git a/drivers/gpu/drm/xe/tests/xe_pci.c b/drivers/gpu/drm/xe/tests/xe_pci.c
index 9240aff779da..8df9029afcd3 100644
--- a/drivers/gpu/drm/xe/tests/xe_pci.c
+++ b/drivers/gpu/drm/xe/tests/xe_pci.c
@@ -311,40 +311,44 @@ const void *xe_pci_id_gen_param(struct kunit *test, const void *prev, char *desc
}
EXPORT_SYMBOL_IF_KUNIT(xe_pci_id_gen_param);
-static void fake_init_devid(struct xe_device *xe)
+static int fake_probe_info(struct xe_device *xe,
+ const struct xe_device_desc *desc,
+ struct xe_pci_fake_data *data,
+ struct xe_probed_info *probed_info)
{
- /* Nothing to do, just keep zero. */
-}
-
-static int fake_read_gmdid(struct xe_device *xe, enum xe_gmdid_type type,
- u32 *ver, u32 *revid)
-{
- struct kunit *test = kunit_get_current_test();
- struct xe_pci_fake_data *data = test->priv;
+ probed_info->tile_count = 1 + desc->max_remote_tiles;
- if (type == GMDID_MEDIA) {
- *ver = data->media_verx100;
- *revid = xe_step_to_gmdid(data->step.media);
+ if (!data || desc->pre_gmdid_graphics_ip) {
+ probed_info->graphics_ip = desc->pre_gmdid_graphics_ip;
+ probed_info->media_ip = desc->pre_gmdid_media_ip;
} else {
- *ver = data->graphics_verx100;
- *revid = xe_step_to_gmdid(data->step.graphics);
+ probed_info->graphics_ip = find_graphics_ip(data->graphics_verx100);
+
+ if (data->media_verx100) {
+ probed_info->media_ip = find_media_ip(data->media_verx100);
+ xe_assert(xe, probed_info->media_ip);
+ }
}
- return 0;
-}
+ xe_assert(xe, probed_info->graphics_ip);
+ if (!probed_info->graphics_ip)
+ return -ENODEV;
-static void fake_xe_info_probe_tile_count(struct xe_device *xe)
-{
- /* Nothing to do, just use the statically defined value. */
+ if (data)
+ probed_info->step = data->step;
+
+ return 0;
}
int xe_pci_fake_device_init(struct xe_device *xe)
{
struct kunit *test = kunit_get_current_test();
struct xe_pci_fake_data *data = test->priv;
+ struct xe_probed_info probed_info = {};
const struct pci_device_id *ent = pciidlist;
const struct xe_device_desc *desc;
const struct xe_subplatform_desc *subplatform_desc;
+ int err;
if (!data) {
desc = (const void *)ent->driver_data;
@@ -374,13 +378,12 @@ done:
xe->sriov.__mode = data && data->sriov_mode ?
data->sriov_mode : XE_SRIOV_MODE_NONE;
- kunit_activate_static_stub(test, init_devid, fake_init_devid);
- kunit_activate_static_stub(test, read_gmdid, fake_read_gmdid);
- kunit_activate_static_stub(test, xe_info_probe_tile_count,
- fake_xe_info_probe_tile_count);
+ err = fake_probe_info(xe, desc, data, &probed_info);
+ if (err)
+ return err;
- xe_info_init_early(xe, desc, subplatform_desc);
- xe_info_init(xe, desc);
+ xe_info_init_early(xe, desc, subplatform_desc, &probed_info);
+ xe_info_init(xe, desc, &probed_info);
return 0;
}
diff --git a/drivers/gpu/drm/xe/tests/xe_rtp_tables_test.c b/drivers/gpu/drm/xe/tests/xe_rtp_tables_test.c
new file mode 100644
index 000000000000..7e2fc39ac62c
--- /dev/null
+++ b/drivers/gpu/drm/xe/tests/xe_rtp_tables_test.c
@@ -0,0 +1,112 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#include <kunit/test.h>
+
+#include "xe_reg_whitelist.h"
+#include "xe_rtp_types.h"
+#include "xe_tuning.h"
+#include "xe_wa.h"
+
+#define RTP_TABLE_PARAM(table) \
+ static const void *table##_gen_params(struct kunit *test, \
+ const void *prev, char *desc) \
+ { \
+ typeof((table.entries)[0]) *__next = prev ? \
+ ((typeof(__next))prev) + 1 : (table.entries); \
+ if (__next - table.entries < table.n_entries) { \
+ scnprintf(desc, KUNIT_PARAM_DESC_SIZE, #table "/%s", __next->name); \
+ return __next; \
+ } \
+ return NULL; \
+ }
+
+static void xe_rtp_table_gt_test(struct kunit *test)
+{
+ const struct xe_rtp_entry_sr *entry = test->param_value;
+
+ for (int i = 0; i < entry->n_rules; i++) {
+ KUNIT_EXPECT_TRUE(test,
+ entry->rules[i].match_type != XE_RTP_MATCH_ENGINE_CLASS ||
+ entry->flags & XE_RTP_ENTRY_FLAG_FOREACH_ENGINE);
+ KUNIT_EXPECT_TRUE(test,
+ entry->rules[i].match_type != XE_RTP_MATCH_NOT_ENGINE_CLASS ||
+ entry->flags & XE_RTP_ENTRY_FLAG_FOREACH_ENGINE);
+ }
+}
+
+RTP_TABLE_PARAM(gt_was);
+RTP_TABLE_PARAM(gt_tunings);
+
+static void xe_rtp_table_oob_test(struct kunit *test)
+{
+ const struct xe_rtp_entry *entry = test->param_value;
+
+ for (int i = 0; i < entry->n_rules; i++) {
+ u8 match_type = entry->rules[i].match_type;
+
+ KUNIT_EXPECT_NE(test, match_type, XE_RTP_MATCH_ENGINE_CLASS);
+ KUNIT_EXPECT_NE(test, match_type, XE_RTP_MATCH_NOT_ENGINE_CLASS);
+ }
+}
+
+RTP_TABLE_PARAM(oob_was);
+
+static void xe_rtp_table_dev_oob_test(struct kunit *test)
+{
+ const struct xe_rtp_entry *entry = test->param_value;
+
+ for (int i = 0; i < entry->n_rules; i++) {
+ u8 match_type = entry->rules[i].match_type;
+
+ KUNIT_EXPECT_NE(test, match_type, XE_RTP_MATCH_ENGINE_CLASS);
+ KUNIT_EXPECT_NE(test, match_type, XE_RTP_MATCH_NOT_ENGINE_CLASS);
+ KUNIT_EXPECT_NE(test, match_type, XE_RTP_MATCH_GRAPHICS_VERSION);
+ KUNIT_EXPECT_NE(test, match_type, XE_RTP_MATCH_GRAPHICS_VERSION_RANGE);
+ KUNIT_EXPECT_NE(test, match_type, XE_RTP_MATCH_GRAPHICS_VERSION_ANY_GT);
+ KUNIT_EXPECT_NE(test, match_type, XE_RTP_MATCH_GRAPHICS_STEP);
+ KUNIT_EXPECT_NE(test, match_type, XE_RTP_MATCH_MEDIA_VERSION);
+ KUNIT_EXPECT_NE(test, match_type, XE_RTP_MATCH_MEDIA_VERSION_RANGE);
+ KUNIT_EXPECT_NE(test, match_type, XE_RTP_MATCH_MEDIA_VERSION_ANY_GT);
+ KUNIT_EXPECT_NE(test, match_type, XE_RTP_MATCH_MEDIA_STEP);
+ }
+}
+
+RTP_TABLE_PARAM(device_oob_was);
+
+static void xe_rtp_table_missing_upper_bound_test(struct kunit *test)
+{
+ const struct xe_rtp_entry_sr *entry = test->param_value;
+
+ for (int i = 0; i < entry->n_rules; i++) {
+ u8 match_type = entry->rules[i].match_type;
+
+ KUNIT_EXPECT_FALSE(test,
+ match_type == XE_RTP_MATCH_GRAPHICS_VERSION_RANGE &&
+ entry->rules[i].ver_end == XE_RTP_END_VERSION_UNDEFINED);
+ KUNIT_EXPECT_FALSE(test,
+ match_type == XE_RTP_MATCH_MEDIA_VERSION_RANGE &&
+ entry->rules[i].ver_end == XE_RTP_END_VERSION_UNDEFINED);
+ }
+}
+
+RTP_TABLE_PARAM(register_whitelist);
+
+static struct kunit_case xe_rtp_table_tests[] = {
+ KUNIT_CASE_PARAM(xe_rtp_table_gt_test, gt_was_gen_params),
+ KUNIT_CASE_PARAM(xe_rtp_table_gt_test, gt_tunings_gen_params),
+ KUNIT_CASE_PARAM(xe_rtp_table_oob_test, oob_was_gen_params),
+ KUNIT_CASE_PARAM(xe_rtp_table_dev_oob_test, device_oob_was_gen_params),
+ KUNIT_CASE_PARAM(xe_rtp_table_missing_upper_bound_test,
+ register_whitelist_gen_params),
+ {}
+};
+
+static struct kunit_suite xe_rtp_tables_test_suite = {
+ .name = "xe_rtp_tables_test",
+ .test_cases = xe_rtp_table_tests,
+};
+
+kunit_test_suite(xe_rtp_tables_test_suite);
diff --git a/drivers/gpu/drm/xe/tests/xe_rtp_test.c b/drivers/gpu/drm/xe/tests/xe_rtp_test.c
index 3d0688d058d9..367811621880 100644
--- a/drivers/gpu/drm/xe/tests/xe_rtp_test.c
+++ b/drivers/gpu/drm/xe/tests/xe_rtp_test.c
@@ -280,6 +280,11 @@ static void xe_rtp_rules_tests(struct kunit *test)
KUNIT_EXPECT_EQ(test, err, param->expected_err);
}
+static u32 bits_2_3_set(struct xe_gt *gt, struct xe_hw_engine *hwe)
+{
+ return REG_BIT(2) | REG_BIT(3);
+}
+
static const struct rtp_to_sr_test_case rtp_to_sr_cases[] = {
{
.name = "coalesce-same-reg",
@@ -301,6 +306,29 @@ static const struct rtp_to_sr_test_case rtp_to_sr_cases[] = {
),
},
{
+ .name = "coalesce-same-reg-literal-and-func",
+ .expected_reg = REGULAR_REG1,
+ .expected_set_bits = REG_BIT(0) | REG_BIT(1) | REG_BIT(2) | REG_BIT(3),
+ .expected_clr_bits = REG_BIT(0) | REG_BIT(1) | REG_BIT(2) | REG_BIT(3),
+ .expected_active = BIT(0) | BIT(1),
+ .expected_count_sr_entries = 1,
+ /* Different bits on the same register: create a single entry */
+ .table = XE_RTP_TABLE_SR(
+ { XE_RTP_NAME("basic-1"),
+ XE_RTP_RULES(FUNC(match_yes)),
+ XE_RTP_ACTIONS(FIELD_SET(REGULAR_REG1,
+ REG_BIT(0) | REG_BIT(1),
+ REG_BIT(0) | REG_BIT(1)))
+ },
+ { XE_RTP_NAME("basic-2"),
+ XE_RTP_RULES(FUNC(match_yes)),
+ XE_RTP_ACTIONS(FIELD_SET_FUNC(REGULAR_REG1,
+ REG_BIT(2) | REG_BIT(3),
+ bits_2_3_set))
+ },
+ ),
+ },
+ {
.name = "no-match-no-add",
.expected_reg = REGULAR_REG1,
.expected_set_bits = REG_BIT(0),
@@ -418,6 +446,30 @@ static const struct rtp_to_sr_test_case rtp_to_sr_cases[] = {
),
},
{
+ .name = "conflict-not-disjoint-literal-and-func",
+ .expected_reg = REGULAR_REG1,
+ .expected_set_bits = REG_BIT(1) | REG_BIT(2),
+ .expected_clr_bits = REG_BIT(1) | REG_BIT(2),
+ .expected_active = BIT(0) | BIT(1),
+ .expected_count_sr_entries = 1,
+ .expected_sr_errors = 1,
+ .table = XE_RTP_TABLE_SR(
+ { XE_RTP_NAME("basic-1"),
+ XE_RTP_RULES(FUNC(match_yes)),
+ XE_RTP_ACTIONS(FIELD_SET(REGULAR_REG1,
+ REG_BIT(1) | REG_BIT(2),
+ REG_BIT(1) | REG_BIT(2)))
+ },
+ /* drop: bits are not disjoint with previous entries */
+ { XE_RTP_NAME("basic-2"),
+ XE_RTP_RULES(FUNC(match_yes)),
+ XE_RTP_ACTIONS(FIELD_SET_FUNC(REGULAR_REG1,
+ REG_BIT(2) | REG_BIT(3),
+ bits_2_3_set))
+ },
+ ),
+ },
+ {
.name = "conflict-reg-type",
.expected_reg = REGULAR_REG1,
.expected_set_bits = REG_BIT(0),
diff --git a/drivers/gpu/drm/xe/tests/xe_wa_test.c b/drivers/gpu/drm/xe/tests/xe_wa_test.c
index ff0e2502b39f..21601e9df353 100644
--- a/drivers/gpu/drm/xe/tests/xe_wa_test.c
+++ b/drivers/gpu/drm/xe/tests/xe_wa_test.c
@@ -43,9 +43,6 @@ static int xe_wa_test_init(struct kunit *test)
xe_gt_mmio_init(gt);
}
- if (!param->graphics_verx100)
- xe->info.step = param->step;
-
/* TODO: init hw engines for engine/LRC WAs */
xe->drm.dev = dev;
test->priv = xe;
diff --git a/drivers/gpu/drm/xe/xe_debugfs.c b/drivers/gpu/drm/xe/xe_debugfs.c
index 22b471303984..3c018dbccc07 100644
--- a/drivers/gpu/drm/xe/xe_debugfs.c
+++ b/drivers/gpu/drm/xe/xe_debugfs.c
@@ -117,7 +117,6 @@ static int info(struct seq_file *m, void *data)
drm_printf(&p, "revid %d\n", xe->info.revid);
drm_printf(&p, "tile_count %d\n", xe->info.tile_count);
drm_printf(&p, "vm_max_level %d\n", xe->info.vm_max_level);
- drm_printf(&p, "force_execlist %s\n", str_yes_no(xe->info.force_execlist));
drm_printf(&p, "has_flat_ccs %s\n", str_yes_no(xe->info.has_flat_ccs));
drm_printf(&p, "has_usm %s\n", str_yes_no(xe->info.has_usm));
drm_printf(&p, "skip_guc_pc %s\n", str_yes_no(xe->info.skip_guc_pc));
diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index b60a651a3c9b..ad7f3e61d457 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -61,6 +61,7 @@
#include "xe_psmi.h"
#include "xe_pxp.h"
#include "xe_query.h"
+#include "xe_ras.h"
#include "xe_shrinker.h"
#include "xe_soc_remapper.h"
#include "xe_survivability_mode.h"
@@ -738,9 +739,11 @@ static void vf_update_device_info(struct xe_device *xe)
xe->info.probe_display = 0;
xe->info.has_heci_cscfi = 0;
xe->info.has_heci_gscfi = 0;
+ xe->info.has_i2c = 0;
xe->info.has_late_bind = 0;
xe->info.skip_guc_pc = 1;
xe->info.skip_pcode = 1;
+ xe->info.has_drm_ras = false;
}
static int xe_device_vram_alloc(struct xe_device *xe)
@@ -949,6 +952,15 @@ int xe_device_probe(struct xe_device *xe)
return err;
}
+ /*
+ * Wa_16029380221: The affected GT will always use non-coherent
+ * access to page tables, so we must do uncached writes from the
+ * CPU.
+ */
+ for_each_gt(gt, xe, id)
+ if (XE_GT_WA(gt, 16029380221))
+ xe->info.has_cached_pt = false;
+
for_each_tile(tile, xe, id) {
err = xe_ggtt_init_early(tile->mem.ggtt);
if (err)
@@ -989,6 +1001,16 @@ int xe_device_probe(struct xe_device *xe)
if (err)
return err;
+ err = xe_soc_remapper_init(xe);
+ if (err)
+ return err;
+
+ err = xe_sysctrl_init(xe);
+ if (err)
+ return err;
+
+ xe_ras_init(xe);
+
/*
* Now that GT is initialized (TTM in particular),
* we can try to init display, and inherit the initial fb.
@@ -1029,10 +1051,6 @@ int xe_device_probe(struct xe_device *xe)
xe_nvm_init(xe);
- err = xe_soc_remapper_init(xe);
- if (err)
- return err;
-
err = xe_heci_gsc_init(xe);
if (err)
return err;
@@ -1071,10 +1089,6 @@ int xe_device_probe(struct xe_device *xe)
if (err)
goto err_unregister_display;
- err = xe_sysctrl_init(xe);
- if (err)
- goto err_unregister_display;
-
err = xe_device_sysfs_init(xe);
if (err)
goto err_unregister_display;