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authorJohn Madieu <john.madieu.xa@bp.renesas.com>2026-05-25 11:07:50 +0000
committerVinod Koul <vkoul@kernel.org>2026-06-08 17:02:21 +0530
commitc0a207898fca8cbb4fad0da1e950d477b6afbf64 (patch)
tree0755d583e1922f9f9ae6bd9e5b476a2e0fd7297a /tools/perf/scripts/python
parent5d596b9139f59ce412f41283baadaf809936eaf4 (diff)
dmaengine: sh: rz-dmac: Add DMA ACK signal routing support
Some peripherals on RZ/G3E SoCs (SSIU, SPDIF, SCU/SRC, DVC, PFC) require explicit ACK signal routing through the ICU for level-based DMA handshaking. Rather than extending the DT binding with an optional second #dma-cells (which would require all DMA consumers to supply two cells even when ACK routing is not needed), derive the ACK signal number directly from the MID/RID request number using the linear mapping defined in RZ/G3E hardware manual Table 4.6-28: PFC external DMA pins (DREQ0..DREQ4): req_no 0x000-0x004 -> ACK No. 84-88 SSIU BUSIFs (ssip00..ssip93): req_no 0x161-0x198 -> ACK No. 28-83 SPDIF (CH0..CH2) + SCU SRC (sr0..sr9) + DVC (cmd0..cmd1): req_no 0x199-0x1b4 -> ACK No. 0-27 ACK routing is programmed when a channel is prepared for transfer and cleared when the channel is released or the transfer times out, following the same pattern as MID/RID request routing. Signed-off-by: John Madieu <john.madieu.xa@bp.renesas.com> Link: https://patch.msgid.link/20260525110750.4020112-3-john.madieu.xa@bp.renesas.com [fixes subsystem name tag] Signed-off-by: Vinod Koul <vkoul@kernel.org>
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