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authorSherry Sun <sherry.sun@nxp.com>2026-04-22 17:35:40 +0800
committerBjorn Helgaas <bhelgaas@google.com>2026-05-18 18:03:55 -0500
commit610fa91d9863d9bc0ce496c5129328459c75174b (patch)
treea22cb02948ede63b7b2174a5f9d2b97e69e39ab9 /tools/perf/scripts/python
parentb269bb5e4cc3cf04a592d516a3dc260d9d893f24 (diff)
PCI: imx6: Assert PERST# before enabling regulators
The PCIe endpoint may start responding or driving signals as soon as its supply is enabled, even before the reference clock is stable. Asserting PERST# before enabling the regulator ensures that the endpoint remains in reset throughout the entire power-up sequence, until both power and refclk are known to be stable and link initialization can safely begin. Currently, the driver enables the vpcie3v3aux regulator in imx_pcie_probe() before PERST# is asserted in imx_pcie_host_init(), which may cause PCIe endpoint undefined behavior during early power-up. However, there is no issue so far because PERST# is requested as GPIOD_OUT_HIGH in imx_pcie_probe(), which guarantees that PERST# is asserted before enabling the vpcie3v3aux regulator. This prepares for an upcoming changes that will parse the reset property using the new Root Port binding, which will use GPIOD_ASIS when requesting the reset GPIO. With GPIOD_ASIS, the GPIO state is not guaranteed, so explicit sequencing is required. Fix the power sequencing by: 1. Moving vpcie3v3aux regulator enable from probe to imx_pcie_host_init(), where it can be properly sequenced with PERST#. 2. Moving imx_pcie_assert_perst() before regulator and clock enable to ensure correct ordering. Signed-off-by: Sherry Sun <sherry.sun@nxp.com> Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Richard Zhu <hongxing.zhu@nxp.com> Link: https://patch.msgid.link/20260422093549.407022-4-sherry.sun@nxp.com
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