diff options
| author | Marco Felsch <m.felsch@pengutronix.de> | 2026-01-13 15:52:42 +0100 |
|---|---|---|
| committer | Abel Vesa <abel.vesa@oss.qualcomm.com> | 2026-01-17 22:17:10 +0200 |
| commit | 3e6b0227b93c708e93e33f6c3485bad077650766 (patch) | |
| tree | 2c56b58c3947bdb1b38bc6db5fcba5086cad441f /tools/perf/scripts/python | |
| parent | 9bb910b049402b7a3496250c9c6ab169aed83d15 (diff) | |
clk: imx: fracn-gppll: Add 241.90 MHz Support
Some parallel panels have a pixelclk of 24.19 MHz. Add support for
241.90 MHz so a by 10 divider can be used to derive the exact pixelclk.
Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Daniel Baluta <daniel.baluta@nxp.com>
Link: https://patch.msgid.link/20260113-v6-18-topic-clk-fracn-gppll-v3-2-45da70f43c98@pengutronix.de
Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions