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| author | Yixun Lan <dlan@kernel.org> | 2026-05-11 02:59:10 +0000 |
|---|---|---|
| committer | Yixun Lan <dlan@kernel.org> | 2026-06-02 07:16:59 +0000 |
| commit | 2f20c859a82a291483a8b3f01cbfbb1642782a14 (patch) | |
| tree | 933f2b00a4dc327bde09cfcf768f2997b6450ad5 /tools/perf/scripts/python | |
| parent | d8a4cef90b1a4ae9196a5bfba683eb9a0c75acdc (diff) | |
clk: spacemit: k3: Fix PCIe clock register offset
The offset of PCIe Clock CTRL register for port B and C controller was
wrongly swapped, correct it here.
Fixes: 091d19cc2401 ("clk: spacemit: k3: extract common header")
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://patch.msgid.link/20260511-06-pci-clk-fix-v2-2-c9a5e563bab3@kernel.org
Signed-off-by: Yixun Lan <dlan@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions