diff options
| author | Adrian Ng Ho Yin <adrian.ho.yin.ng@altera.com> | 2026-05-22 17:02:54 +0800 |
|---|---|---|
| committer | Dinh Nguyen <dinguyen@kernel.org> | 2026-05-25 21:46:56 -0500 |
| commit | 1e7f56205813a2c48cdb3e9a4b0a24f49fd9a548 (patch) | |
| tree | 5c8157e0bf0c90a93f321efa3cc2144f9143bfa0 /tools/perf/scripts/python/task-analyzer.py | |
| parent | 254f49634ee16a731174d2ae34bc50bd5f45e731 (diff) | |
clk: socfpga: agilex: implement l3_main_free_clk
The AGILEX_L3_MAIN_FREE_CLK is defined in the dt-bindings header but
was never implemented in the clock driver. Per the Agilex TRM,
l3_main_free_clk has no divider or mux and is a fixed 1:1 derivative
of noc_free_clk that clocks most of the interconnect datapath.
Signed-off-by: Adrian Ng Ho Yin <adrian.ho.yin.ng@altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/task-analyzer.py')
0 files changed, 0 insertions, 0 deletions