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authorDaniele Briguglio <hello@superkali.me>2026-04-19 13:43:10 +0200
committerHeiko Stuebner <heiko@sntech.de>2026-04-27 13:53:27 +0200
commit02b9b0bb626989b947d82bbe4e050f0254e2046d (patch)
tree329a9d322145c47c22f6bc48f91dfdecd58b4c82 /tools/perf/scripts/python/stackcollapse.py
parent5902fedf61784fa711eea6be0bd6a75dc2c9cfd1 (diff)
clk: rockchip: rk3588: add GATE_GRF clocks for I2S MCLK output to IO
The I2S MCLK outputs on RK3588 are gated by bits in the SYS_GRF register SOC_CON6 (offset 0x318). These gates control whether the internal CRU MCLK signals reach the external IO pins connected to audio codecs. The kernel should explicitly manage these gates so that audio functionality does not depend on bootloader register state. This is analogous to what was done for RK3576 SAI MCLK outputs [1]. Register the SYS_GRF as an auxiliary GRF with grf_type_sys using rockchip_clk_add_grf(), and add GATE_GRF entries for all four I2S MCLK output gates: - I2S0_8CH_MCLKOUT_TO_IO (bit 0) - I2S1_8CH_MCLKOUT_TO_IO (bit 1) - I2S2_2CH_MCLKOUT_TO_IO (bit 2) - I2S3_2CH_MCLKOUT_TO_IO (bit 7) Board DTS files that need MCLK on an IO pin can reference these clocks, e.g.: clocks = <&cru I2S0_8CH_MCLKOUT_TO_IO>; Tested on the Youyeetoo YY3588 (RK3588) with an ES8388 codec on I2S0. [1] https://lore.kernel.org/r/20250305-rk3576-sai-v1-2-64e6cf863e9a@collabora.com/ Tested-by: Ricardo Pardini <ricardo@pardini.net> Signed-off-by: Daniele Briguglio <hello@superkali.me> Link: https://patch.msgid.link/20260419-rk3588-mclk-gate-grf-v4-5-513a42dd1dcc@superkali.me Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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