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| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2026-05-15 11:29:41 +0200 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2026-05-15 11:29:41 +0200 |
| commit | fbe9822423b2a933307a4b58f6490625c97f4e25 (patch) | |
| tree | 93da2d79c7c92c9efae8e74c33145fb2d1d88c44 /tools/perf/scripts/python/bin/stackcollapse-record | |
| parent | 5fcbbc1fcc4fa78bb5a184caa2c32db423676577 (diff) | |
| parent | 2abdc3dcf9780d070e55a99fdf8f93440c798b84 (diff) | |
Merge tag 'renesas-r8a73a4-dt-binding-defs-tag1' into renesas-clk-for-v7.2
Renesas R-Mobile APE6 Coresight Clock DT Binding Definitions
ZT trace bus and ZTR trace clock DT binding definitions for the Renesas
R-Mobile APE6 (R8A73A4) SoC, shared by driver and DT source files.
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-record')
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