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| author | Devin Li <Devin.Li@cixtech.com> | 2026-05-07 14:59:56 +0800 |
|---|---|---|
| committer | Peter Chen <peter.chen@cixtech.com> | 2026-05-11 11:36:40 +0800 |
| commit | 89d0ad7f3a60d3076da2d90ece8d78d0eb60bb91 (patch) | |
| tree | c115d0e4936f521dde4b8e221ee82f0d3449a812 /scripts | |
| parent | aa771fbe696a8f9d7884409a271558217be08d32 (diff) | |
arm64: dts: cix: Add CPU idle states for Sky1
Add PSCI-based CPU idle state definitions for the Sky1 SoC,
enabling core and cluster level power management through
ARM PSCI firmware.
Three idle states are defined:
- CPU_SLEEP_0: Core idle state for A520 cores
(psci-suspend-param 0x0010000), entry-latency 34us,
exit-latency 100us
- CPU_SLEEP_1: Core idle state for A720 cores
(psci-suspend-param 0x10000), entry-latency 31us,
exit-latency 79us
- CLUSTER_SLEEP_0: Cluster idle state shared by all cores
(psci-suspend-param 0x1010000), entry-latency 41us,
exit-latency 104us
A520 cores (cpu0-3) reference CPU_SLEEP_0 and CLUSTER_SLEEP_0,
while A720 cores (cpu4-11) reference CPU_SLEEP_1 and
CLUSTER_SLEEP_0.
Signed-off-by: Devin Li <Devin.Li@cixtech.com>
Link: https://lore.kernel.org/r/20260507065956.3900087-1-Devin.Li@cixtech.com
Signed-off-by: Peter Chen <peter.chen@cixtech.com>
Diffstat (limited to 'scripts')
0 files changed, 0 insertions, 0 deletions