diff options
| author | Arnd Bergmann <arnd@arndb.de> | 2025-11-21 16:36:49 +0100 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2025-11-21 16:36:49 +0100 |
| commit | ab07edaab69e5c6cac078afbdd498225e81c39bc (patch) | |
| tree | 85471f1dc884eacd67e699edc0400f950e56f8ae /include | |
| parent | 7e90eede6b92796ba94fd1eed5fbc79bf817c5b3 (diff) | |
| parent | cad767a9af055c921e29b7b268f99e83c82baab3 (diff) | |
Merge tag 'samsung-dt64-6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt
Samsung DTS ARM64 changes for v6.19
1. ExynosAutov920:
- Add more clock controller nodes.
2. Google GS101:
- PMIC clock
- Mark ACPM (Alive Clock and Power Manager) firmware node as clock
provider and use its clocks. Add also Devicetree binding headers
with clock its clock indices used in DTS (kept as separate branch).
- Add more SYSREG (syscon) regions.
- Correct several blocks address space sizes and APM SYSREG's starting
address.
3. Exynos7870:
- Enable display over DSI and several display planels.
- Few cleanups.
* tag 'samsung-dt64-6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos7870-j6lte: enable display panel support
arm64: dts: exynos7870-a2corelte: enable display panel support
arm64: dts: exynos7870-on7xelte: enable display panel support
arm64: dts: exynos7870: add DSI support
arm64: dts: exynos: gs101: fix sysreg_apm reg property
arm64: dts: exynos: gs101: fix clock module unit reg sizes
arm64: dts: exynos: gs101: add sysreg_misc and sysreg_hsi0 nodes
arm64: dts: exynos: gs101: add OPPs
arm64: dts: exynos: gs101: add CPU clocks
arm64: dts: exynos: gs101: add #clock-cells to the ACPM protocol node
dt-bindings: firmware: google,gs101-acpm-ipc: add ACPM clocks
arm64: dts: exynos: gs101-pixel-common: add node for s2mpg10 / clock
arm64: dts: exynos990: Add sysreg nodes for PERIC0 and PERIC1
arm64: dts: exynosautov920: add CMU_MFC clock DT nodes
arm64: dts: exynosautov920: add CMU_M2M clock DT nodes
arm64: dts: exynos7870-on7xelte: add bus-width to mmc0 node
arm64: dts: exynos7870-j6lte: add bus-width to mmc0 node
arm64: dts: exynos7870-a2corelte: add bus-width to mmc0 node
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'include')
| -rw-r--r-- | include/dt-bindings/clock/google,gs101-acpm.h | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/google,gs101-acpm.h b/include/dt-bindings/clock/google,gs101-acpm.h new file mode 100644 index 000000000000..e2ba89e09fa6 --- /dev/null +++ b/include/dt-bindings/clock/google,gs101-acpm.h @@ -0,0 +1,26 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ +/* + * Copyright 2025 Linaro Ltd. + * + * Device Tree binding constants for Google gs101 ACPM clock controller. + */ + +#ifndef _DT_BINDINGS_CLOCK_GOOGLE_GS101_ACPM_H +#define _DT_BINDINGS_CLOCK_GOOGLE_GS101_ACPM_H + +#define GS101_CLK_ACPM_DVFS_MIF 0 +#define GS101_CLK_ACPM_DVFS_INT 1 +#define GS101_CLK_ACPM_DVFS_CPUCL0 2 +#define GS101_CLK_ACPM_DVFS_CPUCL1 3 +#define GS101_CLK_ACPM_DVFS_CPUCL2 4 +#define GS101_CLK_ACPM_DVFS_G3D 5 +#define GS101_CLK_ACPM_DVFS_G3DL2 6 +#define GS101_CLK_ACPM_DVFS_TPU 7 +#define GS101_CLK_ACPM_DVFS_INTCAM 8 +#define GS101_CLK_ACPM_DVFS_TNR 9 +#define GS101_CLK_ACPM_DVFS_CAM 10 +#define GS101_CLK_ACPM_DVFS_MFC 11 +#define GS101_CLK_ACPM_DVFS_DISP 12 +#define GS101_CLK_ACPM_DVFS_BO 13 + +#endif /* _DT_BINDINGS_CLOCK_GOOGLE_GS101_ACPM_H */ |
