diff options
| author | Jani Nikula <jani.nikula@intel.com> | 2025-09-29 16:34:18 +0300 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2025-09-30 09:56:25 +0300 |
| commit | cc7e1a9b596c9d9dc3324c056cf8162e9fca2765 (patch) | |
| tree | 6106da4de3ed48e5f539ea04070a95304df1544b /drivers/gpu/drm | |
| parent | 97825e1c6de7315cba9acb6c1371f1a87dedd904 (diff) | |
drm/i915/irq: duplicate HAS_FBC() for irq error mask usage
The error irq handling needs to mask page table errors on gen 2/3 with
FBC. See commit e7e12f6ec8bf ("drm/i915: Mask page table errors on
gen2/3 with FBC") for details.
We want to avoid using display feature checks in i915 core code. Since
FBC can't be fused off on gen 2/3, just list the platforms that support
FBC. Add a macro purely for making the code self-documenting.
With this, we can drop the intel_display_core.h include, and make struct
intel_display opaque inside i915_irq.c.
Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://lore.kernel.org/r/20250929133418.2033006-1-jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'drivers/gpu/drm')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_irq.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 11a727b74849..e0a0bd687f1b 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -33,7 +33,6 @@ #include <drm/drm_drv.h> -#include "display/intel_display_core.h" #include "display/intel_display_irq.h" #include "display/intel_hotplug.h" #include "display/intel_hotplug_irq.h" @@ -794,9 +793,10 @@ static void cherryview_irq_postinstall(struct drm_i915_private *dev_priv) intel_uncore_posting_read(&dev_priv->uncore, GEN8_MASTER_IRQ); } +#define I9XX_HAS_FBC(i915) (IS_I85X(i915) || IS_I865G(i915) || IS_I915GM(i915) || IS_I945GM(i915)) + static u32 i9xx_error_mask(struct drm_i915_private *i915) { - struct intel_display *display = i915->display; /* * On gen2/3 FBC generates (seemingly spurious) * display INVALID_GTT/INVALID_GTT_PTE table errors. @@ -809,7 +809,7 @@ static u32 i9xx_error_mask(struct drm_i915_private *i915) * Unfortunately we can't mask off individual PGTBL_ER bits, * so we just have to mask off all page table errors via EMR. */ - if (HAS_FBC(display)) + if (I9XX_HAS_FBC(i915)) return I915_ERROR_MEMORY_REFRESH; else return I915_ERROR_PAGE_TABLE | |