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authorArnd Bergmann <arnd@arndb.de>2025-05-09 22:42:03 +0200
committerArnd Bergmann <arnd@arndb.de>2025-05-09 22:42:03 +0200
commit1d55886c9681ab24ffaa0dae2b34510a55b5db9f (patch)
tree46c6d791ab2a103437f04b9ebfa4c71a543f5197 /arch/arm
parent47ce18de8bdfbc9883580cd0b16758ac01b2ace1 (diff)
parentb280613d480aa170e51029d5582bb4b666982b7c (diff)
Merge tag 'renesas-dts-for-v6.16-tag2' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DTS updates for v6.16 (take two) - Add CANFD support for the RZ/G3E SoC and the RZ/G3E SMARC Carrier-II EVK development board, - Add support for Ethernet port A, 9-pin D-sub serial, and USB on the RZN1D-DB and RZN1D-EB development and expansion boards, - Add sound support for the Retronix Sparrow Hawk board, - Add General PWM Timer (GPT) support for the RZ/G2L and RZ/V2L SoCs and SMARC EVK boards, - Miscellaneous fixes and improvements. * tag 'renesas-dts-for-v6.16-tag2' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: ARM: dts: renesas: r9a06g032-rzn1d400-eb: Enable USB host port ARM: dts: renesas: r9a06g032-rzn1d400-db: Add pinmux for the CPLD arm64: dts: renesas: white-hawk-single: Improve Ethernet TSN description ARM: dts: renesas: r9a06g032-rzn1d400-db: Enable USB device port ARM: dts: renesas: r9a06g032-rzn1d400-eb: Describe 9-pin D-sub serial port arm64: dts: renesas: beacon-renesom: Align wifi node name with bindings arm64: dts: renesas: rzg2l-smarc: Enable GPT on carrier board arm64: dts: renesas: r9a07g054: Add GPT support arm64: dts: renesas: r9a07g044: Add GPT support arm64: dts: renesas: sparrow-hawk: Add MSIOF Sound support ARM: dts: renesas: r9a06g032-rzn1d400-eb: Add GMAC1 port arm64: dts: renesas: r9a09g047e57-smarc: Enable CAN Transceiver arm64: dts: renesas: r9a09g047e57-smarc: Enable CANFD arm64: dts: renesas: r9a09g047: Add CANFD node Link: https://lore.kernel.org/r/cover.1746798755.git.geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts14
-rw-r--r--arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts84
2 files changed, 98 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts
index 322e4c95ad3d..2de047393652 100644
--- a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts
+++ b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts
@@ -170,6 +170,9 @@
};
&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_cpld>;
+
pins_can0: pins_can0 {
pinmux = <RZN1_PINMUX(162, RZN1_FUNC_CAN)>, /* CAN0_TXD */
<RZN1_PINMUX(163, RZN1_FUNC_CAN)>; /* CAN0_RXD */
@@ -182,6 +185,13 @@
drive-strength = <6>;
};
+ pins_cpld: pins-cpld {
+ pinmux = <RZN1_PINMUX(119, RZN1_FUNC_USB)>,
+ <RZN1_PINMUX(120, RZN1_FUNC_USB)>,
+ <RZN1_PINMUX(121, RZN1_FUNC_USB)>,
+ <RZN1_PINMUX(122, RZN1_FUNC_USB)>;
+ };
+
pins_eth3: pins_eth3 {
pinmux = <RZN1_PINMUX(36, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(37, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
@@ -282,6 +292,10 @@
status = "okay";
};
+&udc {
+ status = "okay";
+};
+
&wdt0 {
timeout-sec = <60>;
status = "okay";
diff --git a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts
index e539df514d1e..97a339b30d76 100644
--- a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts
+++ b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts
@@ -15,6 +15,44 @@
"renesas,r9a06g032";
};
+&gmac1 {
+ pinctrl-0 = <&pins_eth0>, <&pins_mdio0>;
+ pinctrl-names = "default";
+
+ status = "okay";
+ phy-mode = "rgmii-id";
+ phy-handle = <&phy_mii0>;
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "snps,dwmac-mdio";
+
+ phy_mii0: ethernet-phy@8 {
+ reg = <8>;
+
+ leds {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ led@0 {
+ reg = <0>;
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_LAN;
+ default-state = "keep";
+ };
+
+ led@1 {
+ reg = <1>;
+ color = <LED_COLOR_ID_ORANGE>;
+ function = LED_FUNCTION_ACTIVITY;
+ default-state = "keep";
+ };
+ };
+ };
+ };
+};
+
&i2c2 {
/* Sensors are different across revisions. All are LM75B compatible */
sensor@49 {
@@ -23,6 +61,11 @@
};
};
+&mii_conv1 {
+ renesas,miic-input = <MIIC_GMAC1_PORT>;
+ status = "okay";
+};
+
&mii_conv2 {
renesas,miic-input = <MIIC_SWITCH_PORTD>;
status = "okay";
@@ -33,7 +76,28 @@
status = "okay";
};
+&pci_usb {
+ status = "okay";
+};
+
&pinctrl {
+ pins_eth0: pins-eth0 {
+ pinmux = <RZN1_PINMUX(0, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
+ <RZN1_PINMUX(1, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
+ <RZN1_PINMUX(2, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
+ <RZN1_PINMUX(3, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
+ <RZN1_PINMUX(4, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
+ <RZN1_PINMUX(5, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
+ <RZN1_PINMUX(6, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
+ <RZN1_PINMUX(7, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
+ <RZN1_PINMUX(8, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
+ <RZN1_PINMUX(9, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
+ <RZN1_PINMUX(10, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
+ <RZN1_PINMUX(11, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>;
+ drive-strength = <6>;
+ bias-disable;
+ };
+
pins_eth1: pins-eth1 {
pinmux = <RZN1_PINMUX(12, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(13, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
@@ -68,6 +132,11 @@
bias-disable;
};
+ pins_mdio0: pins-mdio0 {
+ pinmux = <RZN1_PINMUX(150, RZN1_FUNC_MDIO0_GMAC0)>,
+ <RZN1_PINMUX(151, RZN1_FUNC_MDIO0_GMAC0)>;
+ };
+
pins_sdio1: pins-sdio1 {
pinmux = <RZN1_PINMUX(95, RZN1_FUNC_SDIO)>,
<RZN1_PINMUX(97, RZN1_FUNC_SDIO)>,
@@ -82,6 +151,14 @@
pinmux = <RZN1_PINMUX(96, RZN1_FUNC_SDIO)>;
drive-strength = <12>;
};
+
+ pins_uart2: pins-uart2 {
+ pinmux = <RZN1_PINMUX(105, RZN1_FUNC_UART2)>,
+ <RZN1_PINMUX(106, RZN1_FUNC_UART2)>,
+ <RZN1_PINMUX(107, RZN1_FUNC_UART2)>,
+ <RZN1_PINMUX(108, RZN1_FUNC_UART2)>;
+ bias-disable;
+ };
};
&sdio1 {
@@ -158,3 +235,10 @@
phy-handle = <&switch0phy1>;
status = "okay";
};
+
+&uart2 {
+ pinctrl-0 = <&pins_uart2>;
+ pinctrl-names = "default";
+ status = "okay";
+ uart-has-rtscts;
+};