diff options
| author | Zhengjun Xing <zhengjun.xing@linux.intel.com> | 2022-06-14 22:50:19 +0800 |
|---|---|---|
| committer | Arnaldo Carvalho de Melo <acme@redhat.com> | 2022-07-26 16:31:55 -0300 |
| commit | bedd17381b9cc34ad20c1d545a4ed2dfbb4d8068 (patch) | |
| tree | 231634b3f719e5b5b6127771d702a0d53fc5bbc5 | |
| parent | 28738de918b530e41b305eb4209e47fe36960529 (diff) | |
perf vendor events intel: Update event list for haswellx
Update JSON core/uncore events for haswellx to perf.
Based on HSX JSON list v24:
https://download.01.org/perfmon/HSX
Reviewed-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Xing Zhengjun <zhengjun.xing@linux.intel.com>
Cc: Alexander Shishkin <alexander.shishkin@intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ian Rogers <irogers@google.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Link: https://lore.kernel.org/r/20220614145019.2177071-2-zhengjun.xing@linux.intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
12 files changed, 11419 insertions, 175 deletions
diff --git a/tools/perf/pmu-events/arch/x86/haswellx/cache.json b/tools/perf/pmu-events/arch/x86/haswellx/cache.json index 85eb998dd39e..5760ffb1eaf4 100644 --- a/tools/perf/pmu-events/arch/x86/haswellx/cache.json +++ b/tools/perf/pmu-events/arch/x86/haswellx/cache.json @@ -832,9 +832,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.ALL_CODE_RD.LLC_HIT.HIT_OTHER_CORE_NO_FWD", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x04003C0244", + "MSRValue": "0x4003C0244", "Offcore": "1", - "PublicDescription": "Counts all demand & prefetch code reads hit in the L3 and the snoops to sibling cores hit in either E/S state and the line is not forwarded", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -847,7 +846,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x10003C0091", "Offcore": "1", - "PublicDescription": "Counts all demand & prefetch data reads hit in the L3 and the snoop to one of the sibling cores hits the line in M state and the line is forwarded", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -858,9 +856,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.LLC_HIT.HIT_OTHER_CORE_NO_FWD", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x04003C0091", + "MSRValue": "0x4003C0091", "Offcore": "1", - "PublicDescription": "Counts all demand & prefetch data reads hit in the L3 and the snoops to sibling cores hit in either E/S state and the line is not forwarded", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -873,7 +870,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x10003C07F7", "Offcore": "1", - "PublicDescription": "Counts all data/code/rfo reads (demand & prefetch) hit in the L3 and the snoop to one of the sibling cores hits the line in M state and the line is forwarded", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -884,9 +880,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.ALL_READS.LLC_HIT.HIT_OTHER_CORE_NO_FWD", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x04003C07F7", + "MSRValue": "0x4003C07F7", "Offcore": "1", - "PublicDescription": "Counts all data/code/rfo reads (demand & prefetch) hit in the L3 and the snoops to sibling cores hit in either E/S state and the line is not forwarded", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -899,7 +894,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3F803C8FFF", "Offcore": "1", - "PublicDescription": "Counts all requests hit in the L3", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -912,7 +906,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x10003C0122", "Offcore": "1", - "PublicDescription": "Counts all demand & prefetch RFOs hit in the L3 and the snoop to one of the sibling cores hits the line in M state and the line is forwarded", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -923,9 +916,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.ALL_RFO.LLC_HIT.HIT_OTHER_CORE_NO_FWD", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x04003C0122", + "MSRValue": "0x4003C0122", "Offcore": "1", - "PublicDescription": "Counts all demand & prefetch RFOs hit in the L3 and the snoops to sibling cores hit in either E/S state and the line is not forwarded", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -938,7 +930,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x10003C0004", "Offcore": "1", - "PublicDescription": "Counts all demand code reads hit in the L3 and the snoop to one of the sibling cores hits the line in M state and the line is forwarded", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -949,9 +940,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.LLC_HIT.HIT_OTHER_CORE_NO_FWD", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x04003C0004", + "MSRValue": "0x4003C0004", "Offcore": "1", - "PublicDescription": "Counts all demand code reads hit in the L3 and the snoops to sibling cores hit in either E/S state and the line is not forwarded", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -964,7 +954,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x10003C0001", "Offcore": "1", - "PublicDescription": "Counts demand data reads hit in the L3 and the snoop to one of the sibling cores hits the line in M state and the line is forwarded", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -975,9 +964,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.LLC_HIT.HIT_OTHER_CORE_NO_FWD", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x04003C0001", + "MSRValue": "0x4003C0001", "Offcore": "1", - "PublicDescription": "Counts demand data reads hit in the L3 and the snoops to sibling cores hit in either E/S state and the line is not forwarded", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -990,7 +978,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x10003C0002", "Offcore": "1", - "PublicDescription": "Counts all demand data writes (RFOs) hit in the L3 and the snoop to one of the sibling cores hits the line in M state and the line is forwarded", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -1001,9 +988,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.LLC_HIT.HIT_OTHER_CORE_NO_FWD", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x04003C0002", + "MSRValue": "0x4003C0002", "Offcore": "1", - "PublicDescription": "Counts all demand data writes (RFOs) hit in the L3 and the snoops to sibling cores hit in either E/S state and the line is not forwarded", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -1016,7 +1002,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3F803C0040", "Offcore": "1", - "PublicDescription": "Counts all prefetch (that bring data to LLC only) code reads hit in the L3", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -1029,7 +1014,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3F803C0010", "Offcore": "1", - "PublicDescription": "Counts prefetch (that bring data to L2) data reads hit in the L3", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -1042,7 +1026,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3F803C0020", "Offcore": "1", - "PublicDescription": "Counts all prefetch (that bring data to L2) RFOs hit in the L3", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -1055,7 +1038,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3F803C0200", "Offcore": "1", - "PublicDescription": "Counts prefetch (that bring data to LLC only) code reads hit in the L3", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -1068,7 +1050,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3F803C0080", "Offcore": "1", - "PublicDescription": "Counts all prefetch (that bring data to LLC only) data reads hit in the L3", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -1081,7 +1062,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3F803C0100", "Offcore": "1", - "PublicDescription": "Counts all prefetch (that bring data to LLC only) RFOs hit in the L3", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -1091,7 +1071,8 @@ "CounterHTOff": "0,1,2,3,4,5,6,7", "EventCode": "0xf4", "EventName": "SQ_MISC.SPLIT_LOCK", + "PublicDescription": "SQ_MISC.SPLIT_LOCK", "SampleAfterValue": "100003", "UMask": "0x10" } -]
\ No newline at end of file +] diff --git a/tools/perf/pmu-events/arch/x86/haswellx/floating-point.json b/tools/perf/pmu-events/arch/x86/haswellx/floating-point.json index 55cf5b96464e..7cf203a90a74 100644 --- a/tools/perf/pmu-events/arch/x86/haswellx/floating-point.json +++ b/tools/perf/pmu-events/arch/x86/haswellx/floating-point.json @@ -100,4 +100,4 @@ "SampleAfterValue": "100003", "UMask": "0x10" } -]
\ No newline at end of file +] diff --git a/tools/perf/pmu-events/arch/x86/haswellx/frontend.json b/tools/perf/pmu-events/arch/x86/haswellx/frontend.json index 0c8d5ccf1276..c45a09abe5d3 100644 --- a/tools/perf/pmu-events/arch/x86/haswellx/frontend.json +++ b/tools/perf/pmu-events/arch/x86/haswellx/frontend.json @@ -301,4 +301,4 @@ "SampleAfterValue": "2000003", "UMask": "0x1" } -]
\ No newline at end of file +] diff --git a/tools/perf/pmu-events/arch/x86/haswellx/memory.json b/tools/perf/pmu-events/arch/x86/haswellx/memory.json index 6ffb5067f4eb..fdabc9fe12a5 100644 --- a/tools/perf/pmu-events/arch/x86/haswellx/memory.json +++ b/tools/perf/pmu-events/arch/x86/haswellx/memory.json @@ -233,7 +233,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3FBFC00244", "Offcore": "1", - "PublicDescription": "Counts all demand & prefetch code reads miss in the L3", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -244,9 +243,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.ALL_CODE_RD.LLC_MISS.LOCAL_DRAM", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0600400244", + "MSRValue": "0x600400244", "Offcore": "1", - "PublicDescription": "Counts all demand & prefetch code reads miss the L3 and the data is returned from local dram", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -259,7 +257,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3FBFC00091", "Offcore": "1", - "PublicDescription": "Counts all demand & prefetch data reads miss in the L3", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -270,9 +267,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.LLC_MISS.LOCAL_DRAM", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0600400091", + "MSRValue": "0x600400091", "Offcore": "1", - "PublicDescription": "Counts all demand & prefetch data reads miss the L3 and the data is returned from local dram", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -283,9 +279,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.LLC_MISS.REMOTE_DRAM", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x063F800091", + "MSRValue": "0x63F800091", "Offcore": "1", - "PublicDescription": "Counts all demand & prefetch data reads miss the L3 and the data is returned from remote dram", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -298,7 +293,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x103FC00091", "Offcore": "1", - "PublicDescription": "Counts all demand & prefetch data reads miss the L3 and the modified data is transferred from remote cache", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -309,9 +303,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.LLC_MISS.REMOTE_HIT_FORWARD", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x083FC00091", + "MSRValue": "0x83FC00091", "Offcore": "1", - "PublicDescription": "Counts all demand & prefetch data reads miss the L3 and clean or shared data is transferred from remote cache", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -324,7 +317,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3FBFC007F7", "Offcore": "1", - "PublicDescription": "Counts all data/code/rfo reads (demand & prefetch) miss in the L3", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -335,9 +327,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.ALL_READS.LLC_MISS.LOCAL_DRAM", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x06004007F7", + "MSRValue": "0x6004007F7", "Offcore": "1", - "PublicDescription": "Counts all data/code/rfo reads (demand & prefetch) miss the L3 and the data is returned from local dram", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -348,9 +339,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.ALL_READS.LLC_MISS.REMOTE_DRAM", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x063F8007F7", + "MSRValue": "0x63F8007F7", "Offcore": "1", - "PublicDescription": "Counts all data/code/rfo reads (demand & prefetch) miss the L3 and the data is returned from remote dram", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -363,7 +353,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x103FC007F7", "Offcore": "1", - "PublicDescription": "Counts all data/code/rfo reads (demand & prefetch) miss the L3 and the modified data is transferred from remote cache", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -374,9 +363,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.ALL_READS.LLC_MISS.REMOTE_HIT_FORWARD", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x083FC007F7", + "MSRValue": "0x83FC007F7", "Offcore": "1", - "PublicDescription": "Counts all data/code/rfo reads (demand & prefetch) miss the L3 and clean or shared data is transferred from remote cache", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -389,7 +377,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3FBFC08FFF", "Offcore": "1", - "PublicDescription": "Counts all requests miss in the L3", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -402,7 +389,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3FBFC00122", "Offcore": "1", - "PublicDescription": "Counts all demand & prefetch RFOs miss in the L3", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -413,9 +399,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.ALL_RFO.LLC_MISS.LOCAL_DRAM", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0600400122", + "MSRValue": "0x600400122", "Offcore": "1", - "PublicDescription": "Counts all demand & prefetch RFOs miss the L3 and the data is returned from local dram", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -428,7 +413,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3FBFC00004", "Offcore": "1", - "PublicDescription": "Counts all demand code reads miss in the L3", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -439,9 +423,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.LLC_MISS.LOCAL_DRAM", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0600400004", + "MSRValue": "0x600400004", "Offcore": "1", - "PublicDescription": "Counts all demand code reads miss the L3 and the data is returned from local dram", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -454,7 +437,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3FBFC00001", "Offcore": "1", - "PublicDescription": "Counts demand data reads miss in the L3", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -465,9 +447,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.LLC_MISS.LOCAL_DRAM", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0600400001", + "MSRValue": "0x600400001", "Offcore": "1", - "PublicDescription": "Counts demand data reads miss the L3 and the data is returned from local dram", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -480,7 +461,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3FBFC00002", "Offcore": "1", - "PublicDescription": "Counts all demand data writes (RFOs) miss in the L3", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -491,9 +471,8 @@ "EventCode": "0xB7, 0xBB", "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.LLC_MISS.LOCAL_DRAM", "MSRIndex": "0x1a6,0x1a7", - "MSRValue": "0x0600400002", + "MSRValue": "0x600400002", "Offcore": "1", - "PublicDescription": "Counts all demand data writes (RFOs) miss the L3 and the data is returned from local dram", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -506,7 +485,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x103FC00002", "Offcore": "1", - "PublicDescription": "Counts all demand data writes (RFOs) miss the L3 and the modified data is transferred from remote cache", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -519,7 +497,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3FBFC00040", "Offcore": "1", - "PublicDescription": "Counts all prefetch (that bring data to LLC only) code reads miss in the L3", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -532,7 +509,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3FBFC00010", "Offcore": "1", - "PublicDescription": "Counts prefetch (that bring data to L2) data reads miss in the L3", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -545,7 +521,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3FBFC00020", "Offcore": "1", - "PublicDescription": "Counts all prefetch (that bring data to L2) RFOs miss in the L3", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -558,7 +533,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3FBFC00200", "Offcore": "1", - "PublicDescription": "Counts prefetch (that bring data to LLC only) code reads miss in the L3", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -571,7 +545,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3FBFC00080", "Offcore": "1", - "PublicDescription": "Counts all prefetch (that bring data to LLC only) data reads miss in the L3", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -584,7 +557,6 @@ "MSRIndex": "0x1a6,0x1a7", "MSRValue": "0x3FBFC00100", "Offcore": "1", - "PublicDescription": "Counts all prefetch (that bring data to LLC only) RFOs miss in the L3", "SampleAfterValue": "100003", "UMask": "0x1" }, @@ -772,4 +744,4 @@ "SampleAfterValue": "2000003", "UMask": "0x40" } -]
\ No newline at end of file +] diff --git a/tools/perf/pmu-events/arch/x86/haswellx/other.json b/tools/perf/pmu-events/arch/x86/haswellx/other.json index 4c6b9d34325a..7ca34f09b185 100644 --- a/tools/perf/pmu-events/arch/x86/haswellx/other.json +++ b/tools/perf/pmu-events/arch/x86/haswellx/other.json @@ -40,4 +40,4 @@ "SampleAfterValue": "2000003", "UMask": "0x1" } -]
\ No newline at end of file +] diff --git a/tools/perf/pmu-events/arch/x86/haswellx/pipeline.json b/tools/perf/pmu-events/arch/x86/haswellx/pipeline.json index a53f28ec9270..6165933ee1a4 100644 --- a/tools/perf/pmu-events/arch/x86/haswellx/pipeline.json +++ b/tools/perf/pmu-events/arch/x86/haswellx/pipeline.json @@ -1295,11 +1295,11 @@ "BriefDescription": "Cycles with less than 10 actually retired uops.", "Counter": "0,1,2,3", "CounterHTOff": "0,1,2,3", - "CounterMask": "10", + "CounterMask": "16", "EventCode": "0xC2", "EventName": "UOPS_RETIRED.TOTAL_CYCLES", "Invert": "1", "SampleAfterValue": "2000003", "UMask": "0x1" } -]
\ No newline at end of file +] diff --git a/tools/perf/pmu-events/arch/x86/haswellx/uncore-cache.json b/tools/perf/pmu-events/arch/x86/haswellx/uncore-cache.json index 58ed6d33d1f4..b48833d1c170 100644 --- a/tools/perf/pmu-events/arch/x86/haswellx/uncore-cache.json +++ b/tools/perf/pmu-events/arch/x86/haswellx/uncore-cache.json @@ -1,12 +1,63 @@ [ { - "BriefDescription": "Uncore cache clock ticks", + "BriefDescription": "Bounce Control", + "Counter": "0,1,2,3", + "EventCode": "0xA", + "EventName": "UNC_C_BOUNCE_CONTROL", + "PerPkg": "1", + "Unit": "CBO" + }, + { + "BriefDescription": "Uncore Clocks", "Counter": "0,1,2,3", "EventName": "UNC_C_CLOCKTICKS", "PerPkg": "1", "Unit": "CBO" }, { + "BriefDescription": "Counter 0 Occupancy", + "Counter": "0,1,2,3", + "EventCode": "0x1F", + "EventName": "UNC_C_COUNTER0_OCCUPANCY", + "PerPkg": "1", + "Unit": "CBO" + }, + { + "BriefDescription": "FaST wire asserted", + "Counter": "0,1", + "EventCode": "0x9", + "EventName": "UNC_C_FAST_ASSERTED", + "PerPkg": "1", + "Unit": "CBO" + }, + { + "BriefDescription": "Cache Lookups; Data Read Request", + "Counter": "0,1,2,3", + "EventCode": "0x34", + "EventName": "UNC_C_LLC_LOOKUP.DATA_READ", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "CBO" + }, + { + "BriefDescription": "Cache Lookups; Write Requests", + "Counter": "0,1,2,3", + "EventCode": "0x34", + "EventName": "UNC_C_LLC_LOOKUP.WRITE", + "PerPkg": "1", + "UMask": "0x5", + "Unit": "CBO" + }, + { + "BriefDescription": "Cache Lookups; External Snoop Request", + "Counter": "0,1,2,3", + "EventCode": "0x34", + "EventName": "UNC_C_LLC_LOOKUP.REMOTE_SNOOP", + "PerPkg": "1", + "UMask": "0x9", + "Unit": "CBO" + }, + { "BriefDescription": "All LLC Misses (code+ data rd + data wr - including demand and prefetch)", "Counter": "0,1,2,3", "EventCode": "0x34", @@ -18,6 +69,24 @@ "Unit": "CBO" }, { + "BriefDescription": "Cache Lookups; Lookups that Match NID", + "Counter": "0,1,2,3", + "EventCode": "0x34", + "EventName": "UNC_C_LLC_LOOKUP.NID", + "PerPkg": "1", + "UMask": "0x41", + "Unit": "CBO" + }, + { + "BriefDescription": "Cache Lookups; Any Read Request", + "Counter": "0,1,2,3", + "EventCode": "0x34", + "EventName": "UNC_C_LLC_LOOKUP.READ", + "PerPkg": "1", + "UMask": "0x21", + "Unit": "CBO" + }, + { "BriefDescription": "M line evictions from LLC (writebacks to memory)", "Counter": "0,1,2,3", "EventCode": "0x37", @@ -28,6 +97,1030 @@ "Unit": "CBO" }, { + "BriefDescription": "Lines Victimized; Lines in E state", + "Counter": "0,1,2,3", + "EventCode": "0x37", + "EventName": "UNC_C_LLC_VICTIMS.E_STATE", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CBO" + }, + { + "BriefDescription": "Lines in S State", + "Counter": "0,1,2,3", + "EventCode": "0x37", + "EventName": "UNC_C_LLC_VICTIMS.S_STATE", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CBO" + }, + { + "BriefDescription": "Lines Victimized", + "Counter": "0,1,2,3", + "EventCode": "0x37", + "EventName": "UNC_C_LLC_VICTIMS.F_STATE", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CBO" + }, + { + "BriefDescription": "Lines Victimized; Victimized Lines that Match NID", + "Counter": "0,1,2,3", + "EventCode": "0x37", + "EventName": "UNC_C_LLC_VICTIMS.NID", + "PerPkg": "1", + "UMask": "0x40", + "Unit": "CBO" + }, + { + "BriefDescription": "Lines Victimized", + "Counter": "0,1,2,3", + "EventCode": "0x37", + "EventName": "UNC_C_LLC_VICTIMS.MISS", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CBO" + }, + { + "BriefDescription": "Cbo Misc; Silent Snoop Eviction", + "Counter": "0,1,2,3", + "EventCode": "0x39", + "EventName": "UNC_C_MISC.RSPI_WAS_FSE", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CBO" + }, + { + "BriefDescription": "Cbo Misc; Write Combining Aliasing", + "Counter": "0,1,2,3", + "EventCode": "0x39", + "EventName": "UNC_C_MISC.WC_ALIASING", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CBO" + }, + { + "BriefDescription": "Cbo Misc", + "Counter": "0,1,2,3", + "EventCode": "0x39", + "EventName": "UNC_C_MISC.STARTED", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CBO" + }, + { + "BriefDescription": "Cbo Misc; RFO HitS", + "Counter": "0,1,2,3", + "EventCode": "0x39", + "EventName": "UNC_C_MISC.RFO_HIT_S", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CBO" + }, + { + "BriefDescription": "Cbo Misc; Clean Victim with raw CV=0", + "Counter": "0,1,2,3", + "EventCode": "0x39", + "EventName": "UNC_C_MISC.CVZERO_PREFETCH_VICTIM", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CBO" + }, + { + "BriefDescription": "Cbo Misc; DRd hitting non-M with raw CV=0", + "Counter": "0,1,2,3", + "EventCode": "0x39", + "EventName": "UNC_C_MISC.CVZERO_PREFETCH_MISS", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CBO" + }, + { + "BriefDescription": "LRU Queue; LRU Age 0", + "Counter": "0,1,2,3", + "EventCode": "0x3C", + "EventName": "UNC_C_QLRU.AGE0", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CBO" + }, + { + "BriefDescription": "LRU Queue; LRU Age 1", + "Counter": "0,1,2,3", + "EventCode": "0x3C", + "EventName": "UNC_C_QLRU.AGE1", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CBO" + }, + { + "BriefDescription": "LRU Queue; LRU Age 2", + "Counter": "0,1,2,3", + "EventCode": "0x3C", + "EventName": "UNC_C_QLRU.AGE2", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CBO" + }, + { + "BriefDescription": "LRU Queue; LRU Age 3", + "Counter": "0,1,2,3", + "EventCode": "0x3C", + "EventName": "UNC_C_QLRU.AGE3", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CBO" + }, + { + "BriefDescription": "LRU Queue; LRU Bits Decremented", + "Counter": "0,1,2,3", + "EventCode": "0x3C", + "EventName": "UNC_C_QLRU.LRU_DECREMENT", + "PerPkg": "1", + "UMask": "0x10", + "Unit": "CBO" + }, + { + "BriefDescription": "LRU Queue; Non-0 Aged Victim", + "Counter": "0,1,2,3", + "EventCode": "0x3C", + "EventName": "UNC_C_QLRU.VICTIM_NON_ZERO", + "PerPkg": "1", + "UMask": "0x20", + "Unit": "CBO" + }, + { + "BriefDescription": "AD Ring In Use; Up and Even", + "Counter": "0,1,2,3", + "EventCode": "0x1B", + "EventName": "UNC_C_RING_AD_USED.UP_EVEN", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CBO" + }, + { + "BriefDescription": "AD Ring In Use; Up and Odd", + "Counter": "0,1,2,3", + "EventCode": "0x1B", + "EventName": "UNC_C_RING_AD_USED.UP_ODD", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CBO" + }, + { + "BriefDescription": "AD Ring In Use; Down and Even", + "Counter": "0,1,2,3", + "EventCode": "0x1B", + "EventName": "UNC_C_RING_AD_USED.DOWN_EVEN", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CBO" + }, + { + "BriefDescription": "AD Ring In Use; Down and Odd", + "Counter": "0,1,2,3", + "EventCode": "0x1B", + "EventName": "UNC_C_RING_AD_USED.DOWN_ODD", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CBO" + }, + { + "BriefDescription": "AD Ring In Use; Up", + "Counter": "0,1,2,3", + "EventCode": "0x1B", + "EventName": "UNC_C_RING_AD_USED.UP", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "CBO" + }, + { + "BriefDescription": "AD Ring In Use; Down", + "Counter": "0,1,2,3", + "EventCode": "0x1B", + "EventName": "UNC_C_RING_AD_USED.DOWN", + "PerPkg": "1", + "UMask": "0xC", + "Unit": "CBO" + }, + { + "BriefDescription": "AD Ring In Use; All", + "Counter": "0,1,2,3", + "EventCode": "0x1B", + "EventName": "UNC_C_RING_AD_USED.ALL", + "PerPkg": "1", + "UMask": "0xF", + "Unit": "CBO" + }, + { + "BriefDescription": "AK Ring In Use; Up and Even", + "Counter": "0,1,2,3", + "EventCode": "0x1C", + "EventName": "UNC_C_RING_AK_USED.UP_EVEN", + "PerPkg": "1", + "UMask": "0x1", + "Unit": "CBO" + }, + { + "BriefDescription": "AK Ring In Use; Up and Odd", + "Counter": "0,1,2,3", + "EventCode": "0x1C", + "EventName": "UNC_C_RING_AK_USED.UP_ODD", + "PerPkg": "1", + "UMask": "0x2", + "Unit": "CBO" + }, + { + "BriefDescription": "AK Ring In Use; Down and Even", + "Counter": "0,1,2,3", + "EventCode": "0x1C", + "EventName": "UNC_C_RING_AK_USED.DOWN_EVEN", + "PerPkg": "1", + "UMask": "0x4", + "Unit": "CBO" + }, + { + "BriefDescription": "AK Ring In Use; Down and Odd", + "Counter": "0,1,2,3", + "EventCode": "0x1C", + "EventName": "UNC_C_RING_AK_USED.DOWN_ODD", + "PerPkg": "1", + "UMask": "0x8", + "Unit": "CBO" + }, + { + "BriefDescription": "AK Ring In Use; Up", + "Counter": "0,1,2,3", + "EventCode": "0x1C", + "EventName": "UNC_C_RING_AK_USED.UP", + "PerPkg": "1", + "UMask": "0x3", + "Unit": "CBO" + }, + { + "BriefDescription": "AK Ring In Use; Down", + "Counter": "0,1,2,3", + "EventCode": "0x1C", + "EventName": "UNC_C_RING_AK_USED.DOWN", + "PerPkg": "1", + "UMask": "0xC", + "Unit": "CBO" + }, + { + "BriefDescription": "AK Ring In Use; All", + "Counter": "0,1,2,3", + "EventCode": " |
