diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2024-07-19 15:22:14 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2024-07-19 15:22:14 -0700 |
| commit | aba9753c0677e860f982edff98c7fe5a2b97758c (patch) | |
| tree | 624baf7af863048d3efc9c53d64c81dee434ab9e | |
| parent | d7e78951a8b8b53e4d52c689d927a6887e6cfadf (diff) | |
| parent | 17199dfccd4b7f7e0c059ef43bef6e0078423476 (diff) | |
Merge tag 'tty-6.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty
Pull tty / serial updates from Greg KH:
"Here is a small set of tty and serial driver updates for 6.11-rc1. Not
much happened this cycle, unlike the previous kernel release which had
lots of "excitement" in this part of the kernel. Included in here are
the following changes:
- dt binding updates for new platforms
- 8250 driver updates
- various small serial driver fixes and updates
- printk/console naming and matching attempt #2 (was reverted for
6.10-final, should be good to go this time around, acked by the
relevant maintainers).
All of these have been in linux-next for a while with no reported
issues"
* tag 'tty-6.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (22 commits)
Documentation: kernel-parameters: Add DEVNAME:0.0 format for serial ports
serial: core: Add serial_base_match_and_update_preferred_console()
printk: Add match_devname_and_update_preferred_console()
serial: sc16is7xx: hardware reset chip if reset-gpios is defined in DT
dt-bindings: serial: sc16is7xx: add reset-gpios
dt-bindings: serial: vt8500-uart: convert to json-schema
serial: 8250_platform: Explicitly show we initialise ISA ports only once
tty: add missing MODULE_DESCRIPTION() macros
dt-bindings: serial: mediatek,uart: add MT7988
serial: sh-sci: Add support for RZ/V2H(P) SoC
dt-bindings: serial: Add documentation for Renesas RZ/V2H(P) (R9A09G057) SCIF support
dt-bindings: serial: renesas,scif: Make 'interrupt-names' property as required
dt-bindings: serial: renesas,scif: Validate 'interrupts' and 'interrupt-names'
dt-bindings: serial: renesas,scif: Move ref for serial.yaml at the end
riscv: dts: starfive: jh7110: Add the core reset and jh7110 compatible for uarts
serial: 8250_dw: Use reset array API to get resets
dt-bindings: serial: snps-dw-apb-uart: Add one more reset signal for StarFive JH7110 SoC
serial: 8250: Extract platform driver
serial: 8250: Extract RSA bits
serial: imx: stop casting struct uart_port to struct imx_port
...
41 files changed, 1000 insertions, 598 deletions
diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index 2deccf57ecee..6a597e911e9c 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -792,6 +792,25 @@ Documentation/networking/netconsole.rst for an alternative. + <DEVNAME>:<n>.<n>[,options] + Use the specified serial port on the serial core bus. + The addressing uses DEVNAME of the physical serial port + device, followed by the serial core controller instance, + and the serial port instance. The options are the same + as documented for the ttyS addressing above. + + The mapping of the serial ports to the tty instances + can be viewed with: + + $ ls -d /sys/bus/serial-base/devices/*:*.*/tty/* + /sys/bus/serial-base/devices/00:04:0.0/tty/ttyS0 + + In the above example, the console can be addressed with + console=00:04:0.0. Note that a console addressed this + way will only get added when the related device driver + is ready. The use of an earlycon parameter in addition to + the console may be desired for console output early on. + uart[8250],io,<addr>[,options] uart[8250],mmio,<addr>[,options] uart[8250],mmio16,<addr>[,options] diff --git a/Documentation/devicetree/bindings/serial/mediatek,uart.yaml b/Documentation/devicetree/bindings/serial/mediatek,uart.yaml index 303d02ca4e1b..ff61ffdcad1d 100644 --- a/Documentation/devicetree/bindings/serial/mediatek,uart.yaml +++ b/Documentation/devicetree/bindings/serial/mediatek,uart.yaml @@ -37,6 +37,7 @@ properties: - mediatek,mt7623-uart - mediatek,mt7629-uart - mediatek,mt7986-uart + - mediatek,mt7988-uart - mediatek,mt8127-uart - mediatek,mt8135-uart - mediatek,mt8173-uart diff --git a/Documentation/devicetree/bindings/serial/nxp,sc16is7xx.yaml b/Documentation/devicetree/bindings/serial/nxp,sc16is7xx.yaml index 5dec15b7e7c3..88871480018e 100644 --- a/Documentation/devicetree/bindings/serial/nxp,sc16is7xx.yaml +++ b/Documentation/devicetree/bindings/serial/nxp,sc16is7xx.yaml @@ -28,6 +28,9 @@ properties: clocks: maxItems: 1 + reset-gpios: + maxItems: 1 + clock-frequency: description: When there is no clock provider visible to the platform, this @@ -91,6 +94,7 @@ unevaluatedProperties: false examples: - | #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/gpio/gpio.h> i2c { #address-cells = <1>; #size-cells = <0>; @@ -120,6 +124,7 @@ examples: compatible = "nxp,sc16is752"; reg = <0x54>; clocks = <&clk20m>; + reset-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; interrupt-parent = <&gpio3>; interrupts = <7 IRQ_TYPE_EDGE_FALLING>; nxp,modem-control-line-ports = <0 1>; /* Ports 0 and 1 as modem control lines */ diff --git a/Documentation/devicetree/bindings/serial/renesas,scif.yaml b/Documentation/devicetree/bindings/serial/renesas,scif.yaml index f3a3eb2831e9..afc7c05898a1 100644 --- a/Documentation/devicetree/bindings/serial/renesas,scif.yaml +++ b/Documentation/devicetree/bindings/serial/renesas,scif.yaml @@ -9,9 +9,6 @@ title: Renesas Serial Communication Interface with FIFO (SCIF) maintainers: - Geert Uytterhoeven <geert+renesas@glider.be> -allOf: - - $ref: serial.yaml# - properties: compatible: oneOf: @@ -83,6 +80,8 @@ properties: - renesas,scif-r9a08g045 # RZ/G3S - const: renesas,scif-r9a07g044 # RZ/G2{L,LC} fallback + - const: renesas,scif-r9a09g057 # RZ/V2H(P) + reg: maxItems: 1 @@ -95,28 +94,25 @@ properties: - description: Receive buffer full interrupt - description: Transmit buffer empty interrupt - description: Break interrupt - - items: - - description: Error interrupt - - description: Receive buffer full interrupt - - description: Transmit buffer empty interrupt - - description: Break interrupt - description: Data Ready interrupt - description: Transmit End interrupt + - description: Transmit End/Data Ready interrupt + - description: Receive buffer full interrupt (EDGE trigger) + - description: Transmit buffer empty interrupt (EDGE trigger) + minItems: 4 interrupt-names: - oneOf: - - items: - - const: eri - - const: rxi - - const: txi - - const: bri - - items: - - const: eri - - const: rxi - - const: txi - - const: bri - - const: dri - - const: tei + minItems: 4 + items: + - const: eri + - const: rxi + - const: txi + - const: bri + - const: dri + - const: tei + - const: tei-dri + - const: rxi-edge + - const: txi-edge clocks: minItems: 1 @@ -161,18 +157,92 @@ required: - clock-names - power-domains -if: - properties: - compatible: - contains: - enum: - - renesas,rcar-gen2-scif - - renesas,rcar-gen3-scif - - renesas,rcar-gen4-scif - - renesas,scif-r9a07g044 -then: - required: - - resets +allOf: + - $ref: serial.yaml# + + - if: + properties: + compatible: + contains: + enum: + - renesas,rcar-gen2-scif + - renesas,rcar-gen3-scif + - renesas,rcar-gen4-scif + - renesas,scif-r9a07g044 + - renesas,scif-r9a09g057 + then: + required: + - resets + + - if: + properties: + compatible: + contains: + enum: + - renesas,rcar-gen1-scif + - renesas,rcar-gen2-scif + - renesas,rcar-gen3-scif + - renesas,rcar-gen4-scif + then: + properties: + interrupts: + maxItems: 1 + + interrupt-names: false + else: + required: + - interrupt-names + + - if: + properties: + compatible: + contains: + enum: + - renesas,scif-r7s72100 + then: + properties: + interrupts: + minItems: 4 + maxItems: 4 + + interrupt-names: + maxItems: 4 + + - if: + properties: + compatible: + contains: + enum: + - renesas,scif-r7s9210 + - renesas,scif-r9a07g044 + then: + properties: + interrupts: + minItems: 6 + maxItems: 6 + + interrupt-names: + minItems: 6 + maxItems: 6 + + - if: + properties: + compatible: + contains: + const: renesas,scif-r9a09g057 + then: + properties: + clocks: + maxItems: 1 + + clock-names: + maxItems: 1 + + interrupts: + minItems: 9 + + interrupt-names: + minItems: 9 unevaluatedProperties: false diff --git a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml index 1001d2a6ace8..4cdb0dcaccf3 100644 --- a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml +++ b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml @@ -13,6 +13,20 @@ allOf: - $ref: serial.yaml# - $ref: rs485.yaml# + - if: + properties: + compatible: + contains: + const: starfive,jh7110-uart + then: + properties: + resets: + minItems: 2 + else: + properties: + resets: + maxItems: 1 + properties: compatible: oneOf: @@ -48,6 +62,7 @@ properties: - enum: - starfive,jh7100-hsuart - starfive,jh7100-uart + - starfive,jh7110-uart - const: snps,dw-apb-uart - const: snps,dw-apb-uart @@ -82,7 +97,8 @@ properties: type: boolean resets: - maxItems: 1 + minItems: 1 + maxItems: 2 reg-shift: true diff --git a/Documentation/devicetree/bindings/serial/via,vt8500-uart.yaml b/Documentation/devicetree/bindings/serial/via,vt8500-uart.yaml new file mode 100644 index 000000000000..9c6819241a49 --- /dev/null +++ b/Documentation/devicetree/bindings/serial/via,vt8500-uart.yaml @@ -0,0 +1,46 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) + +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/serial/via,vt8500-uart.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: VIA VT8500 and WonderMedia WM8xxx UART Controller + +maintainers: + - Alexey Charkov <alchark@gmail.com> + +allOf: + - $ref: serial.yaml + +properties: + compatible: + enum: + - via,vt8500-uart # up to WM8850/WM8950 + - wm,wm8880-uart # for WM8880 and later + + clocks: + maxItems: 1 + + interrupts: + maxItems: 1 + + reg: + maxItems: 1 + +required: + - compatible + - clocks + - interrupts + - reg + +unevaluatedProperties: false + +examples: + - | + serial@d8200000 { + compatible = "via,vt8500-uart"; + reg = <0xd8200000 0x1040>; + interrupts = <32>; + clocks = <&clkuart0>; + }; diff --git a/Documentation/devicetree/bindings/serial/vt8500-uart.txt b/Documentation/devicetree/bindings/serial/vt8500-uart.txt deleted file mode 100644 index 2b64e6107fb3..000000000000 --- a/Documentation/devicetree/bindings/serial/vt8500-uart.txt +++ /dev/null @@ -1,27 +0,0 @@ -* VIA VT8500 and WonderMedia WM8xxx UART Controller - -Required properties: -- compatible: should be "via,vt8500-uart" (for VIA/WonderMedia chips up to and - including WM8850/WM8950), or "wm,wm8880-uart" (for WM8880 and later) - -- reg: base physical address of the controller and length of memory mapped - region. - -- interrupts: hardware interrupt number - -- clocks: shall be the input parent clock phandle for the clock. This should - be the 24Mhz reference clock. - -Aliases may be defined to ensure the correct ordering of the uarts. - -Example: - aliases { - serial0 = &uart0; - }; - - uart0: serial@d8200000 { - compatible = "via,vt8500-uart"; - reg = <0xd8200000 0x1040>; - interrupts = <32>; - clocks = <&clkuart0>; - }; diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi index 5ac70759e0ab..0d8339357bad 100644 --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi @@ -387,12 +387,13 @@ }; uart0: serial@10000000 { - compatible = "snps,dw-apb-uart"; + compatible = "starfive,jh7110-uart", "snps,dw-apb-uart"; reg = <0x0 0x10000000 0x0 0x10000>; clocks = <&syscrg JH7110_SYSCLK_UART0_CORE>, <&syscrg JH7110_SYSCLK_UART0_APB>; clock-names = "baudclk", "apb_pclk"; - resets = <&syscrg JH7110_SYSRST_UART0_APB>; + resets = <&syscrg JH7110_SYSRST_UART0_APB>, + <&syscrg JH7110_SYSRST_UART0_CORE>; interrupts = <32>; reg-io-width = <4>; reg-shift = <2>; @@ -400,12 +401,13 @@ }; uart1: serial@10010000 { - compatible = "snps,dw-apb-uart"; + compatible = "starfive,jh7110-uart", "snps,dw-apb-uart"; reg = <0x0 0x10010000 0x0 0x10000>; clocks = <&syscrg JH7110_SYSCLK_UART1_CORE>, <&syscrg JH7110_SYSCLK_UART1_APB>; clock-names = "baudclk", "apb_pclk"; - resets = <&syscrg JH7110_SYSRST_UART1_APB>; + resets = <&syscrg JH7110_SYSRST_UART1_APB>, + <&syscrg JH7110_SYSRST_UART1_CORE>; interrupts = <33>; reg-io-width = <4>; reg-shift = <2>; @@ -413,12 +415,13 @@ }; uart2: serial@10020000 { - compatible = "snps,dw-apb-uart"; + compatible = "starfive,jh7110-uart", "snps,dw-apb-uart"; reg = <0x0 0x10020000 0x0 0x10000>; clocks = <&syscrg JH7110_SYSCLK_UART2_CORE>, <&syscrg JH7110_SYSCLK_UART2_APB>; clock-names = "baudclk", "apb_pclk"; - resets = <&syscrg JH7110_SYSRST_UART2_APB>; + resets = <&syscrg JH7110_SYSRST_UART2_APB>, + <&syscrg JH7110_SYSRST_UART2_CORE>; interrupts = <34>; reg-io-width = <4>; reg-shift = <2>; @@ -642,12 +645,13 @@ }; uart3: serial@12000000 { - compatible = "snps,dw-apb-uart"; + compatible = "starfive,jh7110-uart", "snps,dw-apb-uart"; reg = <0x0 0x12000000 0x0 0x10000>; clocks = <&syscrg JH7110_SYSCLK_UART3_CORE>, <&syscrg JH7110_SYSCLK_UART3_APB>; clock-names = "baudclk", "apb_pclk"; - resets = <&syscrg JH7110_SYSRST_UART3_APB>; + resets = <&syscrg JH7110_SYSRST_UART3_APB>, + <&syscrg JH7110_SYSRST_UART3_CORE>; interrupts = <45>; reg-io-width = <4>; reg-shift = <2>; @@ -655,12 +659,13 @@ }; uart4: serial@12010000 { - compatible = "snps,dw-apb-uart"; + compatible = "starfive,jh7110-uart", "snps,dw-apb-uart"; reg = <0x0 0x12010000 0x0 0x10000>; clocks = <&syscrg JH7110_SYSCLK_UART4_CORE>, <&syscrg JH7110_SYSCLK_UART4_APB>; clock-names = "baudclk", "apb_pclk"; - resets = <&syscrg JH7110_SYSRST_UART4_APB>; + resets = <&syscrg JH7110_SYSRST_UART4_APB>, + <&syscrg JH7110_SYSRST_UART4_CORE>; interrupts = <46>; reg-io-width = <4>; reg-shift = <2>; @@ -668,12 +673,13 @@ }; uart5: serial@12020000 { - compatible = "snps,dw-apb-uart"; + compatible = "starfive,jh7110-uart", "snps,dw-apb-uart"; reg = <0x0 0x12020000 0x0 0x10000>; clocks = <&syscrg JH7110_SYSCLK_UART5_CORE>, <&syscrg JH7110_SYSCLK_UART5_APB>; clock-names = "baudclk", "apb_pclk"; - resets = <&syscrg JH7110_SYSRST_UART5_APB>; + resets = <&syscrg JH7110_SYSRST_UART5_APB>, + <&syscrg JH7110_SYSRST_UART5_CORE>; interrupts = <47>; reg-io-width = <4>; reg-shift = <2>; diff --git a/drivers/tty/amiserial.c b/drivers/tty/amiserial.c index 8c964da75f2d..37164289277b 100644 --- a/drivers/tty/amiserial.c +++ b/drivers/tty/amiserial.c @@ -1660,5 +1660,6 @@ console_initcall(amiserial_console_init); #endif /* CONFIG_SERIAL_CONSOLE && !MODULE */ +MODULE_DESCRIPTION("Serial driver for the amiga builtin port"); MODULE_LICENSE("GPL"); MODULE_ALIAS("platform:amiga-serial"); diff --git a/drivers/tty/goldfish.c b/drivers/tty/goldfish.c index 34421ec06a69..c60745f8e621 100644 --- a/drivers/tty/goldfish.c +++ b/drivers/tty/goldfish.c @@ -470,4 +470,5 @@ static struct platform_driver goldfish_tty_platform_driver = { module_platform_driver(goldfish_tty_platform_driver); +MODULE_DESCRIPTION("Goldfish TTY Driver"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/tty/n_gsm.c b/drivers/tty/n_gsm.c index be35f7334ecd..5d37a0984916 100644 --- a/drivers/tty/n_gsm.c +++ b/drivers/tty/n_gsm.c @@ -4634,5 +4634,6 @@ module_init(gsm_init); module_exit(gsm_exit); +MODULE_DESCRIPTION("GSM 0710 tty multiplexor"); MODULE_LICENSE("GPL"); MODULE_ALIAS_LDISC(N_GSM0710); diff --git a/drivers/tty/n_hdlc.c b/drivers/tty/n_hdlc.c index 1615f074ab86..4a4dc58b866a 100644 --- a/drivers/tty/n_hdlc.c +++ b/drivers/tty/n_hdlc.c @@ -822,6 +822,7 @@ static void __exit n_hdlc_exit(void) module_init(n_hdlc_init); module_exit(n_hdlc_exit); +MODULE_DESCRIPTION("HDLC line discipline support"); MODULE_LICENSE("GPL"); MODULE_AUTHOR("Paul Fulghum paulkf@microgate.com"); module_param(maxframe, int, 0); diff --git a/drivers/tty/serial/8250/8250.h b/drivers/tty/serial/8250/8250.h index 6a7b286f6f5a..e5310c65cf52 100644 --- a/drivers/tty/serial/8250/8250.h +++ b/drivers/tty/serial/8250/8250.h @@ -9,7 +9,7 @@ #include <linux/bits.h> #include <linux/serial_8250.h> -#include <linux/serial_reg.h> +#include <linux/serial_core.h> #include <linux/dmaengine.h> #include "../serial_mctrl_gpio.h" @@ -93,6 +93,10 @@ struct serial8250_config { #define UART_BUG_THRE BIT(3) /* UART has buggy THRE reassertion */ #define UART_BUG_TXRACE BIT(5) /* UART Tx fails to set remote DR */ +/* Module parameters */ +#define UART_NR CONFIG_SERIAL_8250_NR_UARTS + +extern unsigned int nr_uarts; #ifdef CONFIG_SERIAL_8250_SHARE_IRQ #define SERIAL8250_SHARE_IRQS 1 @@ -100,6 +104,9 @@ struct serial8250_config { #define SERIAL8250_SHARE_IRQS 0 #endif +extern unsigned int share_irqs; +extern unsigned int skip_txen_test; + #define SERIAL8250_PORT_FLAGS(_base, _irq, _flags) \ { \ .iobase = _base, \ @@ -111,6 +118,19 @@ struct serial8250_config { #define SERIAL8250_PORT(_base, _irq) SERIAL8250_PORT_FLAGS(_base, _irq, 0) +extern struct uart_driver serial8250_reg; +void serial8250_register_ports(struct uart_driver *drv, struct device *dev); + +/* Legacy ISA bus related APIs */ +typedef void (*serial8250_isa_config_fn)(int, struct uart_port *, u32 *); +extern serial8250_isa_config_fn serial8250_isa_config; + +void serial8250_isa_init_ports(void); + +extern struct platform_device *serial8250_isa_devs; + +extern const struct uart_ops *univ8250_port_base_ops; +extern struct uart_ops univ8250_port_ops; static inline int serial_in(struct uart_8250_port *up, int offset) { @@ -200,6 +220,7 @@ static inline bool serial8250_clear_THRI(struct uart_8250_port *up) return true; } +struct uart_8250_port *serial8250_setup_port(int index); struct uart_8250_port *serial8250_get_port(int line); void serial8250_rpm_get(struct uart_8250_port *p); @@ -301,6 +322,12 @@ static inline int serial8250_pnp_init(void) { return 0; } static inline void serial8250_pnp_exit(void) { } #endif +#ifdef CONFIG_SERIAL_8250_RSA +void univ8250_rsa_support(struct uart_ops *ops); +#else +static inline void univ8250_rsa_support(struct uart_ops *ops) { } +#endif + #ifdef CONFIG_SERIAL_8250_FINTEK int fintek_8250_probe(struct uart_8250_port *uart); #else diff --git a/drivers/tty/serial/8250/8250_core.c b/drivers/tty/serial/8250/8250_core.c index b0adafc44747..29e4b83e0376 100644 --- a/drivers/tty/serial/8250/8250_core.c +++ b/drivers/tty/serial/8250/8250_core.c @@ -6,11 +6,9 @@ * * Copyright (C) 2001 Russell King. * - * Supports: ISA-compatible 8250/16550 ports - * PNP 8250/16550 ports + * Supports: * early_serial_setup() ports * userspace-configurable "phantom" ports - * "serial8250" platform devices * serial8250_register_8250_port() ports */ @@ -35,52 +33,13 @@ #include <linux/string_helpers.h> #include <linux/uaccess.h> #include <linux/io.h> -#ifdef CONFIG_SPARC -#include <linux/sunserialcore.h> -#endif #include <asm/irq.h> #include "8250.h" -/* - * Configuration: - * share_irqs - whether we pass IRQF_SHARED to request_irq(). This option - * is unsafe when used on edge-triggered interrupts. - */ -static unsigned int share_irqs = SERIAL8250_SHARE_IRQS; - -static unsigned int nr_uarts = CONFIG_SERIAL_8250_RUNTIME_UARTS; - -static struct uart_driver serial8250_reg; - -static unsigned int skip_txen_test; /* force skip of txen test at init time */ - #define PASS_LIMIT 512 -#include <asm/serial.h> -/* - * SERIAL_PORT_DFNS tells us about built-in ports that have no - * standard enumeration mechanism. Platforms that can find all - * serial ports via mechanisms like ACPI or PCI need not supply it. - */ -#ifndef SERIAL_PORT_DFNS -#define SERIAL_PORT_DFNS -#endif - -static const struct old_serial_port old_serial_port[] = { - SERIAL_PORT_DFNS /* defined in asm/serial.h */ -}; - -#define UART_NR CONFIG_SERIAL_8250_NR_UARTS - -#ifdef CONFIG_SERIAL_8250_RSA - -#define PORT_RSA_MAX 4 -static unsigned long probe_rsa[PORT_RSA_MAX]; -static unsigned int probe_rsa_count; -#endif /* CONFIG_SERIAL_8250_RSA */ - struct irq_info { struct hlist_node node; int irq; @@ -345,45 +304,8 @@ static void univ8250_release_irq(struct uart_8250_port *up) serial_unlink_irq_chain(up); } -#ifdef CONFIG_SERIAL_8250_RSA -static int serial8250_request_rsa_resource(struct uart_8250_port *up) -{ - unsigned long start = UART_RSA_BASE << up->port.regshift; - unsigned int size = 8 << up->port.regshift; - struct uart_port *port = &up->port; - int ret = -EINVAL; - - switch (port->iotype) { - case UPIO_HUB6: - case UPIO_PORT: - start += port->iobase; - if (request_region(start, size, "serial-rsa")) - ret = 0; - else - ret = -EBUSY; - break; - } - - return ret; -} - -static void serial8250_release_rsa_resource(struct uart_8250_port *up) -{ - unsigned long offset = UART_RSA_BASE << up->port.regshift; - unsigned int size = 8 << up->port.regshift; - struct uart_port *port = &up->port; - - switch (port->iotype) { - case UPIO_HUB6: - case U |
