From 016e95b1473798f1e755a9e20f81391119ae7399 Mon Sep 17 00:00:00 2001 From: Matti Vaittinen Date: Mon, 15 Dec 2025 15:19:00 +0200 Subject: mfd: rohm-bd71828: Use regmap_reg_range() The regmap range tables tend to be somewhat verbose. Using the regmap_reg_range() can make the definitions slightly mode compact. Tidy the regmap range tables by using the regmap_reg_range(). Signed-off-by: Matti Vaittinen Link: https://patch.msgid.link/49607e65ca117b096a50c5784b760bf62553e29a.1765804226.git.mazziesaccount@gmail.com Signed-off-by: Lee Jones --- drivers/mfd/rohm-bd71828.c | 64 +++++++++++++--------------------------------- 1 file changed, 18 insertions(+), 46 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/rohm-bd71828.c b/drivers/mfd/rohm-bd71828.c index 84a64c3b9c9f..2a43005b67ee 100644 --- a/drivers/mfd/rohm-bd71828.c +++ b/drivers/mfd/rohm-bd71828.c @@ -157,55 +157,27 @@ static struct mfd_cell bd71828_mfd_cells[] = { }; static const struct regmap_range bd71815_volatile_ranges[] = { - { - .range_min = BD71815_REG_SEC, - .range_max = BD71815_REG_YEAR, - }, { - .range_min = BD71815_REG_CONF, - .range_max = BD71815_REG_BAT_TEMP, - }, { - .range_min = BD71815_REG_VM_IBAT_U, - .range_max = BD71815_REG_CC_CTRL, - }, { - .range_min = BD71815_REG_CC_STAT, - .range_max = BD71815_REG_CC_CURCD_L, - }, { - .range_min = BD71815_REG_VM_BTMP_MON, - .range_max = BD71815_REG_VM_BTMP_MON, - }, { - .range_min = BD71815_REG_INT_STAT, - .range_max = BD71815_REG_INT_UPDATE, - }, { - .range_min = BD71815_REG_VM_VSYS_U, - .range_max = BD71815_REG_REX_CTRL_1, - }, { - .range_min = BD71815_REG_FULL_CCNTD_3, - .range_max = BD71815_REG_CCNTD_CHG_2, - }, + regmap_reg_range(BD71815_REG_SEC, BD71815_REG_YEAR), + regmap_reg_range(BD71815_REG_CONF, BD71815_REG_BAT_TEMP), + regmap_reg_range(BD71815_REG_VM_IBAT_U, BD71815_REG_CC_CTRL), + regmap_reg_range(BD71815_REG_CC_STAT, BD71815_REG_CC_CURCD_L), + regmap_reg_range(BD71815_REG_VM_BTMP_MON, BD71815_REG_VM_BTMP_MON), + regmap_reg_range(BD71815_REG_INT_STAT, BD71815_REG_INT_UPDATE), + regmap_reg_range(BD71815_REG_VM_VSYS_U, BD71815_REG_REX_CTRL_1), + regmap_reg_range(BD71815_REG_FULL_CCNTD_3, BD71815_REG_CCNTD_CHG_2), }; static const struct regmap_range bd71828_volatile_ranges[] = { - { - .range_min = BD71828_REG_PS_CTRL_1, - .range_max = BD71828_REG_PS_CTRL_1, - }, { - .range_min = BD71828_REG_PS_CTRL_3, - .range_max = BD71828_REG_PS_CTRL_3, - }, { - .range_min = BD71828_REG_RTC_SEC, - .range_max = BD71828_REG_RTC_YEAR, - }, { - /* - * For now make all charger registers volatile because many - * needs to be and because the charger block is not that - * performance critical. - */ - .range_min = BD71828_REG_CHG_STATE, - .range_max = BD71828_REG_CHG_FULL, - }, { - .range_min = BD71828_REG_INT_MAIN, - .range_max = BD71828_REG_IO_STAT, - }, + regmap_reg_range(BD71828_REG_PS_CTRL_1, BD71828_REG_PS_CTRL_1), + regmap_reg_range(BD71828_REG_PS_CTRL_3, BD71828_REG_PS_CTRL_3), + regmap_reg_range(BD71828_REG_RTC_SEC, BD71828_REG_RTC_YEAR), + /* + * For now make all charger registers volatile because many + * needs to be and because the charger block is not that + * performance critical. + */ + regmap_reg_range(BD71828_REG_CHG_STATE, BD71828_REG_CHG_FULL), + regmap_reg_range(BD71828_REG_INT_MAIN, BD71828_REG_IO_STAT), }; static const struct regmap_access_table bd71815_volatile_regs = { -- cgit v1.2.3 From ea6806346080098b68674b933e76a76f0a49a79f Mon Sep 17 00:00:00 2001 From: Matti Vaittinen Date: Mon, 15 Dec 2025 15:19:20 +0200 Subject: mfd: rohm-bd71828: Use standard file header format The MFD subsystem uses C-style comments also in the 'file header' section. Switch to this for the sake of the consistency. The header content is not changed. Suggested-by: Lee Jones Signed-off-by: Matti Vaittinen Link: https://patch.msgid.link/3cc6176eee16a7edc75c94d967a1de67be400e97.1765804226.git.mazziesaccount@gmail.com Signed-off-by: Lee Jones --- drivers/mfd/rohm-bd71828.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/rohm-bd71828.c b/drivers/mfd/rohm-bd71828.c index 2a43005b67ee..218945a8ec94 100644 --- a/drivers/mfd/rohm-bd71828.c +++ b/drivers/mfd/rohm-bd71828.c @@ -1,8 +1,9 @@ // SPDX-License-Identifier: GPL-2.0-only -// -// Copyright (C) 2019 ROHM Semiconductors -// -// ROHM BD71828/BD71815 PMIC driver +/* + * Copyright (C) 2019 ROHM Semiconductors + * + * ROHM BD71828/BD71815 PMIC driver + */ #include #include -- cgit v1.2.3 From af25277b1ddc6c65879247387d127c38c51ba9f0 Mon Sep 17 00:00:00 2001 From: Matti Vaittinen Date: Mon, 15 Dec 2025 15:19:35 +0200 Subject: mfd: rohm-bd71828: Support ROHM BD72720 The ROHM BD72720 is a power management IC which continues the BD71828 family of PMICs. Similarly to the BD71815 and BD71828, the BD72720 integrates regulators, charger, RTC, clock gate and GPIOs. The main difference to the earlier PMICs is that the BD72720 has two different I2C slave addresses. In addition to the registers behind the 'main I2C address', most of the charger (and to some extent LED) control is done via registers behind a 'secondary I2C slave address', 0x4c. Signed-off-by: Matti Vaittinen Link: https://patch.msgid.link/c7b3f1b25616a0add21cea38019e50a89873b6ac.1765804226.git.mazziesaccount@gmail.com Signed-off-by: Lee Jones --- drivers/mfd/Kconfig | 18 +- drivers/mfd/rohm-bd71828.c | 490 ++++++++++++++++++++++++++++++++++++++++++++- 2 files changed, 494 insertions(+), 14 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index aace5766b38a..699f095f831e 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -2217,20 +2217,22 @@ config MFD_ROHM_BD718XX and emergency shut down as well as 32,768KHz clock output. config MFD_ROHM_BD71828 - tristate "ROHM BD71828 and BD71815 Power Management IC" + tristate "ROHM BD718[15/28/79], BD72720 and BD73900 PMICs" depends on I2C=y depends on OF select REGMAP_I2C select REGMAP_IRQ select MFD_CORE help - Select this option to get support for the ROHM BD71828 and BD71815 - Power Management ICs. BD71828GW and BD71815AGW are single-chip power - management ICs mainly for battery-powered portable devices. - The BD71828 integrates 7 buck converters and 7 LDOs. The BD71815 - has 5 bucks, 7 LDOs, and a boost for driving LEDs. Both ICs provide - also a single-cell linear charger, a Coulomb counter, a real-time - clock (RTC), GPIOs and a 32.768 kHz clock gate. + Select this option to get support for the ROHM BD71815, BD71828, + BD71879, BD72720 and BD73900 Power Management ICs (PMICs). These are + single-chip Power Management ICs (PMIC), mainly for battery-powered + portable devices. + The BD71815 has 5 bucks, 7 LDOs, and a boost for driving LEDs. + The BD718[28/79] have 7 buck converters and 7 LDOs. + The BD72720 and the BD73900 have 10 bucks and 11 LDOs. + All ICs provide a single-cell linear charger, a Coulomb counter, + a Real-Time Clock (RTC), GPIOs and a 32.768 kHz clock gate. config MFD_ROHM_BD957XMUF tristate "ROHM BD9576MUF and BD9573MUF Power Management ICs" diff --git a/drivers/mfd/rohm-bd71828.c b/drivers/mfd/rohm-bd71828.c index 218945a8ec94..e54152a03510 100644 --- a/drivers/mfd/rohm-bd71828.c +++ b/drivers/mfd/rohm-bd71828.c @@ -2,7 +2,7 @@ /* * Copyright (C) 2019 ROHM Semiconductors * - * ROHM BD71828/BD71815 PMIC driver + * ROHM BD718[15/28/79] and BD72720 PMIC driver */ #include @@ -14,12 +14,29 @@ #include #include #include +#include #include #include #include #include #include +#define BD72720_TYPED_IRQ_REG(_irq, _stat_offset, _mask, _type_offset) \ + [_irq] = { \ + .reg_offset = (_stat_offset), \ + .mask = (_mask), \ + { \ + .type_reg_offset = (_type_offset), \ + .type_reg_mask = BD72720_GPIO_IRQ_TYPE_MASK, \ + .type_rising_val = BD72720_GPIO_IRQ_TYPE_RISING, \ + .type_falling_val = BD72720_GPIO_IRQ_TYPE_FALLING, \ + .type_level_low_val = BD72720_GPIO_IRQ_TYPE_LOW, \ + .type_level_high_val = BD72720_GPIO_IRQ_TYPE_HIGH, \ + .types_supported = IRQ_TYPE_EDGE_BOTH | \ + IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW, \ + }, \ + } + static struct gpio_keys_button button = { .code = KEY_POWER, .gpio = -1, @@ -44,6 +61,12 @@ static const struct resource bd71828_rtc_irqs[] = { DEFINE_RES_IRQ_NAMED(BD71828_INT_RTC2, "bd70528-rtc-alm-2"), }; +static const struct resource bd72720_rtc_irqs[] = { + DEFINE_RES_IRQ_NAMED(BD72720_INT_RTC0, "bd70528-rtc-alm-0"), + DEFINE_RES_IRQ_NAMED(BD72720_INT_RTC1, "bd70528-rtc-alm-1"), + DEFINE_RES_IRQ_NAMED(BD72720_INT_RTC2, "bd70528-rtc-alm-2"), +}; + static const struct resource bd71815_power_irqs[] = { DEFINE_RES_IRQ_NAMED(BD71815_INT_DCIN_RMV, "bd71815-dcin-rmv"), DEFINE_RES_IRQ_NAMED(BD71815_INT_CLPS_OUT, "bd71815-dcin-clps-out"), @@ -157,6 +180,74 @@ static struct mfd_cell bd71828_mfd_cells[] = { }, }; +static const struct resource bd72720_power_irqs[] = { + DEFINE_RES_IRQ_NAMED(BD72720_INT_VBUS_RMV, "bd72720_int_vbus_rmv"), + DEFINE_RES_IRQ_NAMED(BD72720_INT_VBUS_DET, "bd72720_int_vbus_det"), + DEFINE_RES_IRQ_NAMED(BD72720_INT_VBUS_MON_RES, "bd72720_int_vbus_mon_res"), + DEFINE_RES_IRQ_NAMED(BD72720_INT_VBUS_MON_DET, "bd72720_int_vbus_mon_det"), + DEFINE_RES_IRQ_NAMED(BD72720_INT_VSYS_MON_RES, "bd72720_int_vsys_mon_res"), + DEFINE_RES_IRQ_NAMED(BD72720_INT_VSYS_MON_DET, "bd72720_int_vsys_mon_det"), + DEFINE_RES_IRQ_NAMED(BD72720_INT_VSYS_UV_RES, "bd72720_int_vsys_uv_res"), + DEFINE_RES_IRQ_NAMED(BD72720_INT_VSYS_UV_DET, "bd72720_int_vsys_uv_det"), + DEFINE_RES_IRQ_NAMED(BD72720_INT_VSYS_LO_RES, "bd72720_int_vsys_lo_res"), + DEFINE_RES_IRQ_NAMED(BD72720_INT_VSYS_LO_DET, "bd72720_int_vsys_lo_det"), + DEFINE_RES_IRQ_NAMED(BD72720_INT_VSYS_OV_RES, "bd72720_int_vsys_ov_res"), + DEFINE_RES_IRQ_NAMED(BD72720_INT_VSYS_OV_DET, "bd72720_int_vsys_ov_det"), + DEFINE_RES_IRQ_NAMED(BD72720_INT_BAT_ILIM, "bd72720_int_bat_ilim"), + DEFINE_RES_IRQ_NAMED(BD72720_INT_CHG_DONE, "bd72720_int_chg_done"), + DEFINE_RES_IRQ_NAMED(BD72720_INT_EXTEMP_TOUT, "bd72720_int_extemp_tout"), + DEFINE_RES_IRQ_NAMED(BD72720_INT_CHG_WDT_EXP, "bd72720_int_chg_wdt_exp"), + DEFINE_RES_IRQ_NAMED(BD72720_INT_BAT_MNT_OUT, "bd72720_int_bat_mnt_out"), + DEFINE_RES_IRQ_NAMED(BD72720_INT_BAT_MNT_IN, "bd72720_int_bat_mnt_in"), + DEFINE_RES_IRQ_NAMED(BD72720_INT_CHG_TRNS, "bd72720_int_chg_trns"), + + DEFINE_RES_IRQ_NAMED(BD72720_INT_VBAT_MON_RES, "bd72720_int_vbat_mon_res"), + DEFINE_RES_IRQ_NAMED(BD72720_INT_VBAT_MON_DET, "bd72720_int_vbat_mon_det"), + DEFINE_RES_IRQ_NAMED(BD72720_INT_VBAT_SHT_RES, "bd72720_int_vbat_sht_res"), + DEFINE_RES_IRQ_NAMED(BD72720_INT_VBAT_SHT_DET, "bd72720_int_vbat_sht_det"), + DEFINE_RES_IRQ_NAMED(BD72720_INT_VBAT_LO_RES, "bd72720_int_vbat_lo_res"), + DEFINE_RES_IRQ_NAMED(BD72720_INT_VBAT_LO_DET, "bd72720_int_vbat_lo_det"), + DEFINE_RES_IRQ_NAMED(BD72720_INT_VBAT_OV_RES, "bd72720_int_vbat_ov_res"), + DEFINE_RES_IRQ_NAMED(BD72720_INT_VBAT_OV_DET, "bd72720_int_vbat_ov_det"), + DEFINE_RES_IRQ_NAMED(BD72720_INT_BAT_RMV, "bd72720_int_bat_rmv"), + DEFINE_RES_IRQ_NAMED(BD72720_INT_BAT_DET, "bd72720_int_bat_det"), + DEFINE_RES_IRQ_NAMED(BD72720_INT_DBAT_DET, "bd72720_int_dbat_det"), + DEFINE_RES_IRQ_NAMED(BD72720_INT_BAT_TEMP_TRNS, "bd72720_int_bat_temp_trns"), + DEFINE_RES_IRQ_NAMED(BD72720_INT_LOBTMP_RES, "bd72720_int_lobtmp_res"), + DEFINE_RES_IRQ_NAMED(BD72720_INT_LOBTMP_DET, "bd72720_int_lobtmp_det"), + DEFINE_RES_IRQ_NAMED(BD72720_INT_OVBTMP_RES, "bd72720_int_ovbtmp_res"), + DEFINE_RES_IRQ_NAMED(BD72720_INT_OVBTMP_DET, "bd72720_int_ovbtmp_det"), + DEFINE_RES_IRQ_NAMED(BD72720_INT_OCUR1_RES, "bd72720_int_ocur1_res"), + DEFINE_RES_IRQ_NAMED(BD72720_INT_OCUR1_DET, "bd72720_int_ocur1_det"), + DEFINE_RES_IRQ_NAMED(BD72720_INT_OCUR2_RES, "bd72720_int_ocur2_res"), + DEFINE_RES_IRQ_NAMED(BD72720_INT_OCUR2_DET, "bd72720_int_ocur2_det"), + DEFINE_RES_IRQ_NAMED(BD72720_INT_OCUR3_RES, "bd72720_int_ocur3_res"), + DEFINE_RES_IRQ_NAMED(BD72720_INT_OCUR3_DET, "bd72720_int_ocur3_det"), + DEFINE_RES_IRQ_NAMED(BD72720_INT_CC_MON1_DET, "bd72720_int_cc_mon1_det"), + DEFINE_RES_IRQ_NAMED(BD72720_INT_CC_MON2_DET, "bd72720_int_cc_mon2_det"), + DEFINE_RES_IRQ_NAMED(BD72720_INT_CC_MON3_DET, "bd72720_int_cc_mon3_det"), +}; + +static const struct mfd_cell bd72720_mfd_cells[] = { + { .name = "bd72720-pmic", }, + { .name = "bd72720-gpio", }, + { .name = "bd72720-led", }, + { .name = "bd72720-clk", }, + { + .name = "bd72720-power", + .resources = bd72720_power_irqs, + .num_resources = ARRAY_SIZE(bd72720_power_irqs), + }, { + .name = "bd72720-rtc", + .resources = bd72720_rtc_irqs, + .num_resources = ARRAY_SIZE(bd72720_rtc_irqs), + }, { + .name = "gpio-keys", + .platform_data = &bd71828_powerkey_data, + .pdata_size = sizeof(bd71828_powerkey_data), + }, +}; + static const struct regmap_range bd71815_volatile_ranges[] = { regmap_reg_range(BD71815_REG_SEC, BD71815_REG_YEAR), regmap_reg_range(BD71815_REG_CONF, BD71815_REG_BAT_TEMP), @@ -181,6 +272,91 @@ static const struct regmap_range bd71828_volatile_ranges[] = { regmap_reg_range(BD71828_REG_INT_MAIN, BD71828_REG_IO_STAT), }; +static const struct regmap_range bd72720_volatile_ranges_4b[] = { + regmap_reg_range(BD72720_REG_RESETSRC_1, BD72720_REG_RESETSRC_2), + regmap_reg_range(BD72720_REG_POWER_STATE, BD72720_REG_POWER_STATE), + /* The state indicator bit changes when new state is reached */ + regmap_reg_range(BD72720_REG_PS_CTRL_1, BD72720_REG_PS_CTRL_1), + regmap_reg_range(BD72720_REG_RCVNUM, BD72720_REG_RCVNUM), + regmap_reg_range(BD72720_REG_CONF, BD72720_REG_HALL_STAT), + regmap_reg_range(BD72720_REG_RTC_SEC, BD72720_REG_RTC_YEAR), + regmap_reg_range(BD72720_REG_INT_LVL1_STAT, BD72720_REG_INT_ETC2_SRC), +}; + +static const struct regmap_range bd72720_precious_ranges_4b[] = { + regmap_reg_range(BD72720_REG_INT_LVL1_STAT, BD72720_REG_INT_ETC2_STAT), +}; + +/* + * The BD72720 is an odd beast in that it contains two separate sets of + * registers, both starting from address 0x0. The twist is that these "pages" + * are behind different I2C slave addresses. Most of the registers are behind + * a slave address 0x4b, which will be used as the "main" address for this + * device. + * + * Most of the charger related registers are located behind slave address 0x4c. + * It is tempting to push the dealing with the charger registers and the extra + * 0x4c device in power-supply driver - but perhaps it's better for the sake of + * the cleaner re-use to deal with setting up all of the regmaps here. + * Furthermore, the LED stuff may need access to both of these devices. + * + * Instead of providing one of the regmaps to sub-devices in MFD platform data, + * we create one more 'wrapper regmap' with custom read/write operations. These + * custom accessors will select which of the 'real' regmaps to use, based on + * the register address. + * + * The register addresses are 8-bit, so we add offset 0x100 to the addresses + * behind the secondary slave 0x4c. The 'wrapper' regmap can then detect the + * correct slave address based on the register address and call regmap_write() + * and regmap_read() using correct 'real' regmap. This way the registers of + * both of the slaves can be accessed using one 'wrapper' regmap. + * + * NOTE: The added offsets mean that the defined addresses for slave 0x4c must + * be used through the 'wrapper' regmap because the offset must be stripped + * from the register addresses. The 0x4b can be accessed both indirectly using + * the 'wrapper' regmap, and directly using the 'real' regmap. + */ +#define BD72720_SECONDARY_I2C_SLAVE 0x4c +#define BD72720_SECONDARY_I2C_REG_OFFSET 0x100 + +struct bd72720_regmaps { + struct regmap *map1_4b; + struct regmap *map2_4c; +}; + +/* Translate the slave 0x4c wrapper register address to a real one */ +#define BD72720_REG_UNWRAP(reg) ((reg) - BD72720_SECONDARY_I2C_REG_OFFSET) + +/* Ranges given to 'real' 0x4c regmap must use unwrapped addresses. */ +#define BD72720_UNWRAP_REG_RANGE(startreg, endreg) \ + regmap_reg_range(BD72720_REG_UNWRAP(startreg), BD72720_REG_UNWRAP(endreg)) + +static const struct regmap_range bd72720_volatile_ranges_4c[] = { + /* Status information */ + BD72720_UNWRAP_REG_RANGE(BD72720_REG_CHG_STATE, BD72720_REG_CHG_EN), + /* + * Under certain circumstances, write to some bits may be + * ignored + */ + BD72720_UNWRAP_REG_RANGE(BD72720_REG_CHG_CTRL, BD72720_REG_CHG_CTRL), + /* + * TODO: Ensure this is used to advertise state, not (only?) to + * control it. + */ + BD72720_UNWRAP_REG_RANGE(BD72720_REG_VSYS_STATE_STAT, BD72720_REG_VSYS_STATE_STAT), + /* Measured data */ + BD72720_UNWRAP_REG_RANGE(BD72720_REG_VM_VBAT_U, BD72720_REG_VM_VF_L), + /* Self clearing bits */ + BD72720_UNWRAP_REG_RANGE(BD72720_REG_VM_VSYS_SA_MINMAX_CTRL, + BD72720_REG_VM_VSYS_SA_MINMAX_CTRL), + /* Counters, self clearing bits */ + BD72720_UNWRAP_REG_RANGE(BD72720_REG_CC_CURCD_U, BD72720_REG_CC_CTRL), + /* Self clearing bits */ + BD72720_UNWRAP_REG_RANGE(BD72720_REG_CC_CCNTD_CTRL, BD72720_REG_CC_CCNTD_CTRL), + /* Self clearing bits */ + BD72720_UNWRAP_REG_RANGE(BD72720_REG_IMPCHK_CTRL, BD72720_REG_IMPCHK_CTRL), +}; + static const struct regmap_access_table bd71815_volatile_regs = { .yes_ranges = &bd71815_volatile_ranges[0], .n_yes_ranges = ARRAY_SIZE(bd71815_volatile_ranges), @@ -191,6 +367,21 @@ static const struct regmap_access_table bd71828_volatile_regs = { .n_yes_ranges = ARRAY_SIZE(bd71828_volatile_ranges), }; +static const struct regmap_access_table bd72720_volatile_regs_4b = { + .yes_ranges = &bd72720_volatile_ranges_4b[0], + .n_yes_ranges = ARRAY_SIZE(bd72720_volatile_ranges_4b), +}; + +static const struct regmap_access_table bd72720_precious_regs_4b = { + .yes_ranges = &bd72720_precious_ranges_4b[0], + .n_yes_ranges = ARRAY_SIZE(bd72720_precious_ranges_4b), +}; + +static const struct regmap_access_table bd72720_volatile_regs_4c = { + .yes_ranges = &bd72720_volatile_ranges_4c[0], + .n_yes_ranges = ARRAY_SIZE(bd72720_volatile_ranges_4c), +}; + static const struct regmap_config bd71815_regmap = { .reg_bits = 8, .val_bits = 8, @@ -207,10 +398,79 @@ static const struct regmap_config bd71828_regmap = { .cache_type = REGCACHE_MAPLE, }; +static int regmap_write_wrapper(void *context, unsigned int reg, unsigned int val) +{ + struct bd72720_regmaps *maps = context; + + if (reg < BD72720_SECONDARY_I2C_REG_OFFSET) + return regmap_write(maps->map1_4b, reg, val); + + reg = BD72720_REG_UNWRAP(reg); + + return regmap_write(maps->map2_4c, reg, val); +} + +static int regmap_read_wrapper(void *context, unsigned int reg, unsigned int *val) +{ + struct bd72720_regmaps *maps = context; + + if (reg < BD72720_SECONDARY_I2C_REG_OFFSET) + return regmap_read(maps->map1_4b, reg, val); + + reg = BD72720_REG_UNWRAP(reg); + + return regmap_read(maps->map2_4c, reg, val); +} + +static const struct regmap_config bd72720_wrapper_map_config = { + .name = "wrap-map", + .reg_bits = 9, + .val_bits = 8, + .max_register = BD72720_REG_IMPCHK_CTRL, + /* + * We don't want to duplicate caches. It would be a bit faster to + * have the cache in this 'wrapper regmap', and not in the 'real + * regmaps' bd72720_regmap_4b and bd72720_regmap_4c below. This would + * require all the subdevices to use the wrapper-map in order to be + * able to benefit from the cache. + * Currently most of the sub-devices use only the same slave-address + * as this MFD driver. Now, because we don't add the offset to the + * registers belonging to this slave, those devices can use either the + * wrapper map, or the bd72720_regmap_4b directly. This means majority + * of our sub devices don't need to care which regmap they get using + * the dev_get_regmap(). This unifies the code between the BD72720 and + * those variants which don't have this 'multiple slave addresses' + * -hassle. + * So, for a small performance penalty, we simplify the code for the + * sub-devices by having the caches in the wrapped regmaps and not here. + */ + .cache_type = REGCACHE_NONE, + .reg_write = regmap_write_wrapper, + .reg_read = regmap_read_wrapper, +}; + +static const struct regmap_config bd72720_regmap_4b = { + .reg_bits = 8, + .val_bits = 8, + .volatile_table = &bd72720_volatile_regs_4b, + .precious_table = &bd72720_precious_regs_4b, + .max_register = BD72720_REG_INT_ETC2_SRC, + .cache_type = REGCACHE_MAPLE, +}; + +static const struct regmap_config bd72720_regmap_4c = { + .reg_bits = 8, + .val_bits = 8, + .volatile_table = &bd72720_volatile_regs_4c, + .max_register = BD72720_REG_UNWRAP(BD72720_REG_IMPCHK_CTRL), + .cache_type = REGCACHE_MAPLE, +}; + /* * Mapping of main IRQ register bits to sub-IRQ register offsets so that we can * access corect sub-IRQ registers based on bits that are set in main IRQ - * register. BD71815 and BD71828 have same sub-register-block offests. + * register. BD71815 and BD71828 have same sub-register-block offests, the + * BD72720 has a different one. */ static unsigned int bit0_offsets[] = {11}; /* RTC IRQ */ @@ -222,6 +482,15 @@ static unsigned int bit5_offsets[] = {3}; /* VSYS IRQ */ static unsigned int bit6_offsets[] = {1, 2}; /* DCIN IRQ */ static unsigned int bit7_offsets[] = {0}; /* BUCK IRQ */ +static unsigned int bd72720_bit0_offsets[] = {0, 1}; /* PS1 and PS2 */ +static unsigned int bd72720_bit1_offsets[] = {2, 3}; /* DVS1 and DVS2 */ +static unsigned int bd72720_bit2_offsets[] = {4}; /* VBUS */ +static unsigned int bd72720_bit3_offsets[] = {5}; /* VSYS */ +static unsigned int bd72720_bit4_offsets[] = {6}; /* CHG */ +static unsigned int bd72720_bit5_offsets[] = {7, 8}; /* BAT1 and BAT2 */ +static unsigned int bd72720_bit6_offsets[] = {9}; /* IBAT */ +static unsigned int bd72720_bit7_offsets[] = {10, 11}; /* ETC1 and ETC2 */ + static const struct regmap_irq_sub_irq_map bd718xx_sub_irq_offsets[] = { REGMAP_IRQ_MAIN_REG_OFFSET(bit0_offsets), REGMAP_IRQ_MAIN_REG_OFFSET(bit1_offsets), @@ -233,6 +502,17 @@ static const struct regmap_irq_sub_irq_map bd718xx_sub_irq_offsets[] = { REGMAP_IRQ_MAIN_REG_OFFSET(bit7_offsets), }; +static const struct regmap_irq_sub_irq_map bd72720_sub_irq_offsets[] = { + REGMAP_IRQ_MAIN_REG_OFFSET(bd72720_bit0_offsets), + REGMAP_IRQ_MAIN_REG_OFFSET(bd72720_bit1_offsets), + REGMAP_IRQ_MAIN_REG_OFFSET(bd72720_bit2_offsets), + REGMAP_IRQ_MAIN_REG_OFFSET(bd72720_bit3_offsets), + REGMAP_IRQ_MAIN_REG_OFFSET(bd72720_bit4_offsets), + REGMAP_IRQ_MAIN_REG_OFFSET(bd72720_bit5_offsets), + REGMAP_IRQ_MAIN_REG_OFFSET(bd72720_bit6_offsets), + REGMAP_IRQ_MAIN_REG_OFFSET(bd72720_bit7_offsets), +}; + static const struct regmap_irq bd71815_irqs[] = { REGMAP_IRQ_REG(BD71815_INT_BUCK1_OCP, 0, BD71815_INT_BUCK1_OCP_MASK), REGMAP_IRQ_REG(BD71815_INT_BUCK2_OCP, 0, BD71815_INT_BUCK2_OCP_MASK), @@ -406,6 +686,117 @@ static const struct regmap_irq bd71828_irqs[] = { REGMAP_IRQ_REG(BD71828_INT_RTC2, 11, BD71828_INT_RTC2_MASK), }; +static const struct regmap_irq bd72720_irqs[] = { + REGMAP_IRQ_REG(BD72720_INT_LONGPUSH, 0, BD72720_INT_LONGPUSH_MASK), + REGMAP_IRQ_REG(BD72720_INT_MIDPUSH, 0, BD72720_INT_MIDPUSH_MASK), + REGMAP_IRQ_REG(BD72720_INT_SHORTPUSH, 0, BD72720_INT_SHORTPUSH_MASK), + REGMAP_IRQ_REG(BD72720_INT_PUSH, 0, BD72720_INT_PUSH_MASK), + REGMAP_IRQ_REG(BD72720_INT_HALL_DET, 0, BD72720_INT_HALL_DET_MASK), + REGMAP_IRQ_REG(BD72720_INT_HALL_TGL, 0, BD72720_INT_HALL_TGL_MASK), + REGMAP_IRQ_REG(BD72720_INT_WDOG, 0, BD72720_INT_WDOG_MASK), + REGMAP_IRQ_REG(BD72720_INT_SWRESET, 0, BD72720_INT_SWRESET_MASK), + REGMAP_IRQ_REG(BD72720_INT_SEQ_DONE, 1, BD72720_INT_SEQ_DONE_MASK), + REGMAP_IRQ_REG(BD72720_INT_PGFAULT, 1, BD72720_INT_PGFAULT_MASK), + REGMAP_IRQ_REG(BD72720_INT_BUCK1_DVS, 2, BD72720_INT_BUCK1_DVS_MASK), + REGMAP_IRQ_REG(BD72720_INT_BUCK2_DVS, 2, BD72720_INT_BUCK2_DVS_MASK), + REGMAP_IRQ_REG(BD72720_INT_BUCK3_DVS, 2, BD72720_INT_BUCK3_DVS_MASK), + REGMAP_IRQ_REG(BD72720_INT_BUCK4_DVS, 2, BD72720_INT_BUCK4_DVS_MASK), + REGMAP_IRQ_REG(BD72720_INT_BUCK5_DVS, 2, BD72720_INT_BUCK5_DVS_MASK), + REGMAP_IRQ_REG(BD72720_INT_BUCK6_DVS, 2, BD72720_INT_BUCK6_DVS_MASK), + REGMAP_IRQ_REG(BD72720_INT_BUCK7_DVS, 2, BD72720_INT_BUCK7_DVS_MASK), + REGMAP_IRQ_REG(BD72720_INT_BUCK8_DVS, 2, BD72720_INT_BUCK8_DVS_MASK), + REGMAP_IRQ_REG(BD72720_INT_BUCK9_DVS, 3, BD72720_INT_BUCK9_DVS_MASK), + REGMAP_IRQ_REG(BD72720_INT_BUCK10_DVS, 3, BD72720_INT_BUCK10_DVS_MASK), + REGMAP_IRQ_REG(BD72720_INT_LDO1_DVS, 3, BD72720_INT_LDO1_DVS_MASK), + REGMAP_IRQ_REG(BD72720_INT_LDO2_DVS, 3, BD72720_INT_LDO2_DVS_MASK), + REGMAP_IRQ_REG(BD72720_INT_LDO3_DVS, 3, BD72720_INT_LDO3_DVS_MASK), + REGMAP_IRQ_REG(BD72720_INT_LDO4_DVS, 3, BD72720_INT_LDO4_DVS_MASK), + + REGMAP_IRQ_REG(BD72720_INT_VBUS_RMV, 4, BD72720_INT_VBUS_RMV_MASK), + REGMAP_IRQ_REG(BD72720_INT_VBUS_DET, 4, BD72720_INT_VBUS_DET_MASK), + REGMAP_IRQ_REG(BD72720_INT_VBUS_MON_RES, 4, BD72720_INT_VBUS_MON_RES_MASK), + REGMAP_IRQ_REG(BD72720_INT_VBUS_MON_DET, 4, BD72720_INT_VBUS_MON_DET_MASK), + REGMAP_IRQ_REG(BD72720_INT_VSYS_MON_RES, 5, BD72720_INT_VSYS_MON_RES_MASK), + REGMAP_IRQ_REG(BD72720_INT_VSYS_MON_DET, 5, BD72720_INT_VSYS_MON_DET_MASK), + REGMAP_IRQ_REG(BD72720_INT_VSYS_UV_RES, 5, BD72720_INT_VSYS_UV_RES_MASK), + REGMAP_IRQ_REG(BD72720_INT_VSYS_UV_DET, 5, BD72720_INT_VSYS_UV_DET_MASK), + REGMAP_IRQ_REG(BD72720_INT_VSYS_LO_RES, 5, BD72720_INT_VSYS_LO_RES_MASK), + REGMAP_IRQ_REG(BD72720_INT_VSYS_LO_DET, 5, BD72720_INT_VSYS_LO_DET_MASK), + REGMAP_IRQ_REG(BD72720_INT_VSYS_OV_RES, 5, BD72720_INT_VSYS_OV_RES_MASK), + REGMAP_IRQ_REG(BD72720_INT_VSYS_OV_DET, 5, BD72720_INT_VSYS_OV_DET_MASK), + REGMAP_IRQ_REG(BD72720_INT_BAT_ILIM, 6, BD72720_INT_BAT_ILIM_MASK), + REGMAP_IRQ_REG(BD72720_INT_CHG_DONE, 6, BD72720_INT_CHG_DONE_MASK), + REGMAP_IRQ_REG(BD72720_INT_EXTEMP_TOUT, 6, BD72720_INT_EXTEMP_TOUT_MASK), + REGMAP_IRQ_REG(BD72720_INT_CHG_WDT_EXP, 6, BD72720_INT_CHG_WDT_EXP_MASK), + REGMAP_IRQ_REG(BD72720_INT_BAT_MNT_OUT, 6, BD72720_INT_BAT_MNT_OUT_MASK), + REGMAP_IRQ_REG(BD72720_INT_BAT_MNT_IN, 6, BD72720_INT_BAT_MNT_IN_MASK), + REGMAP_IRQ_REG(BD72720_INT_CHG_TRNS, 6, BD72720_INT_CHG_TRNS_MASK), + + REGMAP_IRQ_REG(BD72720_INT_VBAT_MON_RES, 7, BD72720_INT_VBAT_MON_RES_MASK), + REGMAP_IRQ_REG(BD72720_INT_VBAT_MON_DET, 7, BD72720_INT_VBAT_MON_DET_MASK), + REGMAP_IRQ_REG(BD72720_INT_VBAT_SHT_RES, 7, BD72720_INT_VBAT_SHT_RES_MASK), + REGMAP_IRQ_REG(BD72720_INT_VBAT_SHT_DET, 7, BD72720_INT_VBAT_SHT_DET_MASK), + REGMAP_IRQ_REG(BD72720_INT_VBAT_LO_RES, 7, BD72720_INT_VBAT_LO_RES_MASK), + REGMAP_IRQ_REG(BD72720_INT_VBAT_LO_DET, 7, BD72720_INT_VBAT_LO_DET_MASK), + REGMAP_IRQ_REG(BD72720_INT_VBAT_OV_RES, 7, BD72720_INT_VBAT_OV_RES_MASK), + REGMAP_IRQ_REG(BD72720_INT_VBAT_OV_DET, 7, BD72720_INT_VBAT_OV_DET_MASK), + REGMAP_IRQ_REG(BD72720_INT_BAT_RMV, 8, BD72720_INT_BAT_RMV_MASK), + REGMAP_IRQ_REG(BD72720_INT_BAT_DET, 8, BD72720_INT_BAT_DET_MASK), + REGMAP_IRQ_REG(BD72720_INT_DBAT_DET, 8, BD72720_INT_DBAT_DET_MASK), + REGMAP_IRQ_REG(BD72720_INT_BAT_TEMP_TRNS, 8, BD72720_INT_BAT_TEMP_TRNS_MASK), + REGMAP_IRQ_REG(BD72720_INT_LOBTMP_RES, 8, BD72720_INT_LOBTMP_RES_MASK), + REGMAP_IRQ_REG(BD72720_INT_LOBTMP_DET, 8, BD72720_INT_LOBTMP_DET_MASK), + REGMAP_IRQ_REG(BD72720_INT_OVBTMP_RES, 8, BD72720_INT_OVBTMP_RES_MASK), + REGMAP_IRQ_REG(BD72720_INT_OVBTMP_DET, 8, BD72720_INT_OVBTMP_DET_MASK), + REGMAP_IRQ_REG(BD72720_INT_OCUR1_RES, 9, BD72720_INT_OCUR1_RES_MASK), + REGMAP_IRQ_REG(BD72720_INT_OCUR1_DET, 9, BD72720_INT_OCUR1_DET_MASK), + REGMAP_IRQ_REG(BD72720_INT_OCUR2_RES, 9, BD72720_INT_OCUR2_RES_MASK), + REGMAP_IRQ_REG(BD72720_INT_OCUR2_DET, 9, BD72720_INT_OCUR2_DET_MASK), + REGMAP_IRQ_REG(BD72720_INT_OCUR3_RES, 9, BD72720_INT_OCUR3_RES_MASK), + REGMAP_IRQ_REG(BD72720_INT_OCUR3_DET, 9, BD72720_INT_OCUR3_DET_MASK), + REGMAP_IRQ_REG(BD72720_INT_CC_MON1_DET, 10, BD72720_INT_CC_MON1_DET_MASK), + REGMAP_IRQ_REG(BD72720_INT_CC_MON2_DET, 10, BD72720_INT_CC_MON2_DET_MASK), + REGMAP_IRQ_REG(BD72720_INT_CC_MON3_DET, 10, BD72720_INT_CC_MON3_DET_MASK), +/* + * The GPIO1_IN and GPIO2_IN IRQs are generated from the PMIC's GPIO1 and GPIO2 + * pins. Eg, they may be wired to other devices which can then use the PMIC as + * an interrupt controller. The GPIO1 and GPIO2 can have the IRQ type + * specified. All of the types (falling, rising, and both edges as well as low + * and high levels) are supported. + */ + BD72720_TYPED_IRQ_REG(BD72720_INT_GPIO1_IN, 10, BD72720_INT_GPIO1_IN_MASK, 0), + BD72720_TYPED_IRQ_REG(BD72720_INT_GPIO2_IN, 10, BD72720_INT_GPIO2_IN_MASK, 1), + REGMAP_IRQ_REG(BD72720_INT_VF125_RES, 11, BD72720_INT_VF125_RES_MASK), + REGMAP_IRQ_REG(BD72720_INT_VF125_DET, 11, BD72720_INT_VF125_DET_MASK), + REGMAP_IRQ_REG(BD72720_INT_VF_RES, 11, BD72720_INT_VF_RES_MASK), + REGMAP_IRQ_REG(BD72720_INT_VF_DET, 11, BD72720_INT_VF_DET_MASK), + REGMAP_IRQ_REG(BD72720_INT_RTC0, 11, BD72720_INT_RTC0_MASK), + REGMAP_IRQ_REG(BD72720_INT_RTC1, 11, BD72720_INT_RTC1_MASK), + REGMAP_IRQ_REG(BD72720_INT_RTC2, 11, BD72720_INT_RTC2_MASK), +}; + +static int bd72720_set_type_config(unsigned int **buf, unsigned int type, + const struct regmap_irq *irq_data, + int idx, void *irq_drv_data) +{ + const struct regmap_irq_type *t = &irq_data->type; + + /* + * The regmap IRQ ecpects IRQ_TYPE_EDGE_BOTH to be written to register + * as logical OR of the type_falling_val and type_rising_val. This is + * not how the BD72720 implements this configuration, hence we need + * to handle this specific case separately. + */ + if (type == IRQ_TYPE_EDGE_BOTH) { + buf[0][idx] &= ~t->type_reg_mask; + buf[0][idx] |= BD72720_GPIO_IRQ_TYPE_BOTH; + + return 0; + } + + return regmap_irq_set_type_config_simple(buf, type, irq_data, idx, irq_drv_data); +} + static const struct regmap_irq_chip bd71828_irq_chip = { .name = "bd71828_irq", .main_status = BD71828_REG_INT_MAIN, @@ -438,6 +829,28 @@ static const struct regmap_irq_chip bd71815_irq_chip = { .irq_reg_stride = 1, }; +static const unsigned int bd72720_irq_type_base[] = { BD72720_REG_GPIO1_CTRL }; + +static const struct regmap_irq_chip bd72720_irq_chip = { + .name = "bd72720_irq", + .main_status = BD72720_REG_INT_LVL1_STAT, + .irqs = &bd72720_irqs[0], + .num_irqs = ARRAY_SIZE(bd72720_irqs), + .status_base = BD72720_REG_INT_PS1_STAT, + .unmask_base = BD72720_REG_INT_PS1_EN, + .config_base = &bd72720_irq_type_base[0], + .num_config_bases = 1, + .num_config_regs = 2, + .set_type_config = bd72720_set_type_config, + .ack_base = BD72720_REG_INT_PS1_STAT, + .init_ack_masked = true, + .num_regs = 12, + .num_main_regs = 1, + .sub_reg_offsets = &bd72720_sub_irq_offsets[0], + .num_main_status_bits = 8, + .irq_reg_stride = 1, +}; + static int set_clk_mode(struct device *dev, struct regmap *regmap, int clkmode_reg) { @@ -484,11 +897,39 @@ static void bd71828_remove_poweroff(void *data) pm_power_off = NULL; } +static struct regmap *bd72720_do_regmaps(struct i2c_client *i2c) +{ + struct bd72720_regmaps *maps; + struct i2c_client *secondary_i2c; + + secondary_i2c = devm_i2c_new_dummy_device(&i2c->dev, i2c->adapter, + BD72720_SECONDARY_I2C_SLAVE); + if (IS_ERR(secondary_i2c)) { + dev_err_probe(&i2c->dev, PTR_ERR(secondary_i2c), "Failed to get secondary I2C\n"); + + return ERR_CAST(secondary_i2c); + } + + maps = devm_kzalloc(&i2c->dev, sizeof(*maps), GFP_KERNEL); + if (!maps) + return ERR_PTR(-ENOMEM); + + maps->map1_4b = devm_regmap_init_i2c(i2c, &bd72720_regmap_4b); + if (IS_ERR(maps->map1_4b)) + return maps->map1_4b; + + maps->map2_4c = devm_regmap_init_i2c(secondary_i2c, &bd72720_regmap_4c); + if (IS_ERR(maps->map2_4c)) + return maps->map2_4c; + + return devm_regmap_init(&i2c->dev, NULL, maps, &bd72720_wrapper_map_config); +} + static int bd71828_i2c_probe(struct i2c_client *i2c) { struct regmap_irq_chip_data *irq_data; int ret; - struct regmap *regmap; + struct regmap *regmap = NULL; const struct regmap_config *regmap_config; const struct regmap_irq_chip *irqchip; unsigned int chip_type; @@ -496,6 +937,7 @@ static int bd71828_i2c_probe(struct i2c_client *i2c) int cells; int button_irq; int clkmode_reg; + int main_lvl_mask_reg = 0, main_lvl_val = 0; if (!i2c->irq) { dev_err(&i2c->dev, "No IRQ configured\n"); @@ -527,15 +969,34 @@ static int bd71828_i2c_probe(struct i2c_client *i2c) */ button_irq = 0; break; + case ROHM_CHIP_TYPE_BD72720: + { + mfd = bd72720_mfd_cells; + cells = ARRAY_SIZE(bd72720_mfd_cells); + + regmap = bd72720_do_regmaps(i2c); + if (IS_ERR(regmap)) + return dev_err_probe(&i2c->dev, PTR_ERR(regmap), + "Failed to initialize Regmap\n"); + + irqchip = &bd72720_irq_chip; + clkmode_reg = BD72720_REG_OUT32K; + button_irq = BD72720_INT_SHORTPUSH; + main_lvl_mask_reg = BD72720_REG_INT_LVL1_EN; + main_lvl_val = BD72720_MASK_LVL1_EN_ALL; + break; + } default: dev_err(&i2c->dev, "Unknown device type"); return -EINVAL; } - regmap = devm_regmap_init_i2c(i2c, regmap_config); - if (IS_ERR(regmap)) - return dev_err_probe(&i2c->dev, PTR_ERR(regmap), + if (!regmap) { + regmap = devm_regmap_init_i2c(i2c, regmap_config); + if (IS_ERR(regmap)) + return dev_err_probe(&i2c->dev, PTR_ERR(regmap), "Failed to initialize Regmap\n"); + } ret = devm_regmap_add_irq_chip(&i2c->dev, regmap, i2c->irq, IRQF_ONESHOT, 0, irqchip, &irq_data); @@ -546,6 +1007,20 @@ static int bd71828_i2c_probe(struct i2c_client *i2c) dev_dbg(&i2c->dev, "Registered %d IRQs for chip\n", irqchip->num_irqs); + /* + * On some ICs the main IRQ register has corresponding mask register. + * This is not handled by the regmap IRQ. Let's enable all the main + * level IRQs here. Further writes to the main level MASK is not + * needed because masking is handled by the per IRQ 2.nd level MASK + * registers. 2.nd level masks are handled by the regmap IRQ. + */ + if (main_lvl_mask_reg) { + ret = regmap_write(regmap, main_lvl_mask_reg, main_lvl_val); + if (ret) { + return dev_err_probe(&i2c->dev, ret, + "Failed to enable main level IRQs\n"); + } + } if (button_irq) { ret = regmap_irq_get_virq(irq_data, button_irq); if (ret < 0) @@ -587,6 +1062,9 @@ static const struct of_device_id bd71828_of_match[] = { }, { .compatible = "rohm,bd71815", .data = (void *)ROHM_CHIP_TYPE_BD71815, + }, { + .compatible = "rohm,bd72720", + .data = (void *)ROHM_CHIP_TYPE_BD72720, }, { }, }; -- cgit v1.2.3 From 8dc33b7c995e3e08087053b79cf919fba61e3669 Mon Sep 17 00:00:00 2001 From: Matti Vaittinen Date: Mon, 15 Dec 2025 15:19:53 +0200 Subject: regulator: bd71828: rename IC specific entities The new ROHM BD72720 PMIC has similarities with the BD71828. It makes sense to support the regulator control for both PMICs using the same driver. It is often more clear to have the IC specific functions and globals named starting with the chip-name. So, as a preparatory step, prefix the BD71828 specific functions and globals with the bd71828. It would be tempting to try also removing the chip ID from those functions which will be common for both PMICs. I have bad experiences on this as it tends to lead to problems when yet another IC is being supported with the same driver, and we will have some functions used for all, some for two of the three, and some for just one. At this point I used to start inventing wildcards like BD718XX or BD7272X. This approach is pretty much always failing as we tend to eventually have something like BD73900 - where all the wildcard stuff will break down. So, my approach these days is to: - keep the original chip-id prefix for anything that had it already (and avoid the churn). - use same prefix for all things that are used by multiple ICs - typically the chip-ID of the first chip. This typically matches also the driver and file names. - use specific chip-ID as a prefix for anything which is specific to just one chip. As a preparatory step to adding the BD72720, add bd71828 prefix to all commonly usable functions and globals. Signed-off-by: Matti Vaittinen Acked-by: Mark Brown Link: https://patch.msgid.link/df5c98c6392c3b52cd41e3d98d60b65a1585b2dd.1765804226.git.mazziesaccount@gmail.com Signed-off-by: Lee Jones --- drivers/regulator/bd71828-regulator.c | 32 ++++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-) (limited to 'drivers') diff --git a/drivers/regulator/bd71828-regulator.c b/drivers/regulator/bd71828-regulator.c index 87de87793fa1..8c006bff89a8 100644 --- a/drivers/regulator/bd71828-regulator.c +++ b/drivers/regulator/bd71828-regulator.c @@ -28,7 +28,7 @@ struct bd71828_regulator_data { int reg_init_amnt; }; -static const struct reg_init buck1_inits[] = { +static const struct reg_init bd71828_buck1_inits[] = { /* * DVS Buck voltages can be changed by register values or via GPIO. * Use register accesses by default. @@ -40,7 +40,7 @@ static const struct reg_init buck1_inits[] = { }, }; -static const struct reg_init buck2_inits[] = { +static const struct reg_init bd71828_buck2_inits[] = { { .reg = BD71828_REG_PS_CTRL_1, .mask = BD71828_MASK_DVS_BUCK2_CTRL, @@ -48,7 +48,7 @@ static const struct reg_init buck2_inits[] = { }, }; -static const struct reg_init buck6_inits[] = { +static const struct reg_init bd71828_buck6_inits[] = { { .reg = BD71828_REG_PS_CTRL_1, .mask = BD71828_MASK_DVS_BUCK6_CTRL, @@ -56,7 +56,7 @@ static const struct reg_init buck6_inits[] = { }, }; -static const struct reg_init buck7_inits[] = { +static const struct reg_init bd71828_buck7_inits[] = { { .reg = BD71828_REG_PS_CTRL_1, .mask = BD71828_MASK_DVS_BUCK7_CTRL, @@ -102,9 +102,9 @@ static int buck_set_hw_dvs_levels(struct device_node *np, return rohm_regulator_set_dvs_levels(&data->dvs, np, desc, cfg->regmap); } -static int ldo6_parse_dt(struct device_node *np, - const struct regulator_desc *desc, - struct regulator_config *cfg) +static int bd71828_ldo6_parse_dt(struct device_node *np, + const struct regulator_desc *desc, + struct regulator_config *cfg) { int ret, i; uint32_t uv = 0; @@ -212,8 +212,8 @@ static const struct bd71828_regulator_data bd71828_rdata[] = { */ .lpsr_on_mask = BD71828_MASK_LPSR_EN, }, - .reg_inits = buck1_inits, - .reg_init_amnt = ARRAY_SIZE(buck1_inits), + .reg_inits = bd71828_buck1_inits, + .reg_init_amnt = ARRAY_SIZE(bd71828_buck1_inits), }, { .desc = { @@ -253,8 +253,8 @@ static const struct bd71828_regulator_data bd71828_rdata[] = { .lpsr_reg = BD71828_REG_BUCK2_SUSP_VOLT, .lpsr_mask = BD71828_MASK_BUCK1267_VOLT, }, - .reg_inits = buck2_inits, - .reg_init_amnt = ARRAY_SIZE(buck2_inits), + .reg_inits = bd71828_buck2_inits, + .reg_init_amnt = ARRAY_SIZE(bd71828_buck2_inits), }, { .desc = { @@ -399,8 +399,8 @@ static const struct bd71828_regulator_data bd71828_rdata[] = { .lpsr_reg = BD71828_REG_BUCK6_SUSP_VOLT, .lpsr_mask = BD71828_MASK_BUCK1267_VOLT, }, - .reg_inits = buck6_inits, - .reg_init_amnt = ARRAY_SIZE(buck6_inits), + .reg_inits = bd71828_buck6_inits, + .reg_init_amnt = ARRAY_SIZE(bd71828_buck6_inits), }, { .desc = { @@ -440,8 +440,8 @@ static const struct bd71828_regulator_data bd71828_rdata[] = { .lpsr_reg = BD71828_REG_BUCK7_SUSP_VOLT, .lpsr_mask = BD71828_MASK_BUCK1267_VOLT, }, - .reg_inits = buck7_inits, - .reg_init_amnt = ARRAY_SIZE(buck7_inits), + .reg_inits = bd71828_buck7_inits, + .reg_init_amnt = ARRAY_SIZE(bd71828_buck7_inits), }, { .desc = { @@ -633,7 +633,7 @@ static const struct bd71828_regulator_data bd71828_rdata[] = { * LDO6 only supports enable/disable for all states. * Voltage for LDO6 is fixed. */ - .of_parse_cb = ldo6_parse_dt, + .of_parse_cb = bd71828_ldo6_parse_dt, }, }, { .desc = { -- cgit v1.2.3 From f16a9d76a71df5038fc8e6dae44caa1e5e76b041 Mon Sep 17 00:00:00 2001 From: Matti Vaittinen Date: Mon, 15 Dec 2025 15:20:06 +0200 Subject: regulator: bd71828: Support ROHM BD72720 ROHM BD72720 is a power management IC which integrates 10 buck and 11 LDO regulators. This PMIC has plenty of commonalities with the BD71828 and BD71879. The BD72720 does also have similar 'run-level'-concept as the BD71828 had. It allows controlling the regulator's 'en masse', although only BUCK1 and LDO1 can utilize this in BD72720. Similar to BD71828, this 'en masse' -control is not supported by this driver. Support the voltage and enable/disable state control for the BD72720. Signed-off-by: Matti Vaittinen Reviewed-by: Mark Brown Link: https://patch.msgid.link/88b82128648516d9dbb173044042f2a7a5dfdf1c.1765804226.git.mazziesaccount@gmail.com Signed-off-by: Lee Jones --- drivers/regulator/Kconfig | 8 +- drivers/regulator/bd71828-regulator.c | 993 +++++++++++++++++++++++++++++++++- 2 files changed, 992 insertions(+), 9 deletions(-) (limited to 'drivers') diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig index d2335276cce5..003bd938c84a 100644 --- a/drivers/regulator/Kconfig +++ b/drivers/regulator/Kconfig @@ -241,13 +241,13 @@ config REGULATOR_BD71815 will be called bd71815-regulator. config REGULATOR_BD71828 - tristate "ROHM BD71828 Power Regulator" + tristate "ROHM BD71828, BD72720 and BD73900 Power Regulators" depends on MFD_ROHM_BD71828 select REGULATOR_ROHM help - This driver supports voltage regulators on ROHM BD71828 PMIC. - This will enable support for the software controllable buck - and LDO regulators. + This driver supports voltage regulators on ROHM BD71828, + BD71879, BD72720 and BD73900 PMICs. This will enable + support for the software controllable buck and LDO regulators. This driver can also be built as a module. If so, the module will be called bd71828-regulator. diff --git a/drivers/regulator/bd71828-regulator.c b/drivers/regulator/bd71828-regulator.c index 8c006bff89a8..c8f3343cfe23 100644 --- a/drivers/regulator/bd71828-regulator.c +++ b/drivers/regulator/bd71828-regulator.c @@ -3,12 +3,15 @@ // bd71828-regulator.c ROHM BD71828GW-DS1 regulator driver // +#include #include #include #include #include #include +#include #include +#include #include #include #include @@ -16,6 +19,7 @@ #include #include +#define BD72720_MASK_LDON_HEAD GENMASK(2, 0) struct reg_init { unsigned int reg; unsigned int mask; @@ -64,6 +68,26 @@ static const struct reg_init bd71828_buck7_inits[] = { }, }; +#define BD72720_MASK_DVS_BUCK1_CTRL BIT(4) +#define BD72720_MASK_DVS_LDO1_CTRL BIT(5) + +static const struct reg_init bd72720_buck1_inits[] = { + { + .reg = BD72720_REG_PS_CTRL_2, + .mask = BD72720_MASK_DVS_BUCK1_CTRL, + .val = 0, /* Disable "run-level" control */ + }, +}; + +static const struct reg_init bd72720_ldo1_inits[] = { + { + .reg = BD72720_REG_PS_CTRL_2, + .mask = BD72720_MASK_DVS_LDO1_CTRL, + .val = 0, /* Disable "run-level" control */ + }, +}; + +/* BD71828 Buck voltages */ static const struct linear_range bd71828_buck1267_volts[] = { REGULATOR_LINEAR_RANGE(500000, 0x00, 0xef, 6250), REGULATOR_LINEAR_RANGE(2000000, 0xf0, 0xff, 0), @@ -84,13 +108,79 @@ static const struct linear_range bd71828_buck5_volts[] = { REGULATOR_LINEAR_RANGE(3300000, 0x10, 0x1f, 0), }; +/* BD71828 LDO voltages */ static const struct linear_range bd71828_ldo_volts[] = { REGULATOR_LINEAR_RANGE(800000, 0x00, 0x31, 50000), REGULATOR_LINEAR_RANGE(3300000, 0x32, 0x3f, 0), }; +/* BD72720 Buck voltages */ +static const struct linear_range bd72720_buck1234_volts[] = { + REGULATOR_LINEAR_RANGE(500000, 0x00, 0xc0, 6250), + REGULATOR_LINEAR_RANGE(1700000, 0xc1, 0xff, 0), +}; + +static const struct linear_range bd72720_buck589_volts[] = { + REGULATOR_LINEAR_RANGE(500000, 0x00, 0x78, 10000), + REGULATOR_LINEAR_RANGE(1700000, 0x79, 0xff, 0), +}; + +static const struct linear_range bd72720_buck67_volts[] = { + REGULATOR_LINEAR_RANGE(1500000, 0x00, 0xb4, 10000), + REGULATOR_LINEAR_RANGE(3300000, 0xb5, 0xff, 0), +}; + +/* + * The BUCK10 on BD72720 has two modes of operation, depending on a LDON_HEAD + * setting. When LDON_HEAD is 0x0, the behaviour is as with other bucks, eg. + * voltage can be set to a values indicated below using the VSEL register. + * + * However, when LDON_HEAD is set to 0x1 ... 0x7, BUCK 10 voltage is, according + * to the data-sheet, "automatically adjusted following LDON_HEAD setting and + * clamped to BUCK10_VID setting". + * + * Again, reading the data-sheet shows a "typical connection" where the BUCK10 + * is used to supply the LDOs 1-4. My assumption is that in practice, this + * means that the BUCK10 voltage will be adjusted based on the maximum output + * of the LDO 1-4 (to minimize power loss). This makes sense. + * + * Auto-adjusting regulators aren't something I really like to model in the + * driver though - and, if the auto-adjustment works as intended, then there + * should really be no need to software to care about the buck10 voltages. + * If enable/disable control is still needed, we can implement buck10 as a + * regulator with only the enable/disable ops - and device-tree can be used + * to model the supply-relations. I believe this could allow the regulator + * framework to automagically disable the BUCK10 if all LDOs that are being + * supplied by it are disabled. + */ +static const struct linear_range bd72720_buck10_volts[] = { + REGULATOR_LINEAR_RANGE(500000, 0x00, 0xc0, 6250), + REGULATOR_LINEAR_RANGE(1700000, 0xc1, 0xff, 0), +}; + +/* BD72720 LDO voltages */ +static const struct linear_range bd72720_ldo1234_volts[] = { + REGULATOR_LINEAR_RANGE(500000, 0x00, 0x50, 6250), + REGULATOR_LINEAR_RANGE(1000000, 0x51, 0x7f, 0), +}; + +static const struct linear_range bd72720_ldo57891011_volts[] = { + REGULATOR_LINEAR_RANGE(750000, 0x00, 0xff, 10000), +}; + +static const struct linear_range bd72720_ldo6_volts[] = { + REGULATOR_LINEAR_RANGE(600000, 0x00, 0x78, 10000), + REGULATOR_LINEAR_RANGE(1800000, 0x79, 0x7f, 0), +}; + static const unsigned int bd71828_ramp_delay[] = { 2500, 5000, 10000, 20000 }; +/* + * BD72720 supports setting both the ramp-up and ramp-down values + * separately. Do we need to support ramp-down setting? + */ +static const unsigned int bd72720_ramp_delay[] = { 5000, 7500, 10000, 12500 }; + static int buck_set_hw_dvs_levels(struct device_node *np, const struct regulator_desc *desc, struct regulator_config *cfg) @@ -171,6 +261,24 @@ static const struct regulator_ops bd71828_ldo6_ops = { .is_enabled = regulator_is_enabled_regmap, }; +static const struct regulator_ops bd72720_regulator_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .set_ramp_delay = regulator_set_ramp_delay_regmap, +}; + +static const struct regulator_ops bd72720_buck10_ldon_head_op = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_ramp_delay = regulator_set_ramp_delay_regmap, +}; + static const struct bd71828_regulator_data bd71828_rdata[] = { { .desc = { @@ -677,22 +785,890 @@ static const struct bd71828_regulator_data bd71828_rdata[] = { }, }; +#define BD72720_BUCK10_DESC_INDEX 10 +#define BD72720_NUM_BUCK_VOLTS 0x100 +#define BD72720_NUM_LDO_VOLTS 0x100 +#define BD72720_NUM_LDO12346_VOLTS 0x80 + +static const struct bd71828_regulator_data bd72720_rdata[] = { + { + .desc = { + .name = "buck1", + .of_match = of_match_ptr("buck1"), + .regulators_node = of_match_ptr("regulators"), + .id = BD72720_BUCK1, + .type = REGULATOR_VOLTAGE, + + /* + * The BD72720 BUCK1 and LDO1 support GPIO toggled + * sub-RUN states called RUN0, RUN1, RUN2 and RUN3. + * The "operating mode" (sub-RUN states or normal) + * can be changed by a register. + * + * When the sub-RUN states are used, the voltage and + * enable state depend on a state specific + * configuration. The voltage and enable configuration + * for BUCK1 and LDO1 can be defined for each sub-RUN + * state using BD72720_REG_[BUCK,LDO]1_VSEL_R[0,1,2,3] + * voltage selection registers and the bits + * BD72720_MASK_RUN_[0,1,2,3]_EN in the enable registers. + * The PMIC will change both the BUCK1 and LDO1 voltages + * to the states defined in these registers when + * "DVS GPIOs" are toggled. + * + * If RUN 0 .. RUN 4 states are to be used, the normal + * voltage configuration mechanisms do not apply + * and we should overwrite the ops and ignore the + * voltage setting/getting registers which are setup + * here. This is not supported for now. If you need + * this functionality, you may try merging functionality + * from a downstream driver: + * https://rohmsemiconductor.github.io/Linux-Kernel-PMIC-Drivers/BD72720/ + */ + .ops = &bd72720_regulator_ops, + .linear_ranges = bd72720_buck1234_volts, + .n_linear_ranges = ARRAY_SIZE(bd72720_buck1234_volts), + .n_voltages = BD72720_NUM_BUCK_VOLTS, + .enable_reg = BD72720_REG_BUCK1_ON, + .enable_mask = BD72720_MASK_RUN_B_EN, + .vsel_reg = BD72720_REG_BUCK1_VSEL_RB, + .vsel_mask = BD72720_MASK_BUCK_VSEL, + + .ramp_delay_table = bd72720_ramp_delay, + .n_ramp_values = ARRAY_SIZE(bd72720_ramp_delay), + .ramp_reg = BD72720_REG_BUCK1_MODE, + .ramp_mask = BD72720_MASK_RAMP_UP_DELAY, + .owner = THIS_MODULE, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_IDLE | + ROHM_DVS_LEVEL_SUSPEND | + ROHM_DVS_LEVEL_LPSR, /* Deep idle in data-sheet */ + .run_reg = BD72720_REG_BUCK1_VSEL_RB, + .run_mask = BD72720_MASK_BUCK_VSEL, + .idle_reg = BD72720_REG_BUCK1_VSEL_I, + .idle_mask = BD72720_MASK_BUCK_VSEL, + .idle_on_mask = BD72720_MASK_IDLE_EN, + .suspend_reg = BD72720_REG_BUCK1_VSEL_S, + .suspend_mask = BD72720_MASK_BUCK_VSEL, + .suspend_on_mask = BD72720_MASK_SUSPEND_EN, + .lpsr_reg = BD72720_REG_BUCK1_VSEL_DI, + .lpsr_mask = BD72720_MASK_BUCK_VSEL, + .lpsr_on_mask = BD72720_MASK_DEEP_IDLE_EN, + }, + .reg_inits = bd72720_buck1_inits, + .reg_init_amnt = ARRAY_SIZE(bd72720_buck1_inits), + }, { + .desc = { + .name = "buck2", + .of_match = of_match_ptr("buck2"), + .regulators_node = of_match_ptr("regulators"), + .id = BD72720_BUCK2, + .type = REGULATOR_VOLTAGE, + .ops = &bd72720_regulator_ops, + .linear_ranges = bd72720_buck1234_volts, + .n_linear_ranges = ARRAY_SIZE(bd72720_buck1234_volts), + .n_voltages = BD72720_NUM_BUCK_VOLTS, + .enable_reg = BD72720_REG_BUCK2_ON, + .enable_mask = BD72720_MASK_RUN_B_EN, + .vsel_reg = BD72720_REG_BUCK2_VSEL_R, + .vsel_mask = BD72720_MASK_BUCK_VSEL, + + .ramp_delay_table = bd72720_ramp_delay, + .n_ramp_values = ARRAY_SIZE(bd72720_ramp_delay), + .ramp_reg = BD72720_REG_BUCK2_MODE, + .ramp_mask = BD72720_MASK_RAMP_UP_DELAY, + .owner = THIS_MODULE, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_IDLE | + ROHM_DVS_LEVEL_SUSPEND | + ROHM_DVS_LEVEL_LPSR, + .run_reg = BD72720_REG_BUCK2_VSEL_R, + .run_mask = BD72720_MASK_BUCK_VSEL, + .idle_reg = BD72720_REG_BUCK2_VSEL_I, + .idle_mask = BD72720_MASK_BUCK_VSEL, + .idle_on_mask = BD72720_MASK_IDLE_EN, + .suspend_reg = BD72720_REG_BUCK2_VSEL_S, + .suspend_mask = BD72720_MASK_BUCK_VSEL, + .suspend_on_mask = BD72720_MASK_SUSPEND_EN, + .lpsr_reg = BD72720_REG_BUCK2_VSEL_DI, + .lpsr_mask = BD72720_MASK_BUCK_VSEL, + .lpsr_on_mask = BD72720_MASK_DEEP_IDLE_EN, + }, + }, { + .desc = { + .name = "buck3", + .of_match = of_match_ptr("buck3"), + .regulators_node = of_match_ptr("regulators"), + .id = BD72720_BUCK3, + .type = REGULATOR_VOLTAGE, + .ops = &bd72720_regulator_ops, + .linear_ranges = bd72720_buck1234_volts, + .n_linear_ranges = ARRAY_SIZE(bd72720_buck1234_volts), + .n_voltages = BD72720_NUM_BUCK_VOLTS, + .enable_reg = BD72720_REG_BUCK3_ON, + .enable_mask = BD72720_MASK_RUN_B_EN, + .vsel_reg = BD72720_REG_BUCK3_VSEL_R, + .vsel_mask = BD72720_MASK_BUCK_VSEL, + + .ramp_delay_table = bd72720_ramp_delay, + .n_ramp_values = ARRAY_SIZE(bd72720_ramp_delay), + .ramp_reg = BD72720_REG_BUCK3_MODE, + .ramp_mask = BD72720_MASK_RAMP_UP_DELAY, + .owner = THIS_MODULE, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_IDLE | + ROHM_DVS_LEVEL_SUSPEND | + ROHM_DVS_LEVEL_LPSR, + .run_reg = BD72720_REG_BUCK3_VSEL_R, + .run_mask = BD72720_MASK_BUCK_VSEL, + .idle_reg = BD72720_REG_BUCK3_VSEL_I, + .idle_mask = BD72720_MASK_BUCK_VSEL, + .idle_on_mask = BD72720_MASK_IDLE_EN, + .suspend_reg = BD72720_REG_BUCK3_VSEL_S, + .suspend_mask = BD72720_MASK_BUCK_VSEL, + .suspend_on_mask = BD72720_MASK_SUSPEND_EN, + .lpsr_reg = BD72720_REG_BUCK3_VSEL_DI, + .lpsr_mask = BD72720_MASK_BUCK_VSEL, + .lpsr_on_mask = BD72720_MASK_DEEP_IDLE_EN, + }, + }, { + .desc = { + .name = "buck4", + .of_match = of_match_ptr("buck4"), + .regulators_node = of_match_ptr("regulators"), + .id = BD72720_BUCK4, + .type = REGULATOR_VOLTAGE, + .ops = &bd72720_regulator_ops, + .linear_ranges = bd72720_buck1234_volts, + .n_linear_ranges = ARRAY_SIZE(bd72720_buck1234_volts), + .n_voltages = BD72720_NUM_BUCK_VOLTS, + .enable_reg = BD72720_REG_BUCK4_ON, + .enable_mask = BD72720_MASK_RUN_B_EN, + .vsel_reg = BD72720_REG_BUCK4_VSEL_R, + .vsel_mask = BD72720_MASK_BUCK_VSEL, + + .ramp_delay_table = bd72720_ramp_delay, + .n_ramp_values = ARRAY_SIZE(bd72720_ramp_delay), + .ramp_reg = BD72720_REG_BUCK4_MODE, + .ramp_mask = BD72720_MASK_RAMP_UP_DELAY, + .owner = THIS_MODULE, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_IDLE | + ROHM_DVS_LEVEL_SUSPEND | + ROHM_DVS_LEVEL_LPSR, + .run_reg = BD72720_REG_BUCK4_VSEL_R, + .run_mask = BD72720_MASK_BUCK_VSEL, + .idle_reg = BD72720_REG_BUCK4_VSEL_I, + .idle_mask = BD72720_MASK_BUCK_VSEL, + .idle_on_mask = BD72720_MASK_IDLE_EN, + .suspend_reg = BD72720_REG_BUCK4_VSEL_S, + .suspend_mask = BD72720_MASK_BUCK_VSEL, + .suspend_on_mask = BD72720_MASK_SUSPEND_EN, + .lpsr_reg = BD72720_REG_BUCK4_VSEL_DI, + .lpsr_mask = BD72720_MASK_BUCK_VSEL, + .lpsr_on_mask = BD72720_MASK_DEEP_IDLE_EN, + }, + }, { + .desc = { + .name = "buck5", + .of_match = of_match_ptr("buck5"), + .regulators_node = of_match_ptr("regulators"), + .id = BD72720_BUCK5, + .type = REGULATOR_VOLTAGE, + .ops = &bd72720_regulator_ops, + .linear_ranges = bd72720_buck589_volts, + .n_linear_ranges = ARRAY_SIZE(bd72720_buck589_volts), + .n_voltages = BD72720_NUM_BUCK_VOLTS, + .enable_reg = BD72720_REG_BUCK5_ON, + .enable_mask = BD72720_MASK_RUN_B_EN, + .vsel_reg = BD72720_REG_BUCK5_VSEL, + .vsel_mask = BD72720_MASK_BUCK_VSEL, + + .ramp_delay_table = bd72720_ramp_delay, + .n_ramp_values = ARRAY_SIZE(bd72720_ramp_delay), + .ramp_reg = BD72720_REG_BUCK5_MODE, + .ramp_mask = BD72720_MASK_RAMP_UP_DELAY, + .owner = THIS_MODULE, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_IDLE | + ROHM_DVS_LEVEL_SUSPEND | + ROHM_DVS_LEVEL_LPSR, + .run_reg = BD72720_REG_BUCK5_VSEL, + .run_mask = BD72720_MASK_BUCK_VSEL, + .idle_on_mask = BD72720_MASK_IDLE_EN, + .suspend_on_mask = BD72720_MASK_SUSPEND_EN, + .lpsr_on_mask = BD72720_MASK_DEEP_IDLE_EN, + }, + }, { + .desc = { + .name = "buck6", + .of_match = of_match_ptr("buck6"), + .regulators_node = of_match_ptr("regulators"), + .id = BD72720_BUCK6, + .type = REGULATOR_VOLTAGE, + .ops = &bd72720_regulator_ops, + .linear_ranges = bd72720_buck67_volts, + .n_linear_ranges = ARRAY_SIZE(bd72720_buck67_volts), + .n_voltages = BD72720_NUM_BUCK_VOLTS, + .enable_reg = BD72720_REG_BUCK6_ON, + .enable_mask = BD72720_MASK_RUN_B_EN, + .vsel_reg = BD72720_REG_BUCK6_VSEL, + .vsel_mask = BD72720_MASK_BUCK_VSEL, + + .ramp_delay_table = bd72720_ramp_delay, + .n_ramp_values = ARRAY_SIZE(bd72720_ramp_delay), + .ramp_reg = BD72720_REG_BUCK6_MODE, + .ramp_mask = BD72720_MASK_RAMP_UP_DELAY, + .owner = THIS_MODULE, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_IDLE | + ROHM_DVS_LEVEL_SUSPEND | + ROHM_DVS_LEVEL_LPSR, + .run_reg = BD72720_REG_BUCK6_VSEL, + .run_mask = BD72720_MASK_BUCK_VSEL, + .idle_on_mask = BD72720_MASK_IDLE_EN, + .suspend_on_mask = BD72720_MASK_SUSPEND_EN, + .lpsr_on_mask = BD72720_MASK_DEEP_IDLE_EN, + }, + }, { + .desc = { + .name = "buck7", + .of_match = of_match_ptr("buck7"), + .regulators_node = of_match_ptr("regulators"), + .id = BD72720_BUCK7, + .type = REGULATOR_VOLTAGE, + .ops = &bd72720_regulator_ops, + .linear_ranges = bd72720_buck67_volts, + .n_linear_ranges = ARRAY_SIZE(bd72720_buck67_volts), + .n_voltages = BD72720_NUM_BUCK_VOLTS, + .enable_reg = BD72720_REG_BUCK7_ON, + .enable_mask = BD72720_MASK_RUN_B_EN, + .vsel_reg = BD72720_REG_BUCK7_VSEL, + .vsel_mask = BD72720_MASK_BUCK_VSEL, + + .ramp_delay_table = bd72720_ramp_delay, + .n_ramp_values = ARRAY_SIZE(bd72720_ramp_delay), + .ramp_reg = BD72720_REG_BUCK7_MODE, + .ramp_mask = BD72720_MASK_RAMP_UP_DELAY, + .owner = THIS_MODULE, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_IDLE | + ROHM_DVS_LEVEL_SUSPEND | + ROHM_DVS_LEVEL_LPSR, + .run_reg = BD72720_REG_BUCK7_VSEL, + .run_mask = BD72720_MASK_BUCK_VSEL, + .idle_on_mask = BD72720_MASK_IDLE_EN, + .suspend_on_mask = BD72720_MASK_SUSPEND_EN, + .lpsr_on_mask = BD72720_MASK_DEEP_IDLE_EN, + }, + }, { + .desc = { + .name = "buck8", + .of_match = of_match_ptr("buck8"), + .regulators_node = of_match_ptr("regulators"), + .id = BD72720_BUCK8, + .type = REGULATOR_VOLTAGE, + .ops = &bd72720_regulator_ops, + .linear_ranges = bd72720_buck589_volts, + .n_linear_ranges = ARRAY_SIZE(bd72720_buck589_volts), + .n_voltages = BD72720_NUM_BUCK_VOLTS, + .enable_reg = BD72720_REG_BUCK8_ON, + .enable_mask = BD72720_MASK_RUN_B_EN, + .vsel_reg = BD72720_REG_BUCK8_VSEL, + .vsel_mask = BD72720_MASK_BUCK_VSEL, + + .ramp_delay_table = bd72720_ramp_delay, + .n_ramp_values = ARRAY_SIZE(bd72720_ramp_delay), + .ramp_reg = BD72720_REG_BUCK8_MODE, + .ramp_mask = BD72720_MASK_RAMP_UP_DELAY, + .owner = THIS_MODULE, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_IDLE | + ROHM_DVS_LEVEL_SUSPEND | + ROHM_DVS_LEVEL_LPSR, + .run_reg = BD72720_REG_BUCK8_VSEL, + .run_mask = BD72720_MASK_BUCK_VSEL, + .idle_on_mask = BD72720_MASK_IDLE_EN, + .suspend_on_mask = BD72720_MASK_SUSPEND_EN, + .lpsr_on_mask = BD72720_MASK_DEEP_IDLE_EN, + }, + }, { + .desc = { + .name = "buck9", + .of_match = of_match_ptr("buck9"), + .regulators_node = of_match_ptr("regulators"), + .id = BD72720_BUCK9, + .type = REGULATOR_VOLTAGE, + .ops = &bd72720_regulator_ops, + .linear_ranges = bd72720_buck589_volts, + .n_linear_ranges = ARRAY_SIZE(bd72720_buck589_volts), + .n_voltages = BD72720_NUM_BUCK_VOLTS, + .enable_reg = BD72720_REG_BUCK9_ON, + .enable_mask = BD72720_MASK_RUN_B_EN, + .vsel_reg = BD72720_REG_BUCK9_VSEL, + .vsel_mask = BD72720_MASK_BUCK_VSEL, + + .ramp_delay_table = bd72720_ramp_delay, + .n_ramp_values = ARRAY_SIZE(bd72720_ramp_delay), + .ramp_reg = BD72720_REG_BUCK9_MODE, + .ramp_mask = BD72720_MASK_RAMP_UP_DELAY, + .owner = THIS_MODULE, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_IDLE | + ROHM_DVS_LEVEL_SUSPEND | + ROHM_DVS_LEVEL_LPSR, + .run_reg = BD72720_REG_BUCK9_VSEL, + .run_mask = BD72720_MASK_BUCK_VSEL, + .idle_on_mask = BD72720_MASK_IDLE_EN, + .suspend_on_mask = BD72720_MASK_SUSPEND_EN, + .lpsr_on_mask = BD72720_MASK_DEEP_IDLE_EN, + }, + }, { + .desc = { + .name = "buck10", + .of_match = of_match_ptr("buck10"), + .regulators_node = of_match_ptr("regulators"), + .id = BD72720_BUCK10, + .type = REGULATOR_VOLTAGE, + .ops = &bd72720_regulator_ops, + .linear_ranges = bd72720_buck10_volts, + .n_linear_ranges = ARRAY_SIZE(bd72720_buck10_volts), + .n_voltages = BD72720_NUM_BUCK_VOLTS, + .enable_reg = BD72720_REG_BUCK10_ON, + .enable_mask = BD72720_MASK_RUN_B_EN, + .vsel_reg = BD72720_REG_BUCK10_VSEL, + .vsel_mask = BD72720_MASK_BUCK_VSEL, + + .ramp_delay_table = bd72720_ramp_delay, + .n_ramp_values = ARRAY_SIZE(bd72720_ramp_delay), + .ramp_reg = BD72720_REG_BUCK10_MODE, + .ramp_mask = BD72720_MASK_RAMP_UP_DELAY, + .owner = THIS_MODULE, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_IDLE | + ROHM_DVS_LEVEL_SUSPEND | + ROHM_DVS_LEVEL_LPSR, + .run_reg = BD72720_REG_BUCK10_VSEL, + .run_mask = BD72720_MASK_BUCK_VSEL, + .idle_on_mask = BD72720_MASK_IDLE_EN, + .suspend_on_mask = BD72720_MASK_SUSPEND_EN, + .lpsr_on_mask = BD72720_MASK_DEEP_IDLE_EN, + }, + }, { + .desc = { + .name = "ldo1", + .of_match = of_match_ptr("ldo1"), + .regulators_node = of_match_ptr("regulators"), + .id = BD72720_LDO1, + .type = REGULATOR_VOLTAGE, + .ops = &bd72720_regulator_ops, + .linear_ranges = bd72720_ldo1234_volts, + .n_linear_ranges = ARRAY_SIZE(bd72720_ldo1234_volts), + .n_voltages = BD72720_NUM_LDO12346_VOLTS, + .enable_reg = BD72720_REG_LDO1_ON, + .enable_mask = BD72720_MASK_RUN_B_EN, + .vsel_reg = BD72720_REG_LDO1_VSEL_RB, + .vsel_mask = BD72720_MASK_LDO12346_VSEL, + + .ramp_delay_table = bd72720_ramp_delay, + .n_ramp_values = ARRAY_SIZE(bd72720_ramp_delay), + .ramp_reg = BD72720_REG_LDO1_MODE1, + .ramp_mask = BD72720_MASK_RAMP_UP_DELAY, + .owner = THIS_MODULE, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_IDLE | + ROHM_DVS_LEVEL_SUSPEND | + ROHM_DVS_LEVEL_LPSR, + .run_reg = BD72720_REG_LDO1_VSEL_RB, + .run_mask = BD72720_MASK_LDO12346_VSEL, + .idle_reg = BD72720_REG_LDO1_VSEL_I, + .idle_mask = BD72720_MASK_LDO12346_VSEL, + .idle_on_mask = BD72720_MASK_IDLE_EN, + .suspend_reg = BD72720_REG_LDO1_VSEL_S, + .suspend_mask = BD72720_MASK_LDO12346_VSEL, + .suspend_on_mask = BD72720_MASK_SUSPEND_EN, + .lpsr_reg = BD72720_REG_LDO1_VSEL_DI, + .lpsr_mask = BD72720_MASK_LDO12346_VSEL, + .lpsr_on_mask = BD72720_MASK_DEEP_IDLE_EN, + }, + .reg_inits = bd72720_ldo1_inits, + .reg_init_amnt = ARRAY_SIZE(bd72720_ldo1_inits), + }, { + .desc = { + .name = "ldo2", + .of_match = of_match_ptr("ldo2"), + .regulators_node = of_match_ptr("regulators"), + .id = BD72720_LDO2, + .type = REGULATOR_VOLTAGE, + .ops = &bd72720_regulator_ops, + .linear_ranges = bd72720_ldo1234_volts, + .n_linear_ranges = ARRAY_SIZE(bd72720_ldo1234_volts), + .n_voltages = BD72720_NUM_LDO12346_VOLTS, + .enable_reg = BD72720_REG_LDO2_ON, + .enable_mask = BD72720_MASK_RUN_B_EN, + .vsel_reg = BD72720_REG_LDO2_VSEL_R, + .vsel_mask = BD72720_MASK_LDO12346_VSEL, + + .ramp_delay_table = bd72720_ramp_delay, + .n_ramp_values = ARRAY_SIZE(bd72720_ramp_delay), + .ramp_reg = BD72720_REG_LDO2_MODE, + .ramp_mask = BD72720_MASK_RAMP_UP_DELAY, + .owner = THIS_MODULE, + .of_parse_cb = buck_set_hw_dvs_levels, + }, + .dvs = { + .level_map = ROHM_DVS_LEVEL_RUN | ROHM_DVS_LEVEL_IDLE | + ROHM_DVS_LEVEL_SUSPEND | + ROHM_DVS_LEVEL_LPSR, + .run_reg = BD72720_REG_LDO2_VSEL_R, + .run_mask = BD72720_MASK_LDO12346_VSEL, + .idle_reg = BD72720_REG_LDO2_VSEL_I, + .idle_mask = BD72720_MASK_LDO12346_VSEL, + .idle_on_mask = BD72720_MASK_IDLE_EN, + .suspend_reg = BD72720_REG_LDO2_VSEL_S, + .suspend_mask = BD72720_MASK_LDO12346_VSEL, + .suspend_on_mask =