From 4a09ab6771276a7fd3f80be4250a0fd0ba5114ad Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Sun, 16 Dec 2012 18:27:33 +0100 Subject: m68k: Provide dma_alloc_attrs()/dma_free_attrs() Since commit 0049fb2603b7afb1080776ee691dfa5a3d282357 ("OMAPFB: use dma_alloc_attrs to allocate memory") we have one non-arch user of dma_{alloc,free}_attrs(). Hence provide these functions, as wrappers around dma_{alloc,free}_coherent(). Note that most architectures do it the other way around. But as so far m68k doesn't support the attributes at all, our solution should generate smaller code. Signed-off-by: Geert Uytterhoeven --- arch/m68k/include/asm/dma-mapping.h | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'arch') diff --git a/arch/m68k/include/asm/dma-mapping.h b/arch/m68k/include/asm/dma-mapping.h index 17f7a45948ea..3e6b8445af6a 100644 --- a/arch/m68k/include/asm/dma-mapping.h +++ b/arch/m68k/include/asm/dma-mapping.h @@ -21,6 +21,22 @@ extern void *dma_alloc_coherent(struct device *, size_t, extern void dma_free_coherent(struct device *, size_t, void *, dma_addr_t); +static inline void *dma_alloc_attrs(struct device *dev, size_t size, + dma_addr_t *dma_handle, gfp_t flag, + struct dma_attrs *attrs) +{ + /* attrs is not supported and ignored */ + return dma_alloc_coherent(dev, size, dma_handle, flag); +} + +static inline void dma_free_attrs(struct device *dev, size_t size, + void *cpu_addr, dma_addr_t dma_handle, + struct dma_attrs *attrs) +{ + /* attrs is not supported and ignored */ + dma_free_coherent(dev, size, cpu_addr, dma_handle); +} + static inline void *dma_alloc_noncoherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t flag) { -- cgit v1.2.3 From e7e29b4cf3c4f2acb2433c45b29d1c7881321d36 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Sun, 23 Dec 2012 10:28:00 +0100 Subject: m68k: Wire up finit_module Signed-off-by: Geert Uytterhoeven Acked-by: Greg Ungerer --- arch/m68k/include/asm/unistd.h | 2 +- arch/m68k/include/uapi/asm/unistd.h | 1 + arch/m68k/kernel/syscalltable.S | 1 + 3 files changed, 3 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/m68k/include/asm/unistd.h b/arch/m68k/include/asm/unistd.h index 847994ce6804..f9337f614660 100644 --- a/arch/m68k/include/asm/unistd.h +++ b/arch/m68k/include/asm/unistd.h @@ -4,7 +4,7 @@ #include -#define NR_syscalls 348 +#define NR_syscalls 349 #define __ARCH_WANT_OLD_READDIR #define __ARCH_WANT_OLD_STAT diff --git a/arch/m68k/include/uapi/asm/unistd.h b/arch/m68k/include/uapi/asm/unistd.h index b94bfbf90705..625f321001dc 100644 --- a/arch/m68k/include/uapi/asm/unistd.h +++ b/arch/m68k/include/uapi/asm/unistd.h @@ -353,5 +353,6 @@ #define __NR_process_vm_readv 345 #define __NR_process_vm_writev 346 #define __NR_kcmp 347 +#define __NR_finit_module 348 #endif /* _UAPI_ASM_M68K_UNISTD_H_ */ diff --git a/arch/m68k/kernel/syscalltable.S b/arch/m68k/kernel/syscalltable.S index c30da5b3f2db..3f04ea0ab802 100644 --- a/arch/m68k/kernel/syscalltable.S +++ b/arch/m68k/kernel/syscalltable.S @@ -368,4 +368,5 @@ ENTRY(sys_call_table) .long sys_process_vm_readv /* 345 */ .long sys_process_vm_writev .long sys_kcmp + .long sys_finit_module -- cgit v1.2.3 From 14c9bc6fba3f44e89f8bb66b0290dbcf36832607 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Mon, 22 Oct 2012 15:34:41 +1000 Subject: m68knommu: add KMAP definitions for non-MMU definitions To be consistent with the set of MMU definitions we should define KMAP_START and KMAP_END. Future common m68k code will use their values. Signed-off-by: Greg Ungerer Acked-by: Geert Uytterhoeven --- arch/m68k/include/asm/pgtable_no.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch') diff --git a/arch/m68k/include/asm/pgtable_no.h b/arch/m68k/include/asm/pgtable_no.h index bf86b29fe64a..037028f4ab70 100644 --- a/arch/m68k/include/asm/pgtable_no.h +++ b/arch/m68k/include/asm/pgtable_no.h @@ -64,6 +64,8 @@ extern unsigned int kobjsize(const void *objp); */ #define VMALLOC_START 0 #define VMALLOC_END 0xffffffff +#define KMAP_START 0 +#define KMAP_END 0xffffffff #include -- cgit v1.2.3 From d6fccc756328441511c2b752d394a2b3dae4ec31 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Mon, 7 Jan 2013 16:13:04 +1000 Subject: m68k: fix conditional use of init_pointer_table MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Compiling 3.8-rc1 fails for some m68k targets (the non-mmu ones) with: CC arch/m68k/mm/init.o arch/m68k/mm/init.c: In function ‘mem_init’: arch/m68k/mm/init.c:191:2: error: implicit declaration of function ‘init_pointer_table’ arch/m68k/mm/init.c:191:36: error: ‘kernel_pg_dir’ undeclared (first use in this function) arch/m68k/mm/init.c:191:36: note: each undeclared identifier is reported only once for each function it appears in arch/m68k/mm/init.c:192:18: error: ‘PTRS_PER_PGD’ undeclared (first use in this function) arch/m68k/mm/init.c:194:4: error: implicit declaration of function ‘__pgd_page’ arch/m68k/mm/init.c:198:6: error: ‘zero_pgtable’ undeclared (first use in this function) make[2]: *** [arch/m68k/mm/init.o] Error 1 make[1]: *** [arch/m68k/mm] Error 2 make[1]: Leaving directory `/home/gerg/new-wave.git/linux-3.x' make: *** [linux] Error 1 Change the conditions that define init_pointer_table so that it matches what actually uses it. Signed-off-by: Greg Ungerer --- arch/m68k/mm/init.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/m68k/mm/init.c b/arch/m68k/mm/init.c index f0e05bce92f2..afd8106fd83b 100644 --- a/arch/m68k/mm/init.c +++ b/arch/m68k/mm/init.c @@ -39,6 +39,11 @@ void *empty_zero_page; EXPORT_SYMBOL(empty_zero_page); +#if !defined(CONFIG_SUN3) && !defined(CONFIG_COLDFIRE) +extern void init_pointer_table(unsigned long ptable); +extern pmd_t *zero_pgtable; +#endif + #ifdef CONFIG_MMU pg_data_t pg_data_map[MAX_NUMNODES]; @@ -69,9 +74,6 @@ void __init m68k_setup_node(int node) node_set_online(node); } -extern void init_pointer_table(unsigned long ptable); -extern pmd_t *zero_pgtable; - #else /* CONFIG_MMU */ /* -- cgit v1.2.3 From cabd91c3bb74a5bc43c3192126af752891d11d77 Mon Sep 17 00:00:00 2001 From: John David Anglin Date: Sun, 1 Apr 2012 12:57:18 -0400 Subject: parisc: avoid undefined shift in cnv_float.h The attached change fixes a float conversion problem found running the GCC testsuite with GCC configured with --with-arch=2.0. The actual problem occurs for an exponent value of 63. This is the maximum exponent value that can be passed. This causes a left shift by 32 in the else hunk of the macro. This causes undefined behavior and the wrong value is returned for dresultB. The fix is the check "exponent <= 62". If the exponent is 63, dresultB is set to 0. The patch also optimizes the operation a bit by copying "Sall(sgl_value) << SGL_EXP_LENGTH" to val, so that sgl_value is not modified. Signed-off-by: John David Anglin Signed-off-by: Helge Deller --- arch/parisc/math-emu/cnv_float.h | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) (limited to 'arch') diff --git a/arch/parisc/math-emu/cnv_float.h b/arch/parisc/math-emu/cnv_float.h index 9071e093164a..933423fa5144 100644 --- a/arch/parisc/math-emu/cnv_float.h +++ b/arch/parisc/math-emu/cnv_float.h @@ -347,16 +347,15 @@ Sgl_isinexact_to_fix(sgl_value,exponent) #define Duint_from_sgl_mantissa(sgl_value,exponent,dresultA,dresultB) \ - {Sall(sgl_value) <<= SGL_EXP_LENGTH; /* left-justify */ \ + {unsigned int val = Sall(sgl_value) << SGL_EXP_LENGTH; \ if (exponent <= 31) { \ - Dintp1(dresultA) = 0; \ - Dintp2(dresultB) = (unsigned)Sall(sgl_value) >> (31 - exponent); \ + Dintp1(dresultA) = 0; \ + Dintp2(dresultB) = val >> (31 - exponent); \ } \ else { \ - Dintp1(dresultA) = Sall(sgl_value) >> (63 - exponent); \ - Dintp2(dresultB) = Sall(sgl_value) << (exponent - 31); \ + Dintp1(dresultA) = val >> (63 - exponent); \ + Dintp2(dresultB) = exponent <= 62 ? val << (exponent - 31) : 0; \ } \ - Sall(sgl_value) >>= SGL_EXP_LENGTH; /* return to original */ \ } #define Duint_setzero(dresultA,dresultB) \ -- cgit v1.2.3 From cac1f12b9f7409510a5abcf3eaecc2c56b75242a Mon Sep 17 00:00:00 2001 From: John David Anglin Date: Sun, 12 Jun 2011 01:46:41 +0000 Subject: parisc: don't claim cpu irqs more than once The CPU irqs (timer and IPI) are not shared and only need to be claimed once. A mismatch error occurs if they are claimed more than once. Signed-off-by: John David Anglin Cc: Kyle McMartin Cc: Helge Deller Cc: "James E.J. Bottomley" Signed-off-by: Helge Deller --- arch/parisc/kernel/irq.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/parisc/kernel/irq.c b/arch/parisc/kernel/irq.c index c0b1affc06a8..0299d63cd112 100644 --- a/arch/parisc/kernel/irq.c +++ b/arch/parisc/kernel/irq.c @@ -410,11 +410,13 @@ void __init init_IRQ(void) { local_irq_disable(); /* PARANOID - should already be disabled */ mtctl(~0UL, 23); /* EIRR : clear all pending external intr */ - claim_cpu_irqs(); #ifdef CONFIG_SMP - if (!cpu_eiem) + if (!cpu_eiem) { + claim_cpu_irqs(); cpu_eiem = EIEM_MASK(IPI_IRQ) | EIEM_MASK(TIMER_IRQ); + } #else + claim_cpu_irqs(); cpu_eiem = EIEM_MASK(TIMER_IRQ); #endif set_eiem(cpu_eiem); /* EIEM : enable all external intr */ -- cgit v1.2.3 From 34360f080cb5848990576e1465d2d01a3c261762 Mon Sep 17 00:00:00 2001 From: John David Anglin Date: Fri, 28 Dec 2012 23:18:01 +0000 Subject: parisc: improve ptrace support for gdb single-step Various GCC tests use gdb to simulate a multithreaded application. Many of these tests have been failing on parisc linux. GCC does this by using gdb to single-step the application, then gdb is used to call other test specific code. Where this fails is when the application is stepped into the delay slot of a taken branch. This sets the PSW B bit. When the test specific code is executed, this usually clears the PSW B bit. Currently, gdb is not allowed to set the B bit. So, the code falls through what should be a taken branch. The attached patch adds the PSW B bit to the set of bits that gdb is allowed to set. In order to set the B bit, the trace system call must return using an interrupt restore. The patch also modifies this code to use the saved IAOQ values when they are saved by a ptrace syscall or interruption. Signed-off-by: John David Anglin Signed-off-by: Helge Deller --- arch/parisc/kernel/entry.S | 18 +++++++++++++----- arch/parisc/kernel/ptrace.c | 2 +- 2 files changed, 14 insertions(+), 6 deletions(-) (limited to 'arch') diff --git a/arch/parisc/kernel/entry.S b/arch/parisc/kernel/entry.S index bfb44247d7a7..eb7850b46c25 100644 --- a/arch/parisc/kernel/entry.S +++ b/arch/parisc/kernel/entry.S @@ -1865,7 +1865,7 @@ syscall_restore: /* Are we being ptraced? */ ldw TASK_FLAGS(%r1),%r19 - ldi (_TIF_SINGLESTEP|_TIF_BLOCKSTEP),%r2 + ldi _TIF_SYSCALL_TRACE_MASK,%r2 and,COND(=) %r19,%r2,%r0 b,n syscall_restore_rfi @@ -1978,15 +1978,23 @@ syscall_restore_rfi: /* sr2 should be set to zero for userspace syscalls */ STREG %r0,TASK_PT_SR2(%r1) -pt_regs_ok: LDREG TASK_PT_GR31(%r1),%r2 - depi 3,31,2,%r2 /* ensure return to user mode. */ - STREG %r2,TASK_PT_IAOQ0(%r1) + depi 3,31,2,%r2 /* ensure return to user mode. */ + STREG %r2,TASK_PT_IAOQ0(%r1) ldo 4(%r2),%r2 STREG %r2,TASK_PT_IAOQ1(%r1) + b intr_restore copy %r25,%r16 + +pt_regs_ok: + LDREG TASK_PT_IAOQ0(%r1),%r2 + depi 3,31,2,%r2 /* ensure return to user mode. */ + STREG %r2,TASK_PT_IAOQ0(%r1) + LDREG TASK_PT_IAOQ1(%r1),%r2 + depi 3,31,2,%r2 + STREG %r2,TASK_PT_IAOQ1(%r1) b intr_restore - nop + copy %r25,%r16 .import schedule,code syscall_do_resched: diff --git a/arch/parisc/kernel/ptrace.c b/arch/parisc/kernel/ptrace.c index 857c2f545470..534abd4936e1 100644 --- a/arch/parisc/kernel/ptrace.c +++ b/arch/parisc/kernel/ptrace.c @@ -26,7 +26,7 @@ #include /* PSW bits we allow the debugger to modify */ -#define USER_PSW_BITS (PSW_N | PSW_V | PSW_CB) +#define USER_PSW_BITS (PSW_N | PSW_B | PSW_V | PSW_CB) /* * Called by kernel/ptrace.c when detaching.. -- cgit v1.2.3 From ad30f3ff3deb4037f2beea15812d01d795f8b3cc Mon Sep 17 00:00:00 2001 From: John David Anglin Date: Sun, 25 Nov 2012 21:39:00 +0000 Subject: parisc: sigaltstack doesn't round ss.ss_sp as required On 24-Nov-12, at 10:05 AM, John David Anglin wrote: > In trying to build the debian libsigsegv2 package, I found that sigaltstack > doesn't round ss.ss_sp. The tests intentionally pass an unaligned pointer. > This results in the two stack overflow tests failing. The attached patch fixes this issue. Signed-off-by: John David Anglin Signed-off-by: Helge Deller --- arch/parisc/kernel/signal.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/parisc/kernel/signal.c b/arch/parisc/kernel/signal.c index 537996955998..fd051705a407 100644 --- a/arch/parisc/kernel/signal.c +++ b/arch/parisc/kernel/signal.c @@ -190,8 +190,10 @@ get_sigframe(struct k_sigaction *ka, unsigned long sp, size_t frame_size) DBG(1,"get_sigframe: ka = %#lx, sp = %#lx, frame_size = %#lx\n", (unsigned long)ka, sp, frame_size); + /* Align alternate stack and reserve 64 bytes for the signal + handler's frame marker. */ if ((ka->sa.sa_flags & SA_ONSTACK) != 0 && ! sas_ss_flags(sp)) - sp = current->sas_ss_sp; /* Stacks grow up! */ + sp = (current->sas_ss_sp + 0x7f) & ~0x3f; /* Stacks grow up! */ DBG(1,"get_sigframe: Returning sp = %#lx\n", (unsigned long)sp); return (void __user *) sp; /* Stacks grow up. Fun. */ -- cgit v1.2.3 From e909c682d04e55e77a3c9d158e7dc36027195493 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Mon, 7 Jan 2013 10:57:14 +0100 Subject: [media] coda: Fix build due to iram.h rename commit c045e3f13 (ARM: imx: include iram.h rather than mach/iram.h) changed the location of iram.h, which causes the following build error when building the coda driver: drivers/media/platform/coda.c:27:23: error: mach/iram.h: No such file or directory drivers/media/platform/coda.c: In function 'coda_probe': drivers/media/platform/coda.c:2000: error: implicit declaration of function 'iram_alloc' drivers/media/platform/coda.c:2001: warning: assignment makes pointer from integer without a cast drivers/media/platform/coda.c: In function 'coda_remove': drivers/media/platform/coda.c:2024: error: implicit declaration of function 'iram_free' Since the content of iram.h is not imx specific, move it to include/linux/platform_data/imx-iram.h instead. This is an intermediate solution until the i.MX iram allocator is converted to the generic SRAM allocator. Signed-off-by: Sascha Hauer Acked-by: Mauro Carvalho Chehab --- arch/arm/mach-imx/iram.h | 41 ----------------------------------------- arch/arm/mach-imx/iram_alloc.c | 3 +-- 2 files changed, 1 insertion(+), 43 deletions(-) delete mode 100644 arch/arm/mach-imx/iram.h (limited to 'arch') diff --git a/arch/arm/mach-imx/iram.h b/arch/arm/mach-imx/iram.h deleted file mode 100644 index 022690c33702..000000000000 --- a/arch/arm/mach-imx/iram.h +++ /dev/null @@ -1,41 +0,0 @@ -/* - * Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301, USA. - */ -#include - -#ifdef CONFIG_IRAM_ALLOC - -int __init iram_init(unsigned long base, unsigned long size); -void __iomem *iram_alloc(unsigned int size, unsigned long *dma_addr); -void iram_free(unsigned long dma_addr, unsigned int size); - -#else - -static inline int __init iram_init(unsigned long base, unsigned long size) -{ - return -ENOMEM; -} - -static inline void __iomem *iram_alloc(unsigned int size, unsigned long *dma_addr) -{ - return NULL; -} - -static inline void iram_free(unsigned long base, unsigned long size) {} - -#endif diff --git a/arch/arm/mach-imx/iram_alloc.c b/arch/arm/mach-imx/iram_alloc.c index 6c80424f678e..e05cf407db65 100644 --- a/arch/arm/mach-imx/iram_alloc.c +++ b/arch/arm/mach-imx/iram_alloc.c @@ -22,8 +22,7 @@ #include #include #include - -#include "iram.h" +#include "linux/platform_data/imx-iram.h" static unsigned long iram_phys_base; static void __iomem *iram_virt_base; -- cgit v1.2.3 From 5f79c651e81e7731e9f252ac420bd81e144199d6 Mon Sep 17 00:00:00 2001 From: Thomas Petazzoni Date: Mon, 7 Jan 2013 17:26:58 +0100 Subject: arm: mvebu: use global interrupts for GPIOs on Armada XP The Armada XP GPIO controller has two ways of notifying interrupts: using global interrupts or using per-CPU interrupts. In an attempt to use the best available features, the 'marvell,armadaxp-gpio' compatible string selects a variant of the gpio-mvebu driver that makes use of the per-CPU interrupts. Unfortunately, this doesn't work properly in a SMP context, because we fall into cases where the GPIO interrupt is enabled on CPU X at the GPIO controller level, but on CPU Y at the interrupt controller level. It is not yet clear how to fix that easily. So for 3.8, our approach is to switch to global interrupts for GPIOs, so that we do not fall into this per-CPU interrupts problem. This patch therefore fixes GPIO interrupts on Armada XP platforms. Without this patch, GPIO interrupts simply do not work reliably, because their proper operation depends on which CPU the code requesting the interrupt is running. Signed-off-by: Thomas Petazzoni Signed-off-by: Jason Cooper --- arch/arm/boot/dts/armada-xp-mv78230.dtsi | 14 ++++++-------- arch/arm/boot/dts/armada-xp-mv78260.dtsi | 21 +++++++++------------ arch/arm/boot/dts/armada-xp-mv78460.dtsi | 21 +++++++++------------ 3 files changed, 24 insertions(+), 32 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/armada-xp-mv78230.dtsi b/arch/arm/boot/dts/armada-xp-mv78230.dtsi index 271855a6e224..e041f42ed711 100644 --- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi +++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi @@ -50,27 +50,25 @@ }; gpio0: gpio@d0018100 { - compatible = "marvell,armadaxp-gpio"; - reg = <0xd0018100 0x40>, - <0xd0018800 0x30>; + compatible = "marvell,orion-gpio"; + reg = <0xd0018100 0x40>; ngpios = <32>; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupts-cells = <2>; - interrupts = <16>, <17>, <18>, <19>; + interrupts = <82>, <83>, <84>, <85>; }; gpio1: gpio@d0018140 { - compatible = "marvell,armadaxp-gpio"; - reg = <0xd0018140 0x40>, - <0xd0018840 0x30>; + compatible = "marvell,orion-gpio"; + reg = <0xd0018140 0x40>; ngpios = <17>; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupts-cells = <2>; - interrupts = <20>, <21>, <22>; + interrupts = <87>, <88>, <89>; }; }; }; diff --git a/arch/arm/boot/dts/armada-xp-mv78260.dtsi b/arch/arm/boot/dts/armada-xp-mv78260.dtsi index 1c1937dbce73..9e23bd8c9536 100644 --- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi +++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi @@ -51,39 +51,36 @@ }; gpio0: gpio@d0018100 { - compatible = "marvell,armadaxp-gpio"; - reg = <0xd0018100 0x40>, - <0xd0018800 0x30>; + compatible = "marvell,orion-gpio"; + reg = <0xd0018100 0x40>; ngpios = <32>; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupts-cells = <2>; - interrupts = <16>, <17>, <18>, <19>; + interrupts = <82>, <83>, <84>, <85>; }; gpio1: gpio@d0018140 { - compatible = "marvell,armadaxp-gpio"; - reg = <0xd0018140 0x40>, - <0xd0018840 0x30>; + compatible = "marvell,orion-gpio"; + reg = <0xd0018140 0x40>; ngpios = <32>; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupts-cells = <2>; - interrupts = <20>, <21>, <22>, <23>; + interrupts = <87>, <88>, <89>, <90>; }; gpio2: gpio@d0018180 { - compatible = "marvell,armadaxp-gpio"; - reg = <0xd0018180 0x40>, - <0xd0018870 0x30>; + compatible = "marvell,orion-gpio"; + reg = <0xd0018180 0x40>; ngpios = <3>; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupts-cells = <2>; - interrupts = <24>; + interrupts = <91>; }; ethernet@d0034000 { diff --git a/arch/arm/boot/dts/armada-xp-mv78460.dtsi b/arch/arm/boot/dts/armada-xp-mv78460.dtsi index 4905cf3a5ef8..965966110e38 100644 --- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi +++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi @@ -66,39 +66,36 @@ }; gpio0: gpio@d0018100 { - compatible = "marvell,armadaxp-gpio"; - reg = <0xd0018100 0x40>, - <0xd0018800 0x30>; + compatible = "marvell,orion-gpio"; + reg = <0xd0018100 0x40>; ngpios = <32>; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupts-cells = <2>; - interrupts = <16>, <17>, <18>, <19>; + interrupts = <82>, <83>, <84>, <85>; }; gpio1: gpio@d0018140 { - compatible = "marvell,armadaxp-gpio"; - reg = <0xd0018140 0x40>, - <0xd0018840 0x30>; + compatible = "marvell,orion-gpio"; + reg = <0xd0018140 0x40>; ngpios = <32>; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupts-cells = <2>; - interrupts = <20>, <21>, <22>, <23>; + interrupts = <87>, <88>, <89>, <90>; }; gpio2: gpio@d0018180 { - compatible = "marvell,armadaxp-gpio"; - reg = <0xd0018180 0x40>, - <0xd0018870 0x30>; + compatible = "marvell,orion-gpio"; + reg = <0xd0018180 0x40>; ngpios = <3>; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupts-cells = <2>; - interrupts = <24>; + interrupts = <91>; }; ethernet@d0034000 { -- cgit v1.2.3 From 4ea931e07d7708bdf42cff31e27dcc5d307ab6f7 Mon Sep 17 00:00:00 2001 From: Simon Guinot Date: Tue, 8 Jan 2013 15:36:18 +0100 Subject: ARM: Kirkwood: fix ns2 gpios by converting to pinctrl Note that the pinctrl conversion also fixes GPIO support for ns2 boards. Since commit f9e75922: "ARM: Kirkwood: Make use of mvebu pincltl and gpio", the mvbu_gpio driver is used for DT boards. As mvbu_gpio relies on the pinctrl driver, then a pinctrl definition must be given to allow the GPIO configuration. Signed-off-by: Simon Guinot Acked-by: Andrew Lunn Signed-off-by: Jason Cooper --- arch/arm/boot/dts/kirkwood-ns2-common.dtsi | 16 +++++++++++++ arch/arm/mach-kirkwood/board-ns2.c | 38 ------------------------------ 2 files changed, 16 insertions(+), 38 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/kirkwood-ns2-common.dtsi b/arch/arm/boot/dts/kirkwood-ns2-common.dtsi index 9bc6785ad228..77d21abfcdf7 100644 --- a/arch/arm/boot/dts/kirkwood-ns2-common.dtsi +++ b/arch/arm/boot/dts/kirkwood-ns2-common.dtsi @@ -1,4 +1,5 @@ /include/ "kirkwood.dtsi" +/include/ "kirkwood-6281.dtsi" / { chosen { @@ -6,6 +7,21 @@ }; ocp@f1000000 { + pinctrl: pinctrl@10000 { + pinctrl-0 = < &pmx_spi &pmx_twsi0 &pmx_uart0 + &pmx_ns2_sata0 &pmx_ns2_sata1>; + pinctrl-names = "default"; + + pmx_ns2_sata0: pmx-ns2-sata0 { + marvell,pins = "mpp21"; + marvell,function = "sata0"; + }; + pmx_ns2_sata1: pmx-ns2-sata1 { + marvell,pins = "mpp20"; + marvell,function = "sata1"; + }; + }; + serial@12000 { clock-frequency = <166666667>; status = "okay"; diff --git a/arch/arm/mach-kirkwood/board-ns2.c b/arch/arm/mach-kirkwood/board-ns2.c index 8821720ab5a4..f4632a809f68 100644 --- a/arch/arm/mach-kirkwood/board-ns2.c +++ b/arch/arm/mach-kirkwood/board-ns2.c @@ -18,47 +18,11 @@ #include #include #include "common.h" -#include "mpp.h" static struct mv643xx_eth_platform_data ns2_ge00_data = { .phy_addr = MV643XX_ETH_PHY_ADDR(8), }; -static unsigned int ns2_mpp_config[] __initdata = { - MPP0_SPI_SCn, - MPP1_SPI_MOSI, - MPP2_SPI_SCK, - MPP3_SPI_MISO, - MPP4_NF_IO6, - MPP5_NF_IO7, - MPP6_SYSRST_OUTn, - MPP7_GPO, /* Fan speed (bit 1) */ - MPP8_TW0_SDA, - MPP9_TW0_SCK, - MPP10_UART0_TXD, - MPP11_UART0_RXD, - MPP12_GPO, /* Red led */ - MPP14_GPIO, /* USB fuse */ - MPP16_GPIO, /* SATA 0 power */ - MPP17_GPIO, /* SATA 1 power */ - MPP18_NF_IO0, - MPP19_NF_IO1, - MPP20_SATA1_ACTn, - MPP21_SATA0_ACTn, - MPP22_GPIO, /* Fan speed (bit 0) */ - MPP23_GPIO, /* Fan power */ - MPP24_GPIO, /* USB mode select */ - MPP25_GPIO, /* Fan rotation fail */ - MPP26_GPIO, /* USB device vbus */ - MPP28_GPIO, /* USB enable host vbus */ - MPP29_GPIO, /* Blue led (slow register) */ - MPP30_GPIO, /* Blue led (command register) */ - MPP31_GPIO, /* Board power off */ - MPP32_GPIO, /* Power button (0 = Released, 1 = Pushed) */ - MPP33_GPO, /* Fan speed (bit 2) */ - 0 -}; - #define NS2_GPIO_POWER_OFF 31 static void ns2_power_off(void) @@ -71,8 +35,6 @@ void __init ns2_init(void) /* * Basic setup. Needs to be called early. */ - kirkwood_mpp_conf(ns2_mpp_config); - if (of_machine_is_compatible("lacie,netspace_lite_v2") || of_machine_is_compatible("lacie,netspace_mini_v2")) ns2_ge00_data.phy_addr = MV643XX_ETH_PHY_ADDR(0); -- cgit v1.2.3 From 9e1c96ed82562c05c89ee3eedee8d980e5c0d865 Mon Sep 17 00:00:00 2001 From: Sebastian Hesselbarth Date: Tue, 18 Dec 2012 01:24:29 +0100 Subject: ARM: Dove: add Cubox sdhci card detect gpio Card detect for sdhci on Cubox is connected to the wrong pin (sdio1_cd instead of sdio0_cd). With support for cd-gpios and pinctrl add the corresponding properties to DT for Cubox. Signed-off-by: Sebastian Hesselbarth Signed-off-by: Jason Cooper --- arch/arm/boot/dts/dove-cubox.dts | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/dove-cubox.dts b/arch/arm/boot/dts/dove-cubox.dts index fed7d3f9f431..cdee96fca6e2 100644 --- a/arch/arm/boot/dts/dove-cubox.dts +++ b/arch/arm/boot/dts/dove-cubox.dts @@ -26,10 +26,15 @@ }; &uart0 { status = "okay"; }; -&sdio0 { status = "okay"; }; &sata0 { status = "okay"; }; &i2c0 { status = "okay"; }; +&sdio0 { + status = "okay"; + /* sdio0 card detect is connected to wrong pin on CuBox */ + cd-gpios = <&gpio0 12 1>; +}; + &spi0 { status = "okay"; @@ -42,9 +47,14 @@ }; &pinctrl { - pinctrl-0 = <&pmx_gpio_18>; + pinctrl-0 = <&pmx_gpio_12 &pmx_gpio_18>; pinctrl-names = "default"; + pmx_gpio_12: pmx-gpio-12 { + marvell,pins = "mpp12"; + marvell,function = "gpio"; + }; + pmx_gpio_18: pmx-gpio-18 { marvell,pins = "mpp18"; marvell,function = "gpio"; -- cgit v1.2.3 From a706d965dcfdff73bf2bad1c300f8119900714c7 Mon Sep 17 00:00:00 2001 From: David Ahern Date: Fri, 28 Dec 2012 19:56:07 -0700 Subject: perf x86: revert 20b279 - require exclude_guest to use PEBS - kernel side This patch is brought to you by the letter 'H'. Commit 20b279 breaks compatiblity with older perf binaries when run with precise modifier (:p or :pp) by requiring the exclude_guest attribute to be set. Older binaries default exclude_guest to 0 (ie., wanting guest-based samples) unless host only profiling is requested (:H modifier). The workaround for older binaries is to add H to the modifier list (e.g., -e cycles:ppH - toggles exclude_guest to 1). This was deemed unacceptable by Linus: https://lkml.org/lkml/2012/12/12/570 Between family in town and the fresh snow in Breckenridge there is no time left to be working on the proper fix for this over the holidays. In the New Year I have more pressing problems to resolve -- like some memory leaks in perf which are proving to be elusive -- although the aforementioned snow is probably why they are proving to be elusive. Either way I do not have any spare time to work on this and from the time I have managed to spend on it the solution is more difficult than just moving to a new exclude_guest flag (does not work) or flipping the logic to include_guest (which is not as trivial as one would think). So, two options: silently force exclude_guest on as suggested by Gleb which means no impact to older perf binaries or revert the original patch which caused the breakage. This patch does the latter -- reverts the original patch that introduced the regression. The problem can be revisited in the future as time allows. Signed-off-by: David Ahern Cc: Avi Kivity Cc: Gleb Natapov Cc: Ingo Molnar Cc: Jiri Olsa Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Robert Richter Link: http://lkml.kernel.org/r/1356749767-17322-1-git-send-email-dsahern@gmail.com Signed-off-by: Arnaldo Carvalho de Melo --- arch/x86/kernel/cpu/perf_event.c | 6 ------ 1 file changed, 6 deletions(-) (limited to 'arch') diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c index 4428fd178bce..6774c17a5576 100644 --- a/arch/x86/kernel/cpu/perf_event.c +++ b/arch/x86/kernel/cpu/perf_event.c @@ -340,9 +340,6 @@ int x86_setup_perfctr(struct perf_event *event) /* BTS is currently only allowed for user-mode. */ if (!attr->exclude_kernel) return -EOPNOTSUPP; - - if (!attr->exclude_guest) - return -EOPNOTSUPP; } hwc->config |= config; @@ -385,9 +382,6 @@ int x86_pmu_hw_config(struct perf_event *event) if (event->attr.precise_ip) { int precise = 0; - if (!event->attr.exclude_guest) - return -EOPNOTSUPP; - /* Support for constant skid */ if (x86_pmu.pebs_active && !x86_pmu.pebs_broken) { precise++; -- cgit v1.2.3 From 11d5993df2e1f65e3acfeb92a3febe88803b3e7f Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Thu, 10 Jan 2013 13:15:14 +0100 Subject: arm: mvebu: Fix memory size for Armada 370 DB Actually the Armada 370 DB (aka DB-88F6710-BP-DDR3) come with 1GB and not 512MB. Signed-off-by: Gregory CLEMENT Signed-off-by: Jason Cooper --- arch/arm/boot/dts/armada-370-db.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/armada-370-db.dts b/arch/arm/boot/dts/armada-370-db.dts index 00044026ef1f..9b82facb2561 100644 --- a/arch/arm/boot/dts/armada-370-db.dts +++ b/arch/arm/boot/dts/armada-370-db.dts @@ -26,7 +26,7 @@ memory { device_type = "memory"; - reg = <0x00000000 0x20000000>; /* 512 MB */ + reg = <0x00000000 0x40000000>; /* 1 GB */ }; soc { -- cgit v1.2.3 From a4a12e008e292a81d312659529b71be2026ab355 Mon Sep 17 00:00:00 2001 From: Dave Martin Date: Fri, 30 Nov 2012 11:56:05 +0000 Subject: ARM: virt: Avoid bx instruction for compatibility with <=ARMv4 Non-T variants of ARMv4 do not support the bx instruction. However, __hyp_stub_install is always called from the same instruction set used to build the bulk of the kernel, so bx should not be necessary. This patch uses the traditional "mov pc" instead of bx. Cc: Signed-off-by: Dave Martin [will: fixed up remaining bx instruction] Signed-off-by: Will Deacon --- arch/arm/kernel/hyp-stub.S | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/kernel/hyp-stub.S b/arch/arm/kernel/hyp-stub.S index 65b2417aebce..3c60256d3927 100644 --- a/arch/arm/kernel/hyp-stub.S +++ b/arch/arm/kernel/hyp-stub.S @@ -99,7 +99,7 @@ ENTRY(__hyp_stub_install_secondary) * immediately. */ compare_cpu_mode_with_primary r4, r5, r6, r7 - bxne lr + movne pc, lr /* * Once we have given up on one CPU, we do not try to install the @@ -111,7 +111,7 @@ ENTRY(__hyp_stub_install_secondary) */ cmp r4, #HYP_MODE - bxne lr @ give up if the CPU is not in HYP mode + movne pc, lr @ give up if the CPU is not in HYP mode /* * Configure HSCTLR to set correct exception endianness/instruction set @@ -200,7 +200,7 @@ ENDPROC(__hyp_get_vectors) @ fall through ENTRY(__hyp_set_vectors) __HVC(0) - bx lr + mov pc, lr ENDPROC(__hyp_set_vectors) #ifndef ZIMAGE -- cgit v1.2.3 From 6e484be1ccca3ea495db45900fd42aac8d49d754 Mon Sep 17 00:00:00 2001 From: Marc Zyngier Date: Fri, 4 Jan 2013 17:44:14 +0000 Subject: ARM: virt: boot secondary CPUs through the right entry point Secondary CPUs should use the __hyp_stub_install_secondary entry point, so boot mode inconsistencies can be detected. Cc: Acked-by: Dave Martin Reported-by: Ian Molton Signed-off-by: Marc Zyngier Signed-off-by: Will Deacon --- arch/arm/kernel/head.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S index 4eee351f4668..16abc8322f79 100644 --- a/arch/arm/kernel/head.S +++ b/arch/arm/kernel/head.S @@ -331,7 +331,7 @@ ENTRY(secondary_startup) * as it has already been validated by the primary processor. */ #ifdef CONFIG_ARM_VIRT_EXT - bl __hyp_stub_install + bl __hyp_stub_install_secondary #endif safe_svcmode_maskall r9 -- cgit v1.2.3 From d01723479e6a6c70c83295f7847477a016d5e14a Mon Sep 17 00:00:00 2001 From: Marc Zyngier Date: Fri, 4 Jan 2013 17:44:15 +0000 Subject: ARM: virt: simplify __hyp_stub_install epilog __hyp_stub_install duplicates quite a bit of safe_svcmode_maskall by forcing the CPU back to SVC. This is unnecessary, as safe_svcmode_maskall is called just after. Furthermore, the way we build SPSR_hyp is buggy as we fail to mask the interrupts, leading to interesting behaviours on TC2 + UEFI. The fix is to simply remove this code and rely on safe_svcmode_maskall to do the right thing. Cc: Reviewed-by: Dave Martin Reported-by: Harry Liebel Signed-off-by: Marc Zyngier Signed-off-by: Will Deacon --- arch/arm/kernel/hyp-stub.S | 12 +++--------- 1 file changed, 3 insertions(+), 9 deletions(-) (limited to 'arch') diff --git a/arch/arm/kernel/hyp-stub.S b/arch/arm/kernel/hyp-stub.S index 3c60256d3927..1315c4ccfa56 100644 --- a/arch/arm/kernel/hyp-stub.S +++ b/arch/arm/kernel/hyp-stub.S @@ -120,7 +120,8 @@ ENTRY(__hyp_stub_install_secondary) * Eventually, CPU-specific code might be needed -- assume not for now * * This code relies on the "eret" instruction to synchronize the - * various coprocessor accesses. + * various coprocessor accesses. This is done when we switch to SVC + * (see safe_svcmode_maskall). */ @ Now install the hypervisor stub: adr r7, __hyp_stub_vectors @@ -155,14 +156,7 @@ THUMB( orr r7, #(1 << 30) ) @ HSCTLR.TE 1: #endif - bic r7, r4, #MODE_MASK - orr r7, r7, #SVC_MODE -THUMB( orr r7, r7, #PSR_T_BIT ) - msr spsr_cxsf, r7 @ This is SPSR_hyp. - - __MSR_ELR_HYP(14) @ msr elr_hyp, lr - __ERET @ return, switching to SVC mode - @ The boot CPU mode is left in r4. + bx lr @ The boot CPU mode is left in r4. ENDPROC(__hyp_stub_install_secondary) __hyp_stub_do_trap: -- cgit v1.2.3 From aec99b7bda06436cd95229fe4841aeef29112e11 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Fri, 11 Jan 2013 22:08:27 +0800 Subject: ARM: imx: fix build error with !CONFIG_SMP Commit 68b2532 (ARM: imx: select HAVE_IMX_SRC when SMP is enabled) introduces a build error with imx_v6_v7_defconfig when CONFIG_SMP is deselected. LINK vmlinux LD vmlinux.o MODPOST vmlinux.o GEN .version CHK include/generated/compile.h UPD include/generated/compile.h CC init/version.o LD init/built-in.o arch/arm/mach-imx/built-in.o: In function `imx6q_restart': platform-ahci-imx.c:(.text+0x448c): undefined reference to `imx_src_prepare_restart' arch/arm/mach-imx/built-in.o: In function `imx6q_pm_enter': platform-ahci-imx.c:(.text+0x4544): undefined reference to `imx_set_cpu_jump' arch/arm/mach-imx/built-in.o: In function `imx6q_init_irq': platform-ahci-imx.c:(.init.text+0xbef0): undefined reference to `imx_src_init' make[1]: *** [vmlinux] Error 1 While the commit adds 'def_bool y if SMP' for HAVE_IMX_SRC, it should not remove 'select HAVE_IMX_SRC' from SOC_IMX6Q, as the IMX6Q UP build also needs HAVE_IMX_SRC. Add the HAVE_IMX_SRC select back for SOC_IMX6Q to fix above build error. Signed-off-by: Shawn Guo --- arch/arm/mach-imx/Kconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 1ad0d76de8c7..8e2f29293a58 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -853,6 +853,7 @@ config SOC_IMX6Q select HAVE_CAN_FLEXCAN if CAN select HAVE_IMX_GPC select HAVE_IMX_MMDC + select HAVE_IMX_SRC select HAVE_SMP select MFD_SYSCON select PINCTRL -- cgit v1.2.3 From 67c6b2ef2662b17cc2174f2bdc22a7cb818a8376 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Thu, 10 Jan 2013 10:18:49 +0100 Subject: ARM: integrator: move syscon remap for AP PCIv3 The Integrator/AP syscon remapping was done in the .setup() function rather than .preinit() which is wrong - .preinit() is called before .setup() and the former also use the syscon base and cause a crash since it was not yet remapped. Signed-off-by: Linus Walleij Signed-off-by: Olof Johansson --- arch/arm/mach-integrator/pci_v3.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-integrator/pci_v3.c b/arch/arm/mach-integrator/pci_v3.c index be50e795536d..e7fcea7f3300 100644 --- a/arch/arm/mach-integrator/pci_v3.c +++ b/arch/arm/mach-integrator/pci_v3.c @@ -475,13 +475,12 @@ int __init pci_v3_setup(int nr, struct pci_sys_data *sys) { int ret = 0; + if (!ap_syscon_base) + return -EINVAL; + if (nr == 0) { sys->mem_offset = PHYS_PCI_MEM_BASE; ret = pci_v3_setup_resources(sys); - /* Remap the Integrator system controller */ - ap_syscon_base = ioremap(INTEGRATOR_SC_BASE, 0x100); - if (!ap_syscon_base) - return -EINVAL; } return ret; @@ -497,6 +496,13 @@ void __init pci_v3_preinit(void) unsigned int temp; int ret; + /* Remap the Integrator system controller */ + ap_syscon_base = ioremap(INTEGRATOR_SC_BASE, 0x100); + if (!ap_syscon_base) { + pr_err("unable to remap the AP syscon for PCIv3\n"); + return; + } + pcibios_min_mem = 0x00100000; /* -- cgit v1.2.3 From 72533b77d30c2be02672e26b5dde1263d7b4c2be Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Fri, 11 Jan 2013 12:05:31 -0800 Subject: arm: mvebu: Fix compile for multiplatform when ARMv6 is selected Some systems compile in both ARMv6 and ARMv7 into multiplatform configurations. This means the default compiler flags are for ARMv6, and we will get: arch/arm/mach-mvebu/coherency_ll.S: Assembler messages: arch/arm/mach-mvebu/coherency_ll.S:45: Error: selected processor does not support `dsb' Fix this by specifying ARMv7 flags for coherency_ll.o. Signed-off-by: Tony Lindgren Signed-off-by: Olof Johansson --- arch/arm/mach-mvebu/Makefile | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-mvebu/Makefile index 5dcb369b58aa..99df4df680fd 100644 --- a/arch/arm/mach-mvebu/Makefile +++ b/arch/arm/mach-mvebu/Makefile @@ -1,6 +1,8 @@ ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include \ -I$(srctree)/arch/arm/plat-orion/include +AFLAGS_coherency_ll.o := -Wa,-march=armv7-a + obj-y += system-controller.o obj-$(CONFIG_MACH_ARMADA_370_XP) += armada-370-xp.o irq-armada-370-xp.o addr-map.o coherency.o coherency_ll.o pmsu.o obj-$(CONFIG_SMP) += platsmp.o headsmp.o -- cgit v1.2.3 From 006e792ba5f60c59d8bc5ac5628c54e021e8580f Mon Sep 17 00:00:00 2001 From: Gwenhael Goavec-Merou Date: Sun, 13 Jan 2013 16:56:42 +0100 Subject: ARM: imx: platform-imx-fb: modifies platform device name Framebuffer platform device is now identified by a device id (imx1-fb or imx21-fb) instead of by driver name (imx-fb). Signed-off-by: Gwenhael Goavec-Merou Signed-off-by: Shawn Guo --- arch/arm/mach-imx/devices/platform-imx-fb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/mach-imx/devices/platform-imx-fb.c b/arch/arm/mach-imx/devices/platform-imx-fb.c index 10b0ed39f07f..25a47c616b2d 100644 --- a/arch/arm/mach-imx/devices/platform-imx-fb.c +++ b/arch/arm/mach-imx/devices/platform-imx-fb.c @@ -54,7 +54,7 @@ struct platform_device *__init imx_add_imx_fb( .flags = IORESOURCE_IRQ, }, }; - return imx_add_platform_device_dmamask("imx-fb", 0, + return imx_add_platform_device_dmamask(data->devid, 0, res, ARRAY_SIZE(res), pdata, sizeof(*pdata), DMA_BIT_MASK(32)); } -- cgit v1.2.3 From 837576642167d701f983e4def0d3936b514a28ae Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Mon, 14 Jan 2013 14:08:50 +0800 Subject: ARM: imx: disable cpu in .cpu_kill hook It's buggy to disable the cpu that is being hot-unplugged in .cpu_die hook which runs on the cpu itself. Instead, it should be done in .cpu_kill which runs on the thread (another cpu) that asks for shutting down the cpu. Move imx_enable_cpu(cpu, false) call into .cpu_kill hook, and leave the cpu to be hot-unplugged in WFI within .cpu_die, so that we can get a more stable cpu hot-plug operation. Signed-off-by: Shawn Guo --- arch/arm/mach-imx/common.h | 1 + arch/arm/mach-imx/hotplug.c | 10 ++++++---- arch/arm/mach-imx/platsmp.c | 1 + 3 files changed, 8 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h index 7191ab4434e5..fa36fb84ab19 100644 --- a/arch/arm/mach-imx/common.h +++ b/arch/arm/mach-imx/common.h @@ -142,6 +142,7 @@ extern int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode); extern void imx6q_clock_map_io(void); extern void imx_cpu_die(unsigned int cpu); +extern int imx_cpu_kill(unsigned int cpu); #ifdef CONFIG_PM extern void imx6q_pm_init(void); diff --git a/arch/arm/mach-imx/hotplug.c b/arch/arm/mach-imx/hotplug.c index 3dec962b0770..7bc5fe15dda2 100644 --- a/arch/arm/mach-imx/hotplug.c +++ b/arch/arm/mach-imx/hotplug.c @@ -46,9 +46,11 @@ static inline void cpu_enter_lowpower(void) void imx_cpu_die(unsigned int cpu) { cpu_enter_lowpower(); - imx_enable_cpu(cpu, false); + cpu_do_idle(); +} - /* spin here until hardware takes it down */ - while (1) - ; +int imx_cpu_kill(unsigned int cpu) +{ + imx_enable_cpu(cpu, false); + return 1; } diff --git a/arch/arm/mach-imx/platsmp.c b/arch/arm/mach-imx/platsmp.c index 3777b805b76b..66fae885c842 100644 --- a/arch/arm/mach-imx/platsmp.c +++ b/arch/arm/mach-imx/platsmp.c @@ -92,5 +92,6 @@ struct smp_operations imx_smp_ops __initdata = { .smp_boot_secondary = imx_boot_secondary, #ifdef CONFIG_HOTPLUG_CPU .cpu_die = imx_cpu_die, + .cpu_kill = imx_cpu_kill, #endif }; -- cgit v1.2.3 From 83ae20981ae924c37d02a42c829155fc3851260c Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Mon, 14 Jan 2013 21:11:10 +0800 Subject: ARM: imx: correct low-power mode setting The hardware reset value of bit CCM_CLPCR_LPM enables WAIT mode (WAIT_UNCLOCKED) by default. However this is undesirable because WAIT mode should only be enabled when there is a driver managing ARM clock gating. Correct the initial power mode to WAIT_CLOCKED (disable WAIT mode). While at it, the power mode after resuming is also set back to WAIT_CLOCKED from STOP_POWER_OFF. Signed-off-by: Shawn Guo --- arch/arm/mach-imx/clk-imx6q.c | 3 +++ arch/arm/mach-imx/pm-imx6q.c | 1 + 2 files changed, 4 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c index 7f2c10c7413a..c0c4e723b7f5 100644 --- a/arch/arm/mach-imx/clk-imx6q.c +++ b/arch/arm/mach-imx/clk-imx6q.c @@ -436,6 +436,9 @@ int __init mx6q_clocks_init(void) for (i = 0; i < ARRAY_SIZE(clks_init_on); i++) clk_prepare_enable(clk[clks_init_on[i]]); + /* Set initial power mode */ + imx6q_set_lpm(WAIT_CLOCKED); + np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-gpt"); base = of_iomap(np, 0); WARN_ON(!base); diff --git a/arch/arm/mach-imx/pm-imx6q.c b/arch/arm/mach-imx/pm-imx6q.c index a17543da602d..ee42d20cba19 100644 --- a/arch/arm/mach-imx/pm-imx6q.c +++ b/arch/arm/mach-imx/pm-imx6q.c @@ -41,6 +41,7 @@ static int imx6q_pm_enter(suspend_state_t state) cpu_suspend(0, imx6q_suspend_finish); imx_smp_prepare(); imx_gpc_post_resume(); + imx6q_set_lpm(WAIT_CLOCKED); break; default: return -EINVAL; -- cgit v1.2.3 From d55bf532d72b3cfdfe84e696ace995067324c96c Mon Sep 17 00:00:00 2001 From: Konrad Rzeszutek Wilk Date: Tue, 15 Jan 2013 22:40:26 -0500 Subject: Revert "xen/smp: Fix CPU online/offline bug triggering a BUG: scheduling while atomic." This reverts commit 41bd956de3dfdc3a43708fe2e0c8096c69064a1e. The fix is incorrect and not appropiate for the latest kernels. In fact it _causes_ the BUG: scheduling while atomic while doing vCPU hotplug. Suggested-by: Wei Liu Signed-off-by: Konrad Rzeszutek Wilk --- arch/x86/xen/smp.c | 7 ------- 1 file changed, 7 deletions(-) (limited to 'arch') diff --git a/arch/x86/xen/smp.c b/arch/x86/xen/smp.c index 4f7d2599b484..34bc4cee8887 100644 --- a/arch/x86/xen/smp.c +++ b/arch/x86/xen/smp.c @@ -432,13 +432,6 @@ static void __cpuinit xen_play_dead(void) /* used only with HOTPLUG_CPU */ play_dead_common(); HYPERVISOR_vcpu_op(VCPUOP_down, smp_processor_id(), NULL); cpu_bringup(); - /* - * Balance out the preempt calls - as we are running in cpu_idle - * loop which has been called at bootup from cpu_bringup_and_idle. - * The cpucpu_bringup_and_idle called cpu_bringup which made a - * preempt_disable() So this preempt_enable will balance it out. - */ - preempt_enable(); } #else /* !CONFIG_HOTPLUG_CPU */ -- cgit v1.2.3 From 568dca15aa2a0f4ddee255894ec393a159f13147 Mon Sep 17 00:00:00 2001 From: Stephen Boyd Date: Mon, 14 Jan 2013 19:50:42 +0100 Subject: ARM: 7627/1: Predicate preempt logic on PREEMP_COUNT not PREEMPT alone Patrik Kluba reports that the preempt count becomes invalid due to the preempt_enable() call being unbalanced with a preempt_disable() call in the vfp assembly routines. This happens because preempt_enable() and preempt_disable() update preempt counts under PREEMPT_COUNT=y but the vfp assembly routines do so under PREEMPT=y. In a configuration where PREEMPT=n and DEBUG_ATOMIC_SLEEP=y, PREEMPT_COUNT=y and so the preempt_enable() call in VFP_bounce() keeps subtracting from the preempt count until it goes negative. Fix this by always using PREEMPT_COUNT to decided when to update preempt counts in the ARM assembly code. Signed-off-by: Stephen Boyd Reported-by: Patrik Kluba Tested-by: Patrik Kluba Cc: # 2.6.30 Signed-off-by: Russell King --- arch/arm/vfp/entry.S | 6 +++--- arch/arm/vfp/vfphw.S | 4 ++-- 2 files changed, 5 insertions(+), 5 deletions(-) (limited to 'arch') diff --git a/arch/arm/vfp/entry.S b/arch/arm/vfp/entry.S index cc926c985981..323ce1a62bbf 100644 --- a/arch/arm/vfp/entry.S +++ b/arch/arm/vfp/entry.S @@ -22,7 +22,7 @@ @ IRQs disabled. @ ENTRY(do_vfp) -#ifdef CONFIG_PREEMPT +#ifdef CONFIG_PREEMPT_COUNT ldr r4, [r10, #TI_PREEMPT] @ get preempt count add r11, r4, #1 @ increment it str r11, [r10, #TI_PREEMPT] @@ -35,7 +35,7 @@ ENTRY(do_vfp) ENDPROC(do_vfp) ENTRY(vfp_null_entry) -#ifdef CONFIG_PREEMPT +#ifdef CONFIG_PREEMPT_COUNT get_thread_info r10 ldr r4, [r10, #TI_PREEMPT] @ get preempt count sub r11, r4, #1 @ decrement it @@ -53,7 +53,7 @@ ENDPROC(vfp_null_entry) __INIT ENTRY(vfp_testing_entry) -#ifdef CONFIG_PREEMPT +#ifdef CONFIG_PREEMPT_COUNT get_thread_info r10 ldr r4, [r10, #TI_PREEMPT] @ get preempt count sub r11, r4, #1 @ decrement it diff --git a/arch/arm/vfp/vfphw.S b/arch/arm/vfp/vfphw.S index ea0349f63586..dd5e56f95f3f 100644 --- a/arch/arm/vfp/vfphw.S +++ b/arch/arm/vfp/vfphw.S @@ -168,7 +168,7 @@ vfp_hw_state_valid: @ else it's one 32-bit instruction, so @ always subtract 4 from the following @ instruction address. -#ifdef CONFIG_PREEMPT +#ifdef CONFIG_PREEMPT_COUNT get_thread_info r10 ldr r4, [r10, #TI_PREEMPT] @ get preempt count sub r11, r4, #1 @ decrement it @@ -192,7 +192,7 @@ look_for_VFP_exceptions: @ not recognised by VFP DBGSTR "not VFP" -#ifdef CONFIG_PREEMPT +#ifdef CONFIG_PREEMPT_COUNT get_thread_info r10 ldr r4, [r10, #TI_PREEMPT] @ get preempt count sub r11, r4, #1 @ decrement it -- cgit v1.2.3 From 6f16f4998f98e42e3f2dedf663cfb691ff0324af Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Tue, 15 Jan 2013 18:51:32 +0100 Subject: ARM: 7628/1: head.S: map one extra section for the ATAG/DTB area We currently use a temporary 1MB section aligned to a 1MB boundary for mapping the provided device tree until the final page table is created. However, if the device tree happens to cross that 1MB boundary, the end of it remains unmapped and the kernel crashes when it attempts to access it. Given no restriction on the location of that DTB, it could end up with only a few bytes mapped at the end of a section. Solve this issue by mapping two consecutive sections. Signed-off-by: Nicolas Pitre Tested-by: Sascha Hauer Tested-by: Tomasz Figa Cc: stable@vger.kernel.org Signed-off-by: Russell King --- arch/arm/kernel/head.S | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch') diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S index 4eee351f4668..61fcb18c7e5b 100644 --- a/arch/arm/kernel/head.S +++ b/arch/arm/kernel/head.S @@ -246,6 +246,7 @@ __create_page_tables: /* * Then map boot params address in r2 if specified. + * We map 2 sections in case the ATAGs/DTB crosses a section boundary. */ mov r0, r2, lsr #SECTION_SHIFT movs r0, r0, lsl #SECTION_SHIFT @@ -253,6 +254,8 @@ __create_page_tables: addne r3, r3, #PAGE_OFFSET addne r3, r4, r3, lsr #(SECTION_SHIFT - PMD_ORDER) orrne r6, r7, r0 + strne r6, [r3], #1 << PMD_ORDER + addne r6, r6, #1 << SECTION_SHIFT strne r6, [r3] #ifdef CONFIG_DEBUG_LL -- cgit v1.2.3 From 1bea07f16da0d77689cda7abe73939dd1dfdea22 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Mon, 14 Jan 2013 19:53:54 +0100 Subject: ARM: sunxi: Use the Synosys APB UART instead of ns8250 The UART controller used in the A10/A13 is the Synopsys DesignWare 8250. The wrong use of a regular 8250 driver may lead to a oops during kernel boot with "irq 17: nobody cared", because the apb UART as an extra interrupt that gets raised when writing to the LCR when busy. Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sunxi.dtsi | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/sunxi.dtsi b/arch/arm/boot/dts/sunxi.dtsi index 8bbc2bfef221..8b36abea9f2e 100644 --- a/arch/arm/boot/dts/sunxi.dtsi +++ b/arch/arm/boot/dts/sunxi.dtsi @@ -60,19 +60,21 @@ }; uart0: uart@01c28000 { - compatible = "ns8250"; + compatible = "snps,dw-apb-uart"; reg = <0x01c28000 0x400>; interrupts = <1>; reg-shift = <2>; + reg-io-width = <4>; clock-frequency = <24000000>; status = "disabled"; }; uart1: uart@01c28400 { - compatible = "ns8250"; + compatible = "snps,dw-apb-uart"; reg = <0x01c28400 0x400>; interrupts = <2>; reg-shift = <2>; + reg-io-width = <4>; clock-frequency = <24000000>; status = "disabled"; }; -- cgit v1.2.3 From 9174adbee4a9a49d0139f5d71969852b36720809 Mon Sep 17 00:00:00 2001 From: Andrew Cooper Date: Wed, 16 Jan 2013 12:00:55 +0000 Subject: xen: Fix stack corruption in xen_failsafe_callback for 32bit PVOPS guests. This fixes CVE-2013-0190 / XSA-40 There has been an error on the xen_failsafe_callback path for failed iret, which causes the stack pointer to be wrong when entering the iret_exc error path. This can result in the kernel crashing. In the classic kernel case, the relevant code looked a little like: popl %eax # Error code from hypervisor jz 5f addl $16,%esp jmp iret_exc # Hypervisor said iret fault 5: addl $16,%esp # Hypervisor said segment selector fault Here, there are two identical addls on either option of a branch which appears to have been optimised by hoisting it above the jz, and converting it to an lea, which leaves the flags register unaffected. In the PVOPS case, the code looks like: popl_cfi %eax # Error from the hypervisor lea 16(%esp),%esp # Add $16 before choosing fault path CFI_ADJUST_CFA_OFFSET -16 jz 5f addl $16,%esp # Incorrectly adjust %esp again jmp iret_exc It is possible unprivileged userspace applications to cause this behaviour, for example by loading an LDT code selector, then changing the code selector to be not-present. At this point, there is a race condition where it is possible for the hypervisor to return back to userspace from an interrupt, fault on its own iret, and inject a failsafe_callback into the kernel. This bug has been present since the introduction of Xen PVOPS support in commit 5ead97c84 (xen: Core Xen implementation), in 2.6.23. Signed-off-by: Frediano Ziglio Signed-off-by: Andrew Cooper Cc: stable@vger.kernel.org Signed-off-by: Konrad Rzeszutek Wilk --- arch/x86/kernel/entry_32.S | 1 - 1 file changed, 1 deletion(-) (limited to 'arch') diff --git a/arch/x86/kernel/entry_32.S b/arch/x86/kernel/entry_32.S index 88b725aa1d52..cf8639b4dcf3 100644 --- a/arch/x86/kernel/entry_32.S +++ b/arch/x86/kernel/entry_32.S @@ -1084,7 +1084,6 @@ ENTRY(xen_failsafe_callback) lea 16(%esp),%esp CFI_ADJUST_CFA_OFFSET -16 jz 5f - addl $16,%esp jmp iret_exc 5: pushl_cfi $-1 /* orig_ax = -1 => not a system call */ SAVE_ALL -- cgit v1.2.3 From a73b59c51ab288d81b515b504790267f594884b8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Wed, 16 Jan 2013 15:32:06 +0100 Subject: ARM: compile fix for DEBUG_LL=y && MMU=n MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit debug_ll_addr is only used on machines with an MMU so it can be #ifdef'ed out safely. This fixes: arch/arm/kernel/debug.S: Assembler messages: arch/arm/kernel/debug.S:104: Error: too many positional arguments The problem was introduced in e5c5f2a ARM: implement debug_ll_io_init(). Signed-off-by: Uwe Kleine-König Reviewed-by: Stephen Warren Acked-by: Rob Herring Signed-off-by: Olof Johansson --- arch/arm/kernel/debug.S | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch') diff --git a/arch/arm/kernel/debug.S b/arch/arm/kernel/debug.S index 6809200c31fb..14f7c3b14632 100644 --- a/arch/arm/kernel/debug.S +++ b/arch/arm/kernel/debug.S @@ -100,12 +100,14 @@ ENTRY(printch) b 1b ENDPROC(printch) +#ifdef CONFIG_MMU ENTRY(debug_ll_addr) addruart r2, r3, ip str r2, [r0] str r3, [r1] mov pc, lr ENDPROC(debug_ll_addr) +#endif #else -- cgit v1.2.3 From c0d6cfd3007c16f03b74bfc5ab80d8ab47402fff Mon Sep 17 00:00:00 2001 From: Tomasz Figa Date: Wed, 9 Jan 2013 17:13:23 -0800 Subject: ARM: S3C64XX: Fix build error with CONFIG_S3C_DEV_FB disabled If there is no board selecting CONFIG_S3C_DEV_FB enabled, build will fail on arch/arm/mach-s3c64xx/pm.c, where s3c_device_fb is referenced. This patch adds ifdef guard around the code making it compile only when CONFIG_S3C_DEV_FB is enabled. Signed-off-by: Tomasz Figa Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c64xx/pm.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-s3c64xx/pm.c b/arch/arm/mach-s3c64xx/pm.c index 7feb426fc202..d2e1a16690bd 100644 --- a/arch/arm/mach-s3c64xx/pm.c +++ b/arch/arm/mach-s3c64xx/pm.c @@ -338,8 +338,10 @@ int __init s3c64xx_pm_init(void) for (i = 0; i < ARRAY_SIZE(s3c64xx_pm_domains); i++) pm_genpd_init(&s3c64xx_pm_domains[i]->pd, NULL, false); +#ifdef CONFIG_S3C_DEV_FB if (dev_get_platdata(&s3c_device_fb.dev)) pm_genpd_add_device(&s3c64xx_pm_f.pd, &s3c_device_fb.dev); +#endif return 0; } -- cgit v1.2.3 From 753bd6ddf4802ce4b985890fb70ff4997a70afb8 Mon Sep 17 00:00:00 2001 From: Alim Akhtar Date: Wed, 16 Jan 2013 15:41:01 -0800 Subject: ARM: dts: correct the dw-mshc timing properties as per binding As per the current exynos-dw-mshc bindings, dw-mshc-sdr-timing and dw-mshc-ddr-timing properties are having only two cells, these properties are wrongly set for exynos5250 based cros5250 and smdk5250 platfroms. This patch corrects above timing propreties for above platfroms Signed-off-by: Alim Akhtar Tested-by: Doug Anderson Acked-by: Doug Anderson Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/cros5250-common.dtsi | 12 ++++++------ arch/arm/boot/dts/exynos5250-smdk5250.dts | 8 ++++---- 2 files changed, 10 insertions(+), 10 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/cros5250-common.dtsi b/arch/arm/boot/dts/cros5250-common.dtsi index fddd17417433..46c098017036 100644 --- a/arch/arm/boot/dts/cros5250-common.dtsi +++ b/arch/arm/boot/dts/cros5250-common.dtsi @@ -96,8 +96,8 @@ fifo-depth = <0x80>; card-detect-delay = <200>; samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <2 3 3>; - samsung,dw-mshc-ddr-timing = <1 2 3>; + samsung,dw-mshc-sdr-timing = <2 3>; + samsung,dw-mshc-ddr-timing = <1 2>; slot@0 { reg = <0>; @@ -120,8 +120,8 @@ fifo-depth = <0x80>; card-detect-delay = <200>; samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <2 3 3>; - samsung,dw-mshc-ddr-timing = <1 2 3>; + samsung,dw-mshc-sdr-timing = <2 3>; + samsung,dw-mshc-ddr-timing = <1 2>; slot@0 { reg = <0>; @@ -141,8 +141,8 @@ fifo-depth = <0x80>; card-detect-delay = <200>; samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <2 3 3>; - samsung,dw-mshc-ddr-timing = <1 2 3>; + samsung,dw-mshc-sdr-timing = <2 3>; + samsung,dw-mshc-ddr-timing = <1 2>; slot@0 { reg = <0>; diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts index 942d5761ca97..e05b18f3c33d 100644 --- a/arch/arm/boot/dts/exynos5250-smdk5250.dts +++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts @@ -115,8 +115,8 @@ fifo-depth = <0x80>; card-detect-delay = <200>; samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <2 3 3>; - samsung,dw-mshc-ddr-timing = <1 2 3>; + samsung,dw-mshc-sdr-timing = <2 3>; + samsung,dw-mshc-ddr-timing = <1 2>; slot@0 { reg = <0>; @@ -139,8 +139,8 @@ fifo-depth = <0x80>; card-detect-delay = <200>; samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <2 3 3>; - samsung,dw-mshc-ddr-timing = <1 2 3>; + samsung,dw-mshc-sdr-timing = <2 3>; + samsung,dw-mshc-ddr-timing = <1 2>; slot@0 { reg = <0>; -- cgit v1.2.3 From b86dc0d8c12bbb9fed3f392c284bdc7114ce00c1 Mon Sep 17 00:00:00 2001 From: Dimitris Papastamos Date: Wed, 16 Jan 2013 15:49:53 -0800 Subject: ARM: S3C64XX: Fix up IRQ mapping for balblair on Cragganmore We are using S3C_EINT(4) instead of S3C_EINT(5). Signed-off-by: Dimitris Papastamos Signed-off-by: Mark Brown Cc: stable@vger.kernel.org Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c64xx/mach-crag6410-module.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/mach-s3c64xx/mach-crag6410-module.c b/arch/arm/mach-s3c64xx/mach-crag6410-module.c index 553059f51841..755c0bb119f4 100644 --- a/arch/arm/mach-s3c64xx/mach-crag6410-module.c +++ b/arch/arm/mach-s3c64xx/mach-crag6410-module.c @@ -47,7 +47,7 @@ static struct spi_board_info wm1253_devs[] = { .bus_num = 0, .chip_select = 0, .mode = SPI_MODE_0, - .irq = S3C_EINT(5), + .irq = S3C_EINT(4), .controller_data = &wm0010_spi_csinfo, .platform_data = &wm0010_pdata, }, -- cgit v1.2.3 From d3286144c92ec876da9e30320afa875699b7e0f1 Mon Sep 17 00:00:00 2001 From: Alexander Graf Date: Thu, 17 Jan 2013 13:50:25 +0100 Subject: KVM: PPC: Emulate dcbf Guests can trigger MMIO exits using dcbf. Since we don't emulate cache incoherent MMIO, just do nothing and move on. Reported-by: Ben Collins Signed-off-by: Alexander Graf Tested-by: Ben Collins CC: stable@vger.kernel.org --- arch/powerpc/kvm/emulate.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch') diff --git a/arch/powerpc/kvm/emulate.c b/arch/powerpc/kvm/emulate.c index b0855e5d8905..9d9cddc5b346 100644 --- a/arch/powerpc/kvm/emulate.c +++ b/arch/powerpc/kvm/emulate.c @@ -39,6 +39,7 @@ #define OP_31_XOP_TRAP 4 #define OP_31_XOP_LWZX 23 #define OP_31_XOP_TRAP_64 68 +#define OP_31_XOP_DCBF 86 #define OP_31_XOP_LBZX 87 #define OP_31_XOP_STWX 151 #define OP_31_XOP_STBX 215 @@ -374,6 +375,7 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu) emulated = kvmppc_emulate_mtspr(vcpu, sprn, rs); break; + case OP_31_XOP_DCBF: case OP_31_XOP_DCBI: /* Do nothing. The guest is performing dcbi because * hardware DMA is not snooped by the dcache, but -- cgit v1.2.3 From b8f2c21db390273c3eaf0e5308faeaeb1e233840 Mon Sep 17 00:00:00 2001 From: Nathan Zimmer Date: Tue, 8 Jan 2013 09:02:43 -0600 Subject: efi, x86: Pass a proper identity mapping in efi_call_phys_prelog Update efi_call_phys_prelog to install an identity mapping of all available memory. This corrects a bug on very large systems with more then 512 GB in which bios would not be able to access addresses above not in the mapping. The result is a crash that looks much like this. BUG: unable to handle kernel paging request at 000000effd870020 IP: [<0000000078bce331>] 0x78bce330 PGD 0 Oops: 0000 [#1] SMP Modules linked in: CPU 0 Pid: 0, comm: swapper/0 Tainted: G W 3.8.0-rc1-next-20121224-medusa_ntz+ #2 Intel Corp. Stoutland Platform RIP: 0010:[<0000000078bce331>] [<00