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2026-01-12net: stmmac: use BIT_U32() and GENMASK_U32() for PCS registersRussell King (Oracle)1-15/+15
stmmac registers a 32-bit. u32 is unsigned int. The use of BIT() and GENMASK() leads to integer promotion to unsigned long in expressions such as: u32 old = foo; dev_info(dev, "%08x %08x\n", old, old & BIT(1)); resulting in arg2 being accepted as compatible with the format string and arg3 warning that the argument does not match (because the former is unsigned int, and the latter is unsigned long.) Fix this by defining 32-bit register bits using BIT_U32() and GENMASK_U32() macros. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Link: https://patch.msgid.link/E1vevHh-00000002YoM-1TYL@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-01-12r8169: add support for RTL8127ATF (Fiber SFP)Heiner Kallweit1-4/+85
RTL8127ATF supports a SFP+ port for fiber modules (10GBASE-SR/LR/ER/ZR and DAC). The list of supported modes was provided by Realtek. According to the r8127 vendor driver also 1G modules are supported, but this needs some more complexity in the driver, and only 10G mode has been tested so far. Therefore mainline support will be limited to 10G for now. The SFP port signals are hidden in the chip IP and driven by firmware. Therefore mainline SFP support can't be used here. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Tested-by: Fabio Baltieri <fabio.baltieri@gmail.com> Link: https://patch.msgid.link/5c390273-458f-4d92-896b-3d85f2998d7d@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-01-12net: phy: realtek: add dummy PHY driver for RTL8127ATFHeiner Kallweit1-0/+54
RTL8127ATF supports a SFP+ port for fiber modules (10GBASE-SR/LR/ER/ZR and DAC). The list of supported modes was provided by Realtek. According to the r8127 vendor driver also 1G modules are supported, but this needs some more complexity in the driver, and only 10G mode has been tested so far. Therefore mainline support will be limited to 10G for now. The SFP port signals are hidden in the chip IP and driven by firmware. Therefore mainline SFP support can't be used here. This PHY driver is used by the RTL8127ATF support in r8169. RTL8127ATF reports the same PHY ID as the TP version. Therefore use a dummy PHY ID. This PHY driver is used by the RTL8127ATF support in r8169. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Link: https://patch.msgid.link/e3d55162-210a-4fab-9abf-99c6954eee10@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-01-12net: mctp-i2c: fix duplicate reception of old dataJian Zhang1-0/+6
The MCTP I2C slave callback did not handle I2C_SLAVE_READ_REQUESTED events. As a result, i2c read event will trigger repeated reception of old data, reset rx_pos when a read request is received. Signed-off-by: Jian Zhang <zhangjian.3032@bytedance.com> Link: https://patch.msgid.link/20260108101829.1140448-1-zhangjian.3032@bytedance.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-01-12net: stmmac: Add glue driver for Motorcomm YT6801 ethernet controllerYao Zi3-0/+394
Motorcomm YT6801 is a PCIe ethernet controller based on DWMAC4 IP. It integrates an GbE phy, supporting WOL, VLAN tagging and various types of offloading. It ships an on-chip eFuse for storing various vendor configuration, including MAC address. This patch adds basic glue code for the controller, allowing it to be set up and transmit data at a reasonable speed. Features like WOL could be implemented in the future. Signed-off-by: Yao Zi <me@ziyao.cc> Tested-by: Mingcong Bai <jeffbai@aosc.io> Tested-by: Runhua He <hua@aosc.io> Tested-by: Xi Ruoyao <xry111@xry111.site> Reviewed-by: Sai Krishna <saikrishnag@marvell.com> Link: https://patch.msgid.link/20260109093445.46791-4-me@ziyao.cc Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-01-12net: phy: motorcomm: Support YT8531S PHY in YT6801 Ethernet controllerYao Zi1-0/+4
YT6801's internal PHY is confirmed as a GMII-capable variant of YT8531S by a previous series[1] and reading PHY ID. Add support for PHY_INTERFACE_MODE_GMII for YT8531S to allow the Ethernet driver to reuse the PHY code for its internal PHY. Link: https://lore.kernel.org/all/a48d76ac-db08-46d5-9528-f046a7b541dc@motor-comm.com/ # [1] Co-developed-by: Frank Sae <Frank.Sae@motor-comm.com> Signed-off-by: Frank Sae <Frank.Sae@motor-comm.com> Signed-off-by: Yao Zi <me@ziyao.cc> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Link: https://patch.msgid.link/20260109093445.46791-3-me@ziyao.cc Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-01-13wifi: rtw89: Add support for D-Link VR Air Bridge (DWA-F18)Zenm Chen1-0/+2
Add the ID 2001:3323 to the table to support an additional RTL8832AU adapter: D-Link VR Air Bridge (DWA-F18). Compile tested only. Link: https://github.com/morrownr/rtw89/pull/44 Signed-off-by: Zenm Chen <zenmchen@gmail.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Link: https://patch.msgid.link/20260112004759.6028-1-zenmchen@gmail.com
2026-01-13wifi: rtw89: Add support for MSI AX1800 Nano (GUAX18N)Zenm Chen1-0/+2
Add the ID 0db0:f0c8 to the table to support an additional RTL8832BU adapter: MSI AX1800 Nano (GUAX18N). Compile tested only. Link: https://github.com/morrownr/rtl8852bu-20250826/pull/2 Signed-off-by: Zenm Chen <zenmchen@gmail.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Link: https://patch.msgid.link/20260112004358.5516-1-zenmchen@gmail.com
2026-01-13wifi: rtw89: mac: set EDCCA configurations for RTL8922DPing-Ke Shih5-0/+273
Update EDCCA settings of MAC part for RTL8922D to consider EDCCA state signaled by BB circuit. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Link: https://patch.msgid.link/20260108120320.2217402-14-pkshih@realtek.com
2026-01-13wifi: rtw89: mac: add an entry to enable MAC function in preinitPing-Ke Shih3-0/+82
The preinit is to initialize partial MAC hardware needed before downloading firmware, and then does post-init after firmware runs. For RTL8922D, initialize some DMAC and CMAC at this step. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Link: https://patch.msgid.link/20260108120320.2217402-13-pkshih@realtek.com
2026-01-13wifi: rtw89: mac: separate functions of CMAC power and function enablePing-Ke Shih4-16/+100
To enable/disable CMAC function somewhere, separate controls of CMAC power and function into individual functions. Also correct the hardware settings by the way. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Link: https://patch.msgid.link/20260108120320.2217402-12-pkshih@realtek.com
2026-01-13wifi: rtw89: mac: configure DMA_STOP1 by predefined maskPing-Ke Shih4-31/+24
For coming chip 8922DE, the DMA channel set is different from existing one, so use predefined mask to handle the difference. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Link: https://patch.msgid.link/20260108120320.2217402-11-pkshih@realtek.com
2026-01-13wifi: rtw89: mac: define preload_init for generationsPing-Ke Shih3-3/+8
The preload_init is to define preload size from memory to transmitting buffer. The different generations should call its callback respectively but suddenly it is missed. However, the register definitions of WiFi 6/7 are the same, things are well. For the coming RTL8922D, settings are different, so abstract it. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Link: https://patch.msgid.link/20260108120320.2217402-10-pkshih@realtek.com
2026-01-13wifi: rtw89: mac: update WP quota for RTL8922DPing-Ke Shih4-6/+35
WP (WiFi payload) quota is to point to payload being transmitting in memory. Assign quota to indicate WP page full. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Link: https://patch.msgid.link/20260108120320.2217402-9-pkshih@realtek.com
2026-01-13wifi: rtw89: mac: update MPDU quota according to chip DLE definitionPing-Ke Shih4-1/+14
MPDU quota is to define number of memory used to handle packets in DLE (Data Link Engine). All chips use the same value before, but the RTL8922D need to use chip specific value. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Link: https://patch.msgid.link/20260108120320.2217402-8-pkshih@realtek.com
2026-01-13wifi: rtw89: mac: set quota 13 for PLE SNRPTPing-Ke Shih2-0/+9
The RTL8922D has additional quota 13 of SNRPT for PLE (payload engine). Set value to the quota according to predefined tables. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Link: https://patch.msgid.link/20260108120320.2217402-7-pkshih@realtek.com
2026-01-13wifi: rtw89: mac: add dle_mem and ple_{min,max}_qt quota for RTL8922DPing-Ke Shih3-2/+47
The quota of DLE and PLE depends on hardware design and consideration of performance and application. Define them accordingly. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Link: https://patch.msgid.link/20260108120320.2217402-6-pkshih@realtek.com
2026-01-13wifi: rtw89: mac: remove unnecessary return from ↵Ping-Ke Shih1-1/+1
rtw89_fwdl_secure_idmem_share_mode() The return type of rtw89_fwdl_secure_idmem_share_mode() is void, so no need a return. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Link: https://patch.msgid.link/20260108120320.2217402-5-pkshih@realtek.com
2026-01-13wifi: rtw89: coex: update coex software control for RTL8922DChia-Yuan Li3-1/+129
Update software control API due to 8922D PTA hardware changes. Signed-off-by: Chia-Yuan Li <leo.li@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Link: https://patch.msgid.link/20260108120320.2217402-4-pkshih@realtek.com
2026-01-13wifi: rtw89: coex: update scoreboard value according to power state for two BTPing-Ke Shih1-3/+19
Assign timeslot to WiFi if power state is on. Since firmware isn't working at this moment, write scoreboard register to notify BT. Extend the code to support two BT for coming chips. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Link: https://patch.msgid.link/20260108120320.2217402-3-pkshih@realtek.com
2026-01-13wifi: rtw89: coex: make coex scoreboard as chip infoPing-Ke Shih9-5/+29
The coex scoreboard is to exchange WiFi and BT profiles, and the coming chip 8922D changes the design including extend to two scoreboards and individual register for cfg/get. Follow the changes to abstract current code, but not change logic for existing chips at all. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Link: https://patch.msgid.link/20260108120320.2217402-2-pkshih@realtek.com
2026-01-12net: stmmac: remove unused definitionsRussell King (Oracle)4-149/+1
Potentially unused definitions were discovered using: $ for m in $(grep '#define ' $header | sed -e 's,#define[ ]*\([^ ]*\)[ ].*,\1,;s,(.*,,'); do if ! grep -q $m *.c; then echo $m; fi; done Each was verified, and then removed where truly unused. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Link: https://patch.msgid.link/E1vdtwI-00000002Gu6-1HYu@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-01-12net: stmmac: arrange register fields after register offsetsRussell King (Oracle)2-152/+154
Arrange the register fields to be after their corresponding register offset definitions, which groups all the definitions for a register together. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Link: https://patch.msgid.link/E1vdtwD-00000002Gu0-0nTN@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-01-12net: stmmac: cores: remove many xxx_SHIFT definitionsRussell King (Oracle)18-222/+129
We have many xxx_SHIFT definitions along side their corresponding xxx_MASK definitions for the various cores. Manually using the shift and mask can be error prone, as shown with the dwmac4 RXFSTS fix patch. Convert sites that use xxx_SHIFT and xxx_MASK directly to use FIELD_GET(), FIELD_PREP(), and u32_replace_bits() as appropriate. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Link: https://patch.msgid.link/E1vdtw8-00000002Gtu-0Hyu@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-01-12net: stmmac: descs: remove many xxx_SHIFT definitionsRussell King (Oracle)8-108/+55
Remove many xxx_SHIFT definitions for descriptors, isntead using FIELD_PREP(), FIELD_GET(), and u32_replace_bits() as appropriate to manipulate the bitfields. This avoids potential errors where an incorrect shift is used with a mask. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Link: https://patch.msgid.link/E1vdtw2-00000002Gto-3ZPt@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-01-12net: stmmac: descs: use u32 for descriptorsRussell King (Oracle)4-27/+25
Use u32 rather than unsigned int for 32-bit descriptor variables. This will allow the u32 bitfield helpers to be used. Note, we use __le32 for the in-memory descriptor structures. Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Link: https://patch.msgid.link/E1vdtvx-00000002Gth-32RU@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-01-12net: stmmac: descs: fix buffer 1 off-by-one errorRussell King (Oracle)1-9/+17
norm_set_tx_desc_len_on_ring() incorrectly tests the buffer length, leading to a length of 2048 being squeezed into a bitfield covering bits 10:0 - which results in the buffer 1 size being zero. If this field is zero, buffer 1 is ignored, and thus is equivalent to transmitting a zero length buffer. The path to norm_set_tx_desc_len_on_ring() is only possible when the hardware does not support enhanced descriptors (plat->enh_desc clear) which is dependent on the hardware. Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Link: https://patch.msgid.link/E1vdtvs-00000002Gtb-2U9G@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-01-12net: stmmac: dwmac4: fix PTP message type field extractionRussell King (Oracle)1-1/+1
In dwmac4_wrback_get_rx_status(), the code extracts the PTP message type from receive descriptor 1 using the dwmac enhanced descriptor definitions: message_type = (rdes1 & ERDES4_MSG_TYPE_MASK) >> 8; This is defined as: #define ERDES4_MSG_TYPE_MASK GENMASK(11, 8) The correct definition is RDES1_PTP_MSG_TYPE_MASK, which is also defined as: #define RDES1_PTP_MSG_TYPE_MASK GENMASK(11, 8) Use the correct definition, converting to use FIELD_GET() to extract it without needing an open-coded shift right that is dependent on the mask definition. As this change has no effect on the generated code, there is no need to treat this as a bug fix. Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Link: https://patch.msgid.link/E1vdtvn-00000002GtV-1wCS@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-01-12net: stmmac: dwmac4: fix RX FIFO fill statisticsRussell King (Oracle)2-3/+1
In dwmac4_debug(), the wrong shift is used with the RXFSTS mask: #define MTL_DEBUG_RXFSTS_MASK GENMASK(5, 4) #define MTL_DEBUG_RXFSTS_SHIFT 4 #define MTL_DEBUG_RRCSTS_SHIFT 1 u32 rxfsts = (value & MTL_DEBUG_RXFSTS_MASK) >> MTL_DEBUG_RRCSTS_SHIFT; where rxfsts is tested against small integers 1 .. 3. This results in the tests always failing, causing the "mtl_rx_fifo__fill_level_empty" statistic counter to always be incremented no matter what the fill level actually is. Fix this by using FIELD_GET() and remove the unnecessary MTL_DEBUG_RXFSTS_SHIFT definition as FIELD_GET() will shift according to the least siginificant set bit in the supplied field mask. Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Link: https://patch.msgid.link/E1vdtvi-00000002GtP-1Os1@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-01-12net: stmmac: dwmac4: remove duplicated definitionsRussell King (Oracle)1-29/+0
dwmac4.h duplicates some of the debug register definitions. Remove the second copy. Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Link: https://patch.msgid.link/E1vdtvd-00000002GtJ-0qFI@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-01-12net: phy: motorcomm: fix duplex setting error for phy ledsJijie Shao1-2/+2
fix duplex setting error for phy leds Fixes: 355b82c54c12 ("net: phy: motorcomm: Add support for PHY LEDs on YT8521") Signed-off-by: Jijie Shao <shaojijie@huawei.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://patch.msgid.link/20260108071409.2750607-1-shaojijie@huawei.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-01-12Merge branch '100GbE' of ↵Jakub Kicinski10-116/+145
git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queue Tony Nguyen says: ==================== Intel Wired LAN Driver Updates 2026-01-09 (ice, ixgbe, idpf) For ice: Grzegorz commonizes firmware loading process across all ice devices. Michal adjusts default queue allocation to be based on netif_get_num_default_rss_queues() rather than num_online_cpus(). For ixgbe: Birger Koblitz adds support for 10G-BX modules. For idpf: Sreedevi converts always successful function to return void. Andy Shevchenko fixes kdocs for missing 'Return:' in idpf_txrx.c file. * '100GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queue: idpf: Fix kernel-doc descriptions to avoid warnings idpf: update idpf_up_complete() return type to void ice: use netif_get_num_default_rss_queues() ixgbe: Add 10G-BX support ice: unify PHY FW loading status handler for E800 devices ==================== Link: https://patch.msgid.link/20260109210647.3849008-1-anthony.l.nguyen@intel.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-01-12Merge tag 'wireless-next-2026-01-12' of ↵Jakub Kicinski87-17347/+20129
https://git.kernel.org/pub/scm/linux/kernel/git/wireless/wireless-next Johannes Berg says: ==================== First set of changes for the current -next cycle, of note: - ath12k gets an overhaul to support multi-wiphy device wiphy and pave the way for future device support in the same driver (rather than splitting to ath13k) - mac80211 gets some better iteration macros * tag 'wireless-next-2026-01-12' of https://git.kernel.org/pub/scm/linux/kernel/git/wireless/wireless-next: (120 commits) wifi: mac80211: remove width argument from ieee80211_parse_bitrates wifi: mac80211_hwsim: remove NAN by default wifi: mac80211: improve station iteration ergonomics wifi: mac80211: improve interface iteration ergonomics wifi: cfg80211: include S1G_NO_PRIMARY flag when sending channel wifi: mac80211: unexport ieee80211_get_bssid() wl1251: Replace strncpy with strscpy in wl1251_acx_fw_version wifi: iwlegacy: 3945-rs: remove redundant pointer check in il3945_rs_tx_status() and il3945_rs_get_rate() wifi: mac80211: don't send an unused argument to ieee80211_check_combinations wifi: libertas: fix WARNING in usb_tx_block wifi: mwifiex: Allocate dev name earlier for interface workqueue name wifi: wlcore: sdio: Use pm_ptr instead of #ifdef CONFIG_PM wifi: cfg80211: Fix use_for flag update on BSS refresh wifi: brcmfmac: rename function that frees vif wifi: brcmfmac: fix/add kernel-doc comments wifi: mac80211: Update csa_finalize to use link_id wifi: cfg80211: add cfg80211_stop_link() for per-link teardown wifi: ath12k: Skip DP peer creation for scan vdev wifi: ath12k: move firmware stats request outside of atomic context wifi: ath12k: add the missing RCU lock in ath12k_dp_tx_free_txbuf() ... ==================== Link: https://patch.msgid.link/20260112185836.378736-3-johannes@sipsolutions.net Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-01-12drm/i915/guc: Recommend GuC v70.53.0 for DG2, MTLJulia Filipchuk1-2/+2
UAPI compatibility version 1.26.0 Update recommended GuC version for DG2, MTL. Signed-off-by: Julia Filipchuk <julia.filipchuk@intel.com> Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Link: https://patch.msgid.link/20251112182606.1470733-2-julia.filipchuk@intel.com
2026-01-12ublk: add UBLK_CMD_TRY_STOP_DEV commandYoav Cohen1-2/+42
Add a best-effort stop command, UBLK_CMD_TRY_STOP_DEV, which only stops a ublk device when it has no active openers. Unlike UBLK_CMD_STOP_DEV, this command does not disrupt existing users. New opens are blocked only after disk_openers has reached zero; if the device is busy, the command returns -EBUSY and leaves it running. The ub->block_open flag is used only to close a race with an in-progress open and does not otherwise change open behavior. Advertise support via the UBLK_F_SAFE_STOP_DEV feature flag. Signed-off-by: Yoav Cohen <yoav@nvidia.com> Reviewed-by: Ming Lei <ming.lei@redhat.com> Signed-off-by: Jens Axboe <axboe@kernel.dk>
2026-01-12ublk: make ublk_ctrl_stop_dev return voidYoav Cohen1-3/+3
This function always returns 0, so there is no need to return a value. Signed-off-by: Yoav Cohen <yoav@nvidia.com> Reviewed-by: Ming Lei <ming.lei@redhat.com> Signed-off-by: Jens Axboe <axboe@kernel.dk>
2026-01-12drm/xe/hwmon: Expose individual VRAM channel temperatureKarthik Poosa2-0/+69
Expose individual VRAM temperature attributes. Update Xe hwmon documentation for this entry. v2: - Avoid using default switch case for VRAM individual temperatures. - Append labels with VRAM channel number. - Update kernel version in Xe hwmon documentation. v3: - Add missing brackets in Xe hwmon documentation from VRAM channel sysfs. - Reorder BMG_VRAM_TEMPERATURE_N macro in xe_pcode_regs.h. - Add api to check if VRAM is available on the channel. v4: - Improve VRAM label handling to eliminate temp variable by introducing a dedicated array vram_label in xe_hwmon_thermal_info. - Remove a magic number. - Change the label from vram_X to vram_ch_X. v5: - Address review comments from Raag. - Change vram to VRAM in commit title and subject. - Refactor BMG_VRAM_TEMPERATURE_N macro. - Refactor is_vram_ch_available(). - Rephrase a comment. - Check individual VRAM temperature limits in addition to VRAM availability in xe_hwmon_temp_is_visible. (Raag) - Move VRAM label change out of this patch. v6: - Use in_range() for VRAM_N index check instead of if check. (Raag) - Minor aesthetic changes. Signed-off-by: Karthik Poosa <karthik.poosa@intel.com> Reviewed-by: Raag Jadav <raag.jadav@intel.com> Link: https://patch.msgid.link/20260112203521.1014388-5-karthik.poosa@intel.com Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2026-01-12drm/xe/hwmon: Expose GPU PCIe temperatureKarthik Poosa2-0/+34
Expose GPU PCIe average temperature and its limits via hwmon sysfs entry temp5_xxx. Update Xe hwmon sysfs documentation for this. v2: Update kernel version in Xe hwmon documentation. (Raag) v3: - Address review comments from Raag. - Remove redundant debug log. - Update kernel version in Xe hwmon documentation. (Raag) v4: - Address review comments from Raag. - Group new temperature attributes with existing temperature attributes as per channel index in Xe hwmon documentation. - Use TEMP_MASK instead of TEMP_MASK_MAILBOX. - Add PCIE_SENSOR_MASK which uses REG_FIELD_GET as replacement of PCIE_SENSOR_SHIFT. v5: - Address review comments from Raag. - Use REG_FIELD_GET to get PCIe temperature. - Move PCIE_SENSOR_GROUP_ID and PCIE_SENSOR_MASK to xe_pcode_api.h - Cosmetic change. Signed-off-by: Karthik Poosa <karthik.poosa@intel.com> Reviewed-by: Raag Jadav <raag.jadav@intel.com> Link: https://patch.msgid.link/20260112203521.1014388-4-karthik.poosa@intel.com Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2026-01-12drm/xe/hwmon: Expose memory controller temperatureKarthik Poosa2-5/+76
Expose GPU memory controller average temperature and its limits under temp4_xxx. Update Xe hwmon documentation for this. v2: - Rephrase commit message. (Badal) - Update kernel version in Xe hwmon documentation. (Raag) v3: - Update kernel version in Xe hwmon documentation. - Address review comments from Raag. - Remove obvious comments. - Remove redundant debug logs. - Remove unnecessary checks. - Avoid magic numbers. - Add new comments. - Use temperature sensors count to make memory controller visible. - Use temperature limits of package for memory controller. v4: - Address review comments from Raag. - Group new temperature attributes with existing temperature attributes as per channel index in Xe hwmon documentation. - Use DIV_ROUND_UP to calculate dwords needed for temperature limits. - Minor aesthetic refinements. - Remove unused TEMP_MASK_MAILBOX. v5: - Use REG_FIELD_GET to get count from READ_THERMAL_DATA output. (Raag) - Change count print from decimal to hexadecimal. - Cosmetic changes. Signed-off-by: Karthik Poosa <karthik.poosa@intel.com> Reviewed-by: Raag Jadav <raag.jadav@intel.com> Link: https://patch.msgid.link/20260112203521.1014388-3-karthik.poosa@intel.com Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2026-01-12drm/xe/hwmon: Expose temperature limitsKarthik Poosa5-3/+108
Read temperature limits using pcode mailbox and expose shutdown temperature limit as tempX_emergency, critical temperature limit as tempX_crit and GPU max temperature limit as temp2_max. Update Xe hwmon documentation with above entries. v2: - Resolve a documentation warning. - Address below review comments from Raag. - Update date and kernel version in Xe hwmon documentation. - Remove explicit disable of has_mbx_thermal_info for unsupported platforms. - Remove unnecessary default case in switches. - Remove obvious comments. - Use TEMP_LIMIT_MAX to compute number of dwords needed in xe_hwmon_thermal_info. - Remove THERMAL_LIMITS_DWORDS macro. - Use has_mbx_thermal_info for checking thermal mailbox support. v3: - Address below minor comments. (Raag) - Group new temperature attributes with existing temperature attributes as per channel index in Xe hwmon documentation. - Rename enums of xe_temp_limit to improve clarity. - Use DIV_ROUND_UP to calculate dwords needed for temperature limits. - Use return instead of breaks in xe_hwmon_temp_read. - Minor aesthetic refinements. v4: - Remove a redundant break. (Raag) - Update drm_dbg to drm_warn to inform user of unavailability for thermal mailbox on expected platforms. Signed-off-by: Karthik Poosa <karthik.poosa@intel.com> Reviewed-by: Raag Jadav <raag.jadav@intel.com> Link: https://patch.msgid.link/20260112203521.1014388-2-karthik.poosa@intel.com Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2026-01-12crypto: aes - Replace aes-generic with wrapper around libEric Biggers1-5/+5
Now that the AES library's performance has been improved, replace aes_generic.c with a new file aes.c which wraps the AES library. In preparation for making the AES library actually utilize the kernel's existing architecture-optimized AES code including AES instructions, set the driver name to "aes-lib" instead of "aes-generic". This mirrors what's been done for the hash algorithms. Update testmgr.c accordingly. Since this removes the crypto_aes_set_key() helper function, add temporary replacements for it to arch/arm/crypto/aes-cipher-glue.c and arch/arm64/crypto/aes-cipher-glue.c. This is temporary, as that code will be migrated into lib/crypto/ in later commits. Acked-by: Ard Biesheuvel <ardb@kernel.org> Link: https://lore.kernel.org/r/20260112192035.10427-10-ebiggers@kernel.org Signed-off-by: Eric Biggers <ebiggers@kernel.org>
2026-01-12wifi: mac80211_hwsim: remove NAN by defaultJohannes Berg1-2/+0
We're improving NAN support, but NAN datapath support also means we need to change some other things, e.g. related to rate control. Remove NAN by default again from hwsim since it's the much newer feature. Link: https://patch.msgid.link/20260108143139.0d4af6ae3609.Ie444b9f5aedabc713c6a1279b5b55976cfb4c465@changeid Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2026-01-12wl1251: Replace strncpy with strscpy in wl1251_acx_fw_versionThorsten Blum1-9/+2
strncpy() is deprecated [1] for NUL-terminated destination buffers since it does not guarantee NUL termination. Remove the manual NUL termination and replace strncpy() with strscpy() to ensure NUL termination of the destination buffer. Using strscpy_pad() to retain the NUL-padding behavior of strncpy() is not needed because ->fw_ver is only used as a C-string. Link: https://www.kernel.org/doc/html/latest/process/deprecated.html#strncpy-on-nul-terminated-strings [1] Signed-off-by: Thorsten Blum <thorsten.blum@linux.dev> Link: https://patch.msgid.link/20260111134301.598839-1-thorsten.blum@linux.dev Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2026-01-12wifi: iwlegacy: 3945-rs: remove redundant pointer check in ↵Tuo Li1-6/+1
il3945_rs_tx_status() and il3945_rs_get_rate() The variable il_sta passed into these two functions cannot be NULL, so remove the related null checks. Signed-off-by: Tuo Li <islituo@gmail.com> Acked-by: Stanislaw Gruszka <stf_xl@wp.pl> Link: https://patch.msgid.link/20260111171118.203249-1-islituo@gmail.com Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2026-01-12Merge back material related to system sleep for 6.20Rafael J. Wysocki1-3/+4
2026-01-12wifi: mwifiex: Fix a loop in mwifiex_update_ampdu_rxwinsize()Dan Carpenter1-3/+3
The "i" iterator variable is used to count two different things but unfortunately we can't store two different numbers in the same variable. Use "i" for the outside loop and "j" for the inside loop. Cc: stable@vger.kernel.org Fixes: d219b7eb3792 ("mwifiex: handle BT coex event to adjust Rx BA window size") Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Reviewed-by: Jeff Chen <jeff.chen_1@nxp.com> Link: https://patch.msgid.link/aWAM2MGUWRP0zWUd@stanley.mountain Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2026-01-12wifi: rsi: Fix memory corruption due to not set vif driver data sizeMarek Vasut1-0/+1
The struct ieee80211_vif contains trailing space for vif driver data, when struct ieee80211_vif is allocated, the total memory size that is allocated is sizeof(struct ieee80211_vif) + size of vif driver data. The size of vif driver data is set by each WiFi driver as needed. The RSI911x driver does not set vif driver data size, no trailing space for vif driver data is therefore allocated past struct ieee80211_vif . The RSI911x driver does however use the vif driver data to store its vif driver data structure "struct vif_priv". An access to vif->drv_priv leads to access out of struct ieee80211_vif bounds and corruption of some memory. In case of the failure observed locally, rsi_mac80211_add_interface() would write struct vif_priv *vif_info = (struct vif_priv *)vif->drv_priv; vif_info->vap_id = vap_idx. This write corrupts struct fq_tin member struct list_head new_flows . The flow = list_first_entry(head, struct fq_flow, flowchain); in fq_tin_reset() then reports non-NULL bogus address, which when accessed causes a crash. The trigger is very simple, boot the machine with init=/bin/sh , mount devtmpfs, sysfs, procfs, and then do "ip link set wlan0 up", "sleep 1", "ip link set wlan0 down" and the crash occurs. Fix this by setting the correct size of vif driver data, which is the size of "struct vif_priv", so that memory is allocated and the driver can store its driver data in it, instead of corrupting memory around it. Cc: stable@vger.kernel.org Fixes: dad0d04fa7ba ("rsi: Add RS9113 wireless driver") Signed-off-by: Marek Vasut <marex@nabladev.com> Link: https://patch.msgid.link/20260109235817.150330-1-marex@nabladev.com Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2026-01-12ACPI: PM: s2idle: Add missing checks to acpi_s2idle_begin_lps0()Rafael J. Wysocki1-1/+2
Commit 32ece31db4df ("ACPI: PM: s2idle: Only retrieve constraints when needed"), that attempted to avoid useless evaluation of LPS0 _DSM Function 1 in lps0_device_attach(), forgot to add checks for lps0_device_handle and sleep_no_lps0 to acpi_s2idle_begin_lps0() where they should be done before calling lpi_device_get_constraints() or lpi_device_get_constraints_amd(). Add the missing checks. Fixes: 32ece31db4df ("ACPI: PM: s2idle: Only retrieve constraints when needed") Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Reviewed-by: Mario Limonciello (AMD) <superm1@kernel.org> Link: https://patch.msgid.link/2818730.mvXUDI8C0e@rafael.j.wysocki
2026-01-12drm/xe/ptl: Enable PXP for PTLDaniele Ceraolo Spurio1-0/+1
Now that the GSC FW is defined, we can enable PXP for PTL. The feature will only be turned on if the binary is found on disk. Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Julia Filipchuk <julia.filipchuk@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patch.msgid.link/20260108011340.2562349-8-daniele.ceraolospurio@intel.com
2026-01-12drm/xe/ptl: Define GSC for PTLDaniele Ceraolo Spurio1-0/+1
PTL is identified by GSC major version 105. The compatibility version is still 1.0. Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Julia Filipchuk <julia.filipchuk@intel.com> Reviewed-by: Julia Filipchuk <julia.filipchuk@intel.com> Link: https://patch.msgid.link/20260108011340.2562349-7-daniele.ceraolospurio@intel.com