aboutsummaryrefslogtreecommitdiff
path: root/drivers
AgeCommit message (Collapse)AuthorFilesLines
2026-01-18watchdog: rz: Discard pm_runtime_put() return valuesRafael J. Wysocki2-6/+2
Failing a watchdog stop due to pm_runtime_put() returning a negative value is not particularly useful. Returning an error code from pm_runtime_put() merely means that it has not queued up a work item to check whether or not the device can be suspended and there are many perfectly valid situations in which that can happen, like after writing "on" to the devices' runtime PM "control" attribute in sysfs for one example. It also happens when the kernel is configured with CONFIG_PM unset. Accordingly, update rzg2l_wdt_stop() and rzv2h_wdt_stop() to simply discard the return value of pm_runtime_put(). This will facilitate a planned change of the pm_runtime_put() return type to void in the future. Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
2026-01-18watchdog: Make API functions const correctKari Argillander1-1/+2
Many watchdog API functions do not modify the watchdog_device nor device. Mark their arguments as const to reflect this and improve const-correctness of the API. No functional change intended. Signed-off-by: Kari Argillander <kari.argillander@gmail.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
2026-01-18iommu/amd: Add support for hw_info for iommu capability querySuravee Suthikulpanit5-0/+59
AMD IOMMU Extended Feature (EFR) and Extended Feature 2 (EFR2) registers specify features supported by each IOMMU hardware instance. The IOMMU driver checks each feature-specific bits before enabling each feature at run time. For IOMMUFD, the hypervisor passes the raw value of amd_iommu_efr and amd_iommu_efr2 to VMM via iommufd IOMMU_DEVICE_GET_HW_INFO ioctl. Reviewed-by: Nicolin Chen <nicolinc@nvidia.com> Reviewed-by: Vasant Hegde <vasant.hegde@amd.com> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com> Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2026-01-18irqchip/renesas-rzv2h: Prevent TINT spurious interrupt during resumeBiju Das1-1/+8
A glitch in the edge detection circuit can cause a spurious interrupt. The hardware manual recommends clearing the status flag after setting the ICU_TSSRk register as a countermeasure. Currently, a spurious interrupt is generated on the resume path of s2idle for the PMIC RTC TINT interrupt due to a glitch related to unnecessary enabling/disabling of the TINT enable bit. Fix this issue by not setting TSSR(TINT Source) and TITSR(TINT Detection Method Selection) registers if the values are the same as those set in these registers. Fixes: 0d7605e75ac2 ("irqchip: Add RZ/V2H(P) Interrupt Control Unit (ICU) driver") Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Signed-off-by: Thomas Gleixner <tglx@kernel.org> Cc: stable@vger.kernel.org Link: https://patch.msgid.link/20260113125315.359967-2-biju.das.jz@bp.renesas.com
2026-01-18watchdog: imx7ulp_wdt: handle the nowayout optionOleksandr Suvorov1-0/+1
The module parameter `nowayout` indicates whether the watchdog should ever be allowed to stop, but the driver currently ignores this option. Pass the `nowayout` parameter to the watchdog core by setting the WDOG_NO_WAY_OUT flag accordingly. Signed-off-by: Oleksandr Suvorov <cryosay@gmail.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
2026-01-18watchdog: sbsa: Update the W_IIDR Implementer bit mask to 0xFFFNaina Mehta1-2/+2
The implementer mask defined in the driver [1] captures bits 0-10, whereas section C.4.2 of BSA specification [2] indicates that bits 0-11 of the W_IIDR register represent the implementer JEP106 code. Update the SBSA_GWDT_IMPL_MASK corresponding to bits 0-11, while at it update SBSA_GWDT_VERSION_MASK mask to use GENMASK. [1] #define SBSA_GWDT_IMPL_MASK 0x7FF [2] Implementer, bits [11:0] Contains the JEP106 code of the company that implemented the Generic Watchdog: Bits[11:8] The JEP106 continuation code of the implementer. Bit[7] Always 0 Bits [6:0] The JEP106 identity code of the implementer. Signed-off-by: Naina Mehta <naina.mehta@oss.qualcomm.com> Acked-by: Aaron Plattner <aplattner@nvidia.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
2026-01-18watchdog: Always return time left until watchdog times outGuenter Roeck1-20/+15
The watchdog core knows when the most recent keepalive was sent. It also knows the configured timeout. With that, it can always calculate and return the time left until a watchdog times out, even if its driver does not support it. Convert watchdog_get_timeleft() into a void function. It never returns an error after this patch is applied, so the error checks in the calling code are now pointless and can be removed. Signed-off-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Wim Van Sebroeck <wim@linux-watchdog.org> Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
2026-01-18watchdog: iTCO: Drop vendor supportGuenter Roeck5-251/+2
iTCO vendor support was introduced in 2006 to support SuperMicro boards with Pentium 3 CPUs. It was extended in 2009 to support motherbords with broken BIOS (specifically Intel DG33TL). The code is long since obsolete, so let's drop support for it. Signed-off-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Wim Van Sebroeck <wim@linux-watchdog.org> Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
2026-01-18firewire: core: provide isoc header buffer size outside card driverTakashi Sakamoto4-13/+15
For single-channel isochronous contexts, the header storage size is hard-coded to PAGE_SIZE. which is inconvenient for protocol implementations requiring more space. This commit refactors the code to obtain the header storage size outside the 1394 OHCI driver. Link: https://lore.kernel.org/r/20260117142823.440811-8-o-takashi@sakamocchi.jp Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
2026-01-18firewire: ohci: allocate isoc context header by kvmalloc()Takashi Sakamoto1-3/+3
Isochronous packet handling now runs in a workqueue context, where page faults is acceptable. This commit replaces __get_free_page() with kvmalloc() when allocating the isochronous context header buffer. Link: https://lore.kernel.org/r/20260117142823.440811-7-o-takashi@sakamocchi.jp Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
2026-01-18firewire: core: add flags member for isochronous context structureTakashi Sakamoto3-3/+4
This is minor code refactoring to add a flag member to the isochronous context structure. At present, it is used only for the option to drop packets when the context header overflows. Link: https://lore.kernel.org/r/20260117142823.440811-6-o-takashi@sakamocchi.jp Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
2026-01-18firewire: ohci: use cleanup helper for isoc context header allocationTakashi Sakamoto1-10/+7
Some cleanup helpers are useful in error path after memory allocation for header storage. Link: https://lore.kernel.org/r/20260117142823.440811-5-o-takashi@sakamocchi.jp Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
2026-01-18firewire: ohci: code refactoring to use union for isoc multiple channel stateTakashi Sakamoto1-14/+15
In 1394 OHCI driver, some members of struct iso_context are only used for multi-channel isochronous contexts. This commit uses a union for these members to clearly separate multi-channel specific state. Link: https://lore.kernel.org/r/20260117142823.440811-4-o-takashi@sakamocchi.jp Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
2026-01-18firewire: ohci: refactor isoc single-channel state using a unionTakashi Sakamoto1-27/+41
In 1394 OHCI driver, some members of struct iso_context are only used for single-channel isochronous contexts. This commit groups these members into a union. Link: https://lore.kernel.org/r/20260117142823.440811-3-o-takashi@sakamocchi.jp Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
2026-01-18firewire: core: add function variants for isochronous context creationTakashi Sakamoto3-30/+16
The fw_iso_callback union was added by a commit ebe4560ed5c ("firewire: Remove function callback casts") to remove function pointer cast. That change affected the cdev layer of the core code, but it is more convenient for fw_iso_context_create() to accept the union directly. This commit renames and changes the existing function to take the union argument, and add static inline wrapper functions as variants. Link: https://lore.kernel.org/r/20260117142823.440811-2-o-takashi@sakamocchi.jp Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
2026-01-18soc/tegra: pmc: Add PMC contextual functionsThierry Reding1-14/+160
Add implementations that take as argument a struct tegra_pmc * for most public APIs, as well as a function to obtain the PMC for any given device. This will allow transitioning away users from relying on a global variable storing the PMC context. Signed-off-by: Thierry Reding <treding@nvidia.com>
2026-01-18soc/tegra: pmc: Do not rely on global variableThierry Reding1-1/+3
The reset action for changing the suspend mode back on failure can take a context-specific data argument that can be set to the PMC context in order to avoid relying on a global variable. Signed-off-by: Thierry Reding <treding@nvidia.com>
2026-01-18soc/tegra: pmc: Use driver-private dataThierry Reding1-0/+2
Instead of relying on a global variable for the PMC context, use the driver-private data for sysfs attributes. Signed-off-by: Thierry Reding <treding@nvidia.com>
2026-01-18soc/tegra: pmc: Use PMC context embedded in powergatesThierry Reding1-10/+24
The powergates exposed by the PMC have a pointer to the PMC context embedded. Use that embedded reference instead of relying on a global variable. For the core power domain a new structure needs to be introduced to wrap the generic PM domain and store the PMC context. Signed-off-by: Thierry Reding <treding@nvidia.com>
2026-01-18soc/tegra: pmc: Pass PMC context as debugfs dataThierry Reding1-1/+2
Each debugfs file can have private data associated with it. Use this to pass the PMC context instead of relying on a global variable. Signed-off-by: Thierry Reding <treding@nvidia.com>
2026-01-18soc/tegra: pmc: Pass PMC context via sys-off callback dataThierry Reding1-5/+11
To avoid relying on global variables, use the sys-off callback data to store a reference to the PMC context structure. Signed-off-by: Thierry Reding <treding@nvidia.com>
2026-01-18soc/tegra: pmc: Embed reboot notifier in PMC contextThierry Reding1-7/+10
Instead of relying on a global variable to track the PMC context, embed the reboot notifier into the PMC context so that the latter can be resolved using container_of(). Signed-off-by: Thierry Reding <treding@nvidia.com>
2026-01-18soc/tegra: pmc: Store PMC context in clocksThierry Reding1-20/+26
Clocks exposed by the PMC need to reference the PMC context for register programming. Store a reference to the context in the data structure for each clock to avoid the need for a global variable. Signed-off-by: Thierry Reding <treding@nvidia.com>
2026-01-18soc/tegra: pmc: Pass struct tegra_pmc to tegra_powergate_state()Thierry Reding1-12/+9
By using the generic read_poll_timeout() instead of readx_poll_timeout() we can pass additional parameters, which allows us to pass an additional PMC context structure and avoid relying on a global variable for this. Signed-off-by: Thierry Reding <treding@nvidia.com>
2026-01-18soc/tegra: pmc: Use contextual data instead of global variableThierry Reding1-0/+4
Pass the driver-specific data via the syscore struct and use it in the syscore ops. Signed-off-by: Thierry Reding <treding@nvidia.com>
2026-01-18soc/tegra: pmc: Fix unsafe generic_handle_irq() callPrathamesh Shete1-30/+74
Currently, when resuming from system suspend on Tegra platforms, the following warning is observed: WARNING: CPU: 0 PID: 14459 at kernel/irq/irqdesc.c:666 Call trace: handle_irq_desc+0x20/0x58 (P) tegra186_pmc_wake_syscore_resume+0xe4/0x15c syscore_resume+0x3c/0xb8 suspend_devices_and_enter+0x510/0x540 pm_suspend+0x16c/0x1d8 The warning occurs because generic_handle_irq() is being called from a non-interrupt context which is considered as unsafe. Fix this warning by deferring generic_handle_irq() call to an IRQ work which gets executed in hard IRQ context where generic_handle_irq() can be called safely. When PREEMPT_RT kernels are used, regular IRQ work (initialized with init_irq_work) is deferred to run in per-CPU kthreads in preemptible context rather than hard IRQ context. Hence, use the IRQ_WORK_INIT_HARD variant so that with PREEMPT_RT kernels, the IRQ work is processed in hardirq context instead of being deferred to a thread which is required for calling generic_handle_irq(). On non-PREEMPT_RT kernels, both init_irq_work() and IRQ_WORK_INIT_HARD() execute in IRQ context, so this change has no functional impact for standard kernel configurations. Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com> Signed-off-by: Prathamesh Shete <pshete@nvidia.com> Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> [treding@nvidia.com: miscellaneous cleanups] Signed-off-by: Thierry Reding <treding@nvidia.com>
2026-01-18soc: imx8m: Fix error handling for clk_prepare_enable()Peng Fan1-1/+5
imx8m_soc_prepare() directly returns the result of clk_prepare_enable(), which skips proper cleanup if the clock enable fails. Check the return value of clk_prepare_enable() and release resources if failure. Reported-by: kernel test robot <lkp@intel.com> Reported-by: Dan Carpenter <error27@gmail.com> Closes: https://lore.kernel.org/r/202601111406.ZVV3YaiU-lkp@intel.com/ Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Marco Felsch <m.felsch@pengutronix.de> Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2026-01-17net: txgbe: convert to use .get_rx_ring_countBreno Leitao1-4/+8
Use the newly introduced .get_rx_ring_count ethtool ops callback instead of handling ETHTOOL_GRXRINGS directly in .get_rxnfc(). Signed-off-by: Breno Leitao <leitao@debian.org> Link: https://patch.msgid.link/20260115-grxring_big_v2-v1-9-b3e1b58bced5@debian.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-01-17net: macb: convert to use .get_rx_ring_countBreno Leitao1-3/+8
Use the newly introduced .get_rx_ring_count ethtool ops callback instead of handling ETHTOOL_GRXRINGS directly in .get_rxnfc(). Signed-off-by: Breno Leitao <leitao@debian.org> Link: https://patch.msgid.link/20260115-grxring_big_v2-v1-8-b3e1b58bced5@debian.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-01-17net: cxgb4: convert to use .get_rx_ring_countBreno Leitao1-3/+8
Use the newly introduced .get_rx_ring_count ethtool ops callback instead of handling ETHTOOL_GRXRINGS directly in .get_rxnfc(). Signed-off-by: Breno Leitao <leitao@debian.org> Link: https://patch.msgid.link/20260115-grxring_big_v2-v1-7-b3e1b58bced5@debian.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-01-17net: xgbe: convert to use .get_rx_ring_countBreno Leitao1-12/+3
Use the newly introduced .get_rx_ring_count ethtool ops callback instead of handling ETHTOOL_GRXRINGS directly in .get_rxnfc(). Since ETHTOOL_GRXRINGS was the only command handled by xgbe_get_rxnfc(), remove the function entirely. Signed-off-by: Breno Leitao <leitao@debian.org> Link: https://patch.msgid.link/20260115-grxring_big_v2-v1-6-b3e1b58bced5@debian.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-01-17net: lan743x: convert to use .get_rx_ring_countBreno Leitao1-10/+3
Use the newly introduced .get_rx_ring_count ethtool ops callback instead of handling ETHTOOL_GRXRINGS directly in .get_rxnfc(). Since ETHTOOL_GRXRINGS was the only command handled by lan743x_ethtool_get_rxnfc(), remove the function entirely. Signed-off-by: Breno Leitao <leitao@debian.org> Link: https://patch.msgid.link/20260115-grxring_big_v2-v1-5-b3e1b58bced5@debian.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-01-17net: ena: convert to use .get_rx_ring_countBreno Leitao1-19/+3
Use the newly introduced .get_rx_ring_count ethtool ops callback instead of handling ETHTOOL_GRXRINGS directly in .get_rxnfc(). Since ETHTOOL_GRXRINGS was the only useful command handled by ena_get_rxnfc(), remove the function entirely. Signed-off-by: Breno Leitao <leitao@debian.org> Reviewed-by: Arthur Kiyanovski <akiyano@amazon.com> Link: https://patch.msgid.link/20260115-grxring_big_v2-v1-4-b3e1b58bced5@debian.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-01-17net: mediatek: convert to use .get_rx_ring_countBreno Leitao1-6/+9
Use the newly introduced .get_rx_ring_count ethtool ops callback instead of handling ETHTOOL_GRXRINGS directly in .get_rxnfc(). Signed-off-by: Breno Leitao <leitao@debian.org> Link: https://patch.msgid.link/20260115-grxring_big_v2-v1-3-b3e1b58bced5@debian.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-01-17net: tsnep: convert to use .get_rx_ring_countBreno Leitao1-3/+8
Use the newly introduced .get_rx_ring_count ethtool ops callback instead of handling ETHTOOL_GRXRINGS directly in .get_rxnfc(). Signed-off-by: Breno Leitao <leitao@debian.org> Link: https://patch.msgid.link/20260115-grxring_big_v2-v1-2-b3e1b58bced5@debian.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-01-17Revert "nfc/nci: Add the inconsistency check between the input data length ↵Thadeu Lima de Souza Cascardo1-4/+0
and count" This reverts commit 068648aab72c9ba7b0597354ef4d81ffaac7b979. NFC packets may have NUL-bytes. Checking for string length is not a correct assumption here. As long as there is a check for the length copied from copy_from_user, all should be fine. The fix only prevented the syzbot reproducer from triggering the bug because the packet is not enqueued anymore and the code that triggers the bug is not exercised. The fix even broke testing/selftests/nci/nci_dev, making all tests there fail. After the revert, 6 out of 8 tests pass. Fixes: 068648aab72c ("nfc/nci: Add the inconsistency check between the input data length and count") Cc: stable@vger.kernel.org Signed-off-by: Thadeu Lima de Souza Cascardo <cascardo@igalia.com> Link: https://patch.msgid.link/20260113202458.449455-1-cascardo@igalia.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-01-17net: sfp: add potron quirk to the H-COM SPP425H-GAB4 SFP+ StickHamza Mahfooz1-0/+2
This is another one of those XGSPON ONU sticks that's using the X-ONU-SFPP internally, thus it also requires the potron quirk to avoid tx faults. So, add an entry for it in sfp_quirks[]. Cc: stable@vger.kernel.org Signed-off-by: Hamza Mahfooz <someguy@effective-light.com> Link: https://patch.msgid.link/20260113232957.609642-1-someguy@effective-light.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-01-17veth: fix data race in veth_get_ethtool_statsDavid Yang1-2/+6
In veth_get_ethtool_stats(), some statistics protected by u64_stats_sync, are read and accumulated in ignorance of possible u64_stats_fetch_retry() events. These statistics, peer_tq_xdp_xmit and peer_tq_xdp_xmit_err, are already accumulated by veth_xdp_xmit(). Fix this by reading them into a temporary buffer first. Fixes: 5fe6e56776ba ("veth: rely on peer veth_rq for ndo_xdp_xmit accounting") Signed-off-by: David Yang <mmyangfl@gmail.com> Link: https://patch.msgid.link/20260114122450.227982-1-mmyangfl@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-01-17net: phy: realtek: simplify bogus paged operationsDaniel Golle1-11/+8
Only registers 0x10~0x17 are affected by the value in the page selection register 0x1f. Hence there is no point in using paged operations when accessing any other registers. Simplify the driver by using the normal phy_read and phy_write operations for registers which are anyway not affected by paging. Signed-off-by: Daniel Golle <daniel@makrotopia.org> Link: https://patch.msgid.link/0c5cbb66ce3e72a011d76f8c3d61ebcac44483bb.1768275364.git.daniel@makrotopia.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-01-17net: phy: realtek: demystify PHYSR register locationDaniel Golle1-13/+13
Turns out that register address RTL_VND2_PHYSR (0xa434) maps to Clause-22 register MII_RESV2. Use that to get rid of yet another magic number, and rename access macros accordingly. Signed-off-by: Daniel Golle <daniel@makrotopia.org> Link: https://patch.msgid.link/6ed246e0aa3ca8038d2fa432d51518959fb89b6b.1768275364.git.daniel@makrotopia.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-01-17net: phy: realtek: reunify C22 and C45 driversDaniel Golle1-56/+16
Reunify the split C22/C45 drivers for the RTL8221B-VB-CG 2.5Gbps and RTL8221B-VM-CG 2.5Gbps PHYs back into a single driver. This is possible now by using all the driver operations previously used by the C45 driver, as transparent access to all MMDs including MDIO_MMD_VEND2 is now possible also over Clause-22 MDIO. The unified driver will still only use Clause-45 access on any Clause-45 capable busses while still working fine on Clause-22 busses. Signed-off-by: Daniel Golle <daniel@makrotopia.org> Link: https://patch.msgid.link/bffcb85fdc20e07056976962d3caaa1be5d0ddb0.1768275364.git.daniel@makrotopia.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-01-17net: phy: realtek: simplify C22 reg access via MDIO_MMD_VEND2Daniel Golle1-0/+11
RealTek 2.5GE PHYs have all standard Clause-22 registers mapped also inside MDIO_MMD_VEND2 at offset 0xa400. This is used mainly in case the PHY is connected to a Clause-45-only bus. The RTL8221B is frequently used in copper SFP module which uses the RollBall MDIO-over-I2C method which *only* supports Clause-45, for example. In order to support using the PHY on Clause-45-only busses, the PHY driver has previously been split into a C22-only and C45-only instances, creating quite a bit of redundancy and confusion. In preparation of reunifying the two driver instances, add support for translating MDIO_MMD_VEND2 registers 0xa400 to 0xa43c back to Clause-22 registers 0 to 30 in case the PHY is accessed on a Clause-22 bus. Signed-off-by: Daniel Golle <daniel@makrotopia.org> Link: https://patch.msgid.link/fd49d86bd0445b76269fd3ea456c709c2066683f.1768275364.git.daniel@makrotopia.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-01-17net: phy: realtek: support interrupt also for C22 variantsDaniel Golle1-0/+4
Now that access to MDIO_MMD_VEND2 works transparently also in Clause-22 mode, add interrupt support also for the C22 variants of the RTL8221B-VB-CG and RTL8221B-VM-CG. This results in the C22 and C45 driver instances now having all the same features implemented. Signed-off-by: Daniel Golle <daniel@makrotopia.org> Link: https://patch.msgid.link/7620084b1de01580edc2d0e1b9548507fb4643a8.1768275364.git.daniel@makrotopia.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-01-17net: stmmac: fix dwmac4 transmit performance regressionRussell King (Oracle)2-7/+8
dwmac4's transmit performance dropped by a factor of four due to an incorrect assumption about which definitions are for what. This highlights the need for sane register macros. Commit 8409495bf6c9 ("net: stmmac: cores: remove many xxx_SHIFT definitions") changed the way the txpbl value is merged into the register: value = readl(ioaddr + DMA_CHAN_TX_CONTROL(dwmac4_addrs, chan)); - value = value | (txpbl << DMA_BUS_MODE_PBL_SHIFT); + value = value | FIELD_PREP(DMA_BUS_MODE_PBL, txpbl); With the following in the header file: #define DMA_BUS_MODE_PBL BIT(16) -#define DMA_BUS_MODE_PBL_SHIFT 16 The assumption here was that DMA_BUS_MODE_PBL was the mask for DMA_BUS_MODE_PBL_SHIFT, but this turns out not to be the case. The field is actually six bits wide, buts 21:16, and is called TXPBL. What's even more confusing is, there turns out to be a PBLX8 single bit in the DMA_CHAN_CONTROL register (0x1100 for channel 0), and DMA_BUS_MODE_PBL seems to be used for that. However, this bit et.al. was listed under a comment "/* DMA SYS Bus Mode bitmap */" which is for register 0x1004. Fix this up by adding an appropriately named field definition under the DMA_CHAN_TX_CONTROL() register address definition. Move the RPBL mask definition under DMA_CHAN_RX_CONTROL(), correctly renaming it as well. Also move the PBL bit definition under DMA_CHAN_CONTROL(), correctly renaming it. This removes confusion over the PBL fields. Fixes: 8409495bf6c9 ("net: stmmac: cores: remove many xxx_SHIFT definitions") Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Bisected-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Link: https://lore.kernel.org/51859704-57fd-4913-b09d-9ac58a57f185@bootlin.com Tested-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Link: https://patch.msgid.link/E1vgY1k-00000003vOC-0Z1H@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-01-17amd-xgbe: avoid misleading per-packet error logRaju Rangoju1-4/+1
On the receive path, packet can be damaged because of buffer overflow in Rx FIFO. Avoid misleading per-packet error log when packet->errors is set, this can flood the log. Instead, rely on the standard rtnl_link_stats64 stats. Fixes: c5aa9e3b8156 ("amd-xgbe: Initial AMD 10GbE platform driver") Signed-off-by: Raju Rangoju <Raju.Rangoju@amd.com> Link: https://patch.msgid.link/20260114163037.2062606-1-Raju.Rangoju@amd.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-01-17net: ethernet: ti: cpsw_ale: Remove obsolete macrosStefan Wiehler1-5/+0
- ALE_VERSION_MAJOR/MINOR are no longer used following the transition to regmaps in commit bbfc7e2b9ebe ("net: ethernet: ti: cpsw_ale: use regfields for ALE registers") - ALE_VERSION_IR3 is unused since entry mask bits are no longer hardcoded with commit b5d31f294027 ("net: ethernet: ti: ale: optimize ale entry mask bits configuartion") - ALE_VERSION_IR4 has never been used since its introduction in commit ca47130a744b ("net: netcp: ale: update to support unknown vlan controls for NU switch") Signed-off-by: Stefan Wiehler <stefan.wiehler@nokia.com> Link: https://patch.msgid.link/20260114144425.3973272-1-stefan.wiehler@nokia.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-01-17octeontx2: Fix otx2_dma_map_page() error return codeThomas Fourier1-6/+1
0 is a valid DMA address [1] so using it as the error value can lead to errors. The error value of dma_map_XXX() functions is DMA_MAPPING_ERROR which is ~0. The callers of otx2_dma_map_page() use dma_mapping_error() to test the return value of otx2_dma_map_page(). This means that they would not detect an error in otx2_dma_map_page(). Make otx2_dma_map_page() return the raw value of dma_map_page_attrs(). [1] https://lore.kernel.org/all/f977f68b-cec5-4ab7-b4bd-2cf6aca46267@intel.com Fixes: caa2da34fd25 ("octeontx2-pf: Initialize and config queues") Cc: <stable@vger.kernel.org> Signed-off-by: Thomas Fourier <fourier.thomas@gmail.com> Link: https://patch.msgid.link/20260114123107.42387-2-fourier.thomas@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-01-17net: usb: sr9700: remove code to drive nonexistent MIIEthan Nelson-Moore2-125/+56
This device does not have a MII, even though the driver contains code to drive one (because it originated as a copy of the dm9601 driver). It also only supports 10Mbps half-duplex operation (the DM9601 registers to set the speed/duplex mode are read-only). Remove all MII-related code and implement sr9700_get_link_ksettings which returns hardcoded correct information for the link speed and duplex mode. Also add announcement of the link status like many other Ethernet drivers have. Signed-off-by: Ethan Nelson-Moore <enelsonmoore@gmail.com> Link: https://patch.msgid.link/20260113040649.54248-1-enelsonmoore@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-01-17net: pcs: rzn1-miic: Add PHY_LINK active-level configuration supportLad Prabhakar1-3/+102
Add support to configure the active level of MIIC PHY_LINK status signals on a per-converter basis using a DT property. MIIC provides dedicated PHY_LINK signals that indicate EtherPHY link-up and link-down status in hardware. These signals are required regardless of whether GMAC or ETHSW is used. With GMAC, link state is retrieved via MDC/MDIO and handled in software, while ETHSW relies on PHY_LINK pins for both CPU-assisted operation and switch-only data paths that do not involve the host. Hardware PHY_LINK signals are also critical for fast reaction to link-down events, for example when running redundancy protocols such as Device Level Ring (DLR), where rapid detection of cable faults is required to switch to an alternate path without software latency. Parse the requested polarity from DT, accumulate the configuration during probing, and apply it to the MIIC_PHY_LINK register once hardware initialization is complete, when the registers can be safely modified. Handle SoC-specific bit layout differences between RZ/N1 and RZ/T2H/N2H within the driver. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://patch.msgid.link/20260112173555.1166714-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-01-17mctp i2c: initialise event handler read bytesMatt Johnston1-0/+3
Set a 0xff value for i2c reads of an mctp-i2c device. Otherwise reads will return "val" from the i2c bus driver. For i2c-aspeed and i2c-npcm7xx that is a stack uninitialised u8. Tested with "i2ctransfer -y 1 r10@0x34" where 0x34 is a mctp-i2c instance, now it returns all 0xff. Fixes: f5b8abf9fc3d ("mctp i2c: MCTP I2C binding driver") Signed-off-by: Matt Johnston <matt@codeconstruct.com.au> Link: https://patch.msgid.link/20260113-mctp-read-fix-v1-1-70c4b59c741c@codeconstruct.com.au Signed-off-by: Jakub Kicinski <kuba@kernel.org>