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2025-12-08drm/amdgpu: Init single mes instance if xcc_mask is unsetHawking Zhang1-2/+3
Configure a single mes instance if the xcc_mask remains uninitialized. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Jack Xiao <Jack.Xiao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amdgpu: Setup MTYPEs for GFX 12.1.0Mukul Joshi2-3/+74
For GFX 12.1.0, setup correct MTYPE for a BO depending on its current location relative to the mapping GPU. Signed-off-by: Mukul Joshi <mukul.joshi@amd.com> Reviewed-by: Alex Sierra <alex.sierra@amd.com> Reviewed-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amdgpu: update sh mem base offsets for gfx 12.1Alex Sierra1-4/+4
Signed-off-by: Alex Sierra <alex.sierra@amd.com> Reviewed-by: Philip Yang <Philip.Yang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/ras: Reduce stack usage in ras_umc_handle_bad_pages()Srinivasan Shanmugam1-8/+21
ras_umc_handle_bad_pages() function used a large local array: struct eeprom_umc_record records[MAX_ECC_NUM_PER_RETIREMENT]; Move this array off the stack by allocating it with kcalloc() and freeing it before return. This reduces the stack frame size of ras_umc_handle_bad_pages() and avoids the frame size warning. Fixes the below: drivers/gpu/drm/amd/amdgpu/../ras/rascore/ras_umc.c:498:5: warning: stack frame size (1208) exceeds limit (1024) in 'ras_umc_handle_bad_pages' [-Wframe-larger-than] v2: Removed the duplicate ras_umc_get_new_records() invocation. (Lijo) Cc: Tao Zhou <tao.zhou1@amd.com> Cc: Hawking Zhang <Hawking.Zhang@amd.com> Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amdgpu: Fix SHMEM alignment mode for GFX 12.1.0Mukul Joshi3-2/+8
Alignment mode in SHMEM config register is only a single bit value on GFX 12.1.0 instead of 2 bits in previous asics. Add a new enum and use the correct value of SHMEM alignment mode when programming the SHMEM config register. Signed-off-by: Mukul Joshi <mukul.joshi@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/display: shrink struct membersRosen Penev2-10/+5
On a 32-bit ARM system, the audio_decoder struct ends up being too large for dp_retrain_link_dp_test. link_dp_cts.c:157:1: error: the frame size of 1328 bytes is larger than 1280 bytes [-Werror=frame-larger-than=] This is mitigated by shrinking the members of the struct and avoids having to deal with dynamic allocation. feed_back_divider is assigned but otherwise unused. Remove both. pixel_repetition looks like it should be a bool since it's only ever assigned to 1. But there are checks for 2 and 4. Reduce to uint8_t. Remove ss_percentage_divider. Unused. Shrink refresh_rate as it gets assigned to at most a 3 digit integer value. Signed-off-by: Rosen Penev <rosenp@gmail.com> Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amdkfd: Export the cwsr_size and ctl_stack_size to userspaceMario Limonciello1-0/+4
This is important for userspace to avoid hardcoding VGPR size. Reviewed-by: Kent Russell <kent.russell@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/display: Promote DC to 3.2.362Taimur Hassan1-1/+1
This version brings along the following updates: - Defer transitions from minimal state to final state - Remove periodic detection callbacks from dcn35+ - Fixes for S0i3 exit - Refactor dml_core_mode_support to reduce stack frame - Add additional info from DML for DMU Signed-off-by: Taimur Hassan <Syed.Hassan@amd.com> Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com> Acked-by: Tom Chung <chiahsuan.chung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/display: Additional info from DML for DMUNevenko Stupar2-1/+3
[WHAT] Add additional info from DML for DMU when applicable on future platforms. Reviewed-by: Alvin Lee <alvin.lee2@amd.com> Signed-off-by: Nevenko Stupar <Nevenko.Stupar@amd.com> Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/display: Refactor dml_core_mode_support to reduce stack frameAlex Hung1-63/+71
[WHAT] When compiling Linux kernel with clang, the following warning / error messages pops up: drivers/gpu/drm/amd/amdgpu/../dal-dev/dc/dml2_0/display_mode_core.c:6853:12: error: stack frame size (2120) exceeds limit (2056) in 'dml_core_mode_support' [-Werror,-Wframe-larger-than] 6853 | dml_bool_t dml_core_mode_support(struct display_mode_lib_st *mode_lib) [HOW] Refactoring CalculateVMRowAndSwath_params assignments to a new function helps reduce the stack frame size in dml_core_mode_support. Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/4733 Reviewed-by: Austin Zheng <austin.zheng@amd.com> Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/display: Fixes for S0i3 exitOvidiu Bunea2-1/+6
[why & how] Add debug flag "ignore_pg" to dcn32 PG functions. Update default z10 support status. Temp disable RFB features for ASIC. Remove legacy code path. Reviewed-by: Charlene Liu <charlene.liu@amd.com> Signed-off-by: Ovidiu Bunea <ovidiu.bunea@amd.com> Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/display: Remove periodic detection callbacks from dcn35+Dillon Varone1-2/+0
[WHY&HOW] These will not be needed going forward as DMU will communicate to the driver when detection may be needed after a power saving event. Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Dillon Varone <Dillon.Varone@amd.com> Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/display: Defer transitions from minimal state to final stateJoshua Aberback2-70/+137
[Why] In non-seamless pipe transitions, it can take several frames to process a single flip. One of the reasons is the 2-step transition implementation where first the minimal transition state is applied, then the final state is applied, all within the same flip. This delay is noticeable to the user in some video playback scenarios, which makes for a bad user experience. [How] - in applicable non-seamless cases, complete the flip with the minimal state applied, start a counter, and create all new contexts as minimal - if another pipe transition occurs while counting, reset the counter - when the counter finishes, promote the current flip to a full update and restore creation of optimized contexts - when creating minimal states from new context, apply stream updates Reviewed-by: Aric Cyr <aric.cyr@amd.com> Signed-off-by: Joshua Aberback <joshua.aberback@amd.com> Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amdgpu: don't attach the tlb fence for SIAlex Deucher1-1/+3
SI hardware doesn't support pasids, user mode queues, or KIQ/MES so there is no need for this. Doing so results in a segfault as these callbacks are non-existent for SI. Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/4744 Fixes: f3854e04b708 ("drm/amdgpu: attach tlb fence to the PTs update") Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/display: Use GFP_ATOMIC in dc_create_plane_state()Alex Deucher1-1/+1
This can get called from an atomic context. Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/4470 Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amdkfd: Trap handler support for expert scheduling modeJay Cornwall2-26/+73
The trap may be entered with dependency checking disabled. Wait for dependency counters and save/restore scheduling mode. v2: Use ttmp1 instead of ttmp11. ttmp11 is not zero-initialized. While the trap handler does zero this field before use, a user-mode second-level trap handler could not rely on this being zero when using an older kernel mode driver. v3: Use ttmp11 primarily but copy to ttmp1 before jumping to the second level trap handler. ttmp1 is inspectable by a debugger. Unexpected bits in the unused space may regress existing software. Signed-off-by: Jay Cornwall <jay.cornwall@amd.com> Reviewed-by: Lancelot Six <lancelot.six@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amdgpu/sdma_v7_1: Add missing inst_mask entry in sdma_v7_1_inst_gfx_resume()Srinivasan Shanmugam1-1/+1
The comment for sdma_v7_1_inst_gfx_resume() did not include the inst_mask parameter, even though the function takes it as an argument. Update the comment to document inst_mask as the mask of SDMA engine instances to be enabled. Fixes the below with gcc W=1: drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c:644 function parameter 'inst_mask' not described in 'sdma_v7_1_inst_gfx_resume' Cc: Likun Gao <Likun.Gao@amd.com> Cc: Le Ma <le.ma@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use common helper for smuv14.0.2 dpmLijo Lazar1-75/+15
Use helper function to print smuv14.0.2 dpm tables to sysfs. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use common helper for smuv13.0.7 dpmLijo Lazar1-83/+15
Use helper function to print smuv13.0.7 dpm tables to sysfs. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use common helper for smuv13.0.6 dpmLijo Lazar1-200/+22
Use helper function to print navi10 dpm tables to sysfs. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use common helper for smuv13.0.0 dpmLijo Lazar1-83/+15
Use helper function to print smuv13.0.0 dpm tables to sysfs. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use common helper for aldebaran dpm tableLijo Lazar1-135/+18
Use helper function to print aldebaran dpm tables to sysfs. Remove unused functions. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use common helper for sienna dpm tableLijo Lazar1-67/+27
Use helper function to print sienna cichlid dpm tables to sysfs. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use common helper for navi10 dpm tableLijo Lazar1-80/+27
Use helper function to print navi10 dpm tables to sysfs. Also, remove FCLK table as it is not supported in navi10. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use common helper for arcturus dpmLijo Lazar1-94/+39
Use the helper function to print DPM clock levels to sysfs. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Add a helper to show dpm tableLijo Lazar2-0/+128
Add a helper function to print clock and pcie dpm levels through sysfs. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use generic pcie dpm table for SMUv14Lijo Lazar2-26/+19
Use smu_pcie_table for SMUv14 SOCs. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use generic pcie dpm table for SMUv13Lijo Lazar4-67/+75
Use smu_pcie_table for SMUv13 SOCs. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use generic pcie dpm table for SMUv11Lijo Lazar3-45/+58
Use smu_pcie_table for SMUv11 SOCs. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Add generic pcie dpm tableLijo Lazar1-0/+9
Add a generic pcie dpm table which contains the number of link clock levels and link clock, pcie gen speed/width corresponding to each level. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use generic dpm table for SMUv14 SOCsLijo Lazar3-126/+90
Use the generic dpm table structure instead of SMUv14 specific table. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use generic dpm table for SMUv13 SOCsLijo Lazar6-307/+253
Use the generic dpm table structure instead of SMUv13 specific table. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08amdkfd: introduce new ioctl AMDKFD_IOC_CREATE_PROCESSZhu Lingshan3-2/+47
This commit implemetns a new ioctl AMDKFD_IOC_CREATE_PROCESS that creates a new secondary kfd_progress on the FD. To keep backward compatibility, userspace programs need to invoke this ioctl explicitly on a FD to create a secondary kfd_process which replacing its primary kfd_process. This commit bumps ioctl minor version. Signed-off-by: Zhu Lingshan <lingshan.zhu@amd.com> Reviewed-by: Felix Kuehling <felix.kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08amdkfd: process debug trap ioctl only on a primary contextZhu Lingshan1-0/+12
Set_debug_trap ioctl should work on a specific kfd_process even when multiple contexts feature is implemented. For consistency, this commit allow set_debug_trap ioctl only work on the primary kfd process of a user space program Signed-off-by: Zhu Lingshan <lingshan.zhu@amd.com> Reviewed-by: Felix Kuehling <felix.kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use generic dpm table for SMUv11 SOCsLijo Lazar5-187/+136
Remove SMUv11 specific DPM table and use the generic dpm table structure. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Add clock table structureLijo Lazar1-0/+22
Add a common clock table structure to represent dpm levels for different clocks. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amdkfd: Use huge page size to check split svm range alignmentXiaogang Chen1-14/+32
When split svm ranges that have been mapped using huge page should use huge page size(2MB) to check split range alignment, not prange->granularity that means migration granularity. Fixes: 7ef6b2d4b7e5 ("drm/amdkfd: remap unaligned svm ranges that have split") Signed-off-by: Xiaogang Chen <xiaogang.chen@amd.com> Reviewed-by: Philip Yang <Philip.Yang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amdgpu: add a helper for processing recoverable GPUVM faultsAlex Deucher6-97/+69
Add a common helper to remove the repeated logic from each gmc module. Suggested-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Deprecate print_clock_levels interfaceLijo Lazar4-74/+5
Use emit_clock_levels instead of print_clock_levels Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use emit_clock_levels in vega20Lijo Lazar1-79/+132
Move to emit_clock_levels from print_clock_levels Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use emit_clock_levels in vega12Lijo Lazar1-17/+35
Move to emit_clock_levels from print_clock_levels Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use emit_clock_levels in vega10Lijo Lazar1-141/+0
Keep only emit_clock_levels, and remove print_clock_levels. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use emit_clock_levels in SMUv10.0Lijo Lazar1-27/+38
Move to emit_clock_levels from print_clock_levels Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use emit_clock_levels in SMUv8.0Lijo Lazar1-11/+18
Move to emit_clock_levels from print_clock_levels Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use emit_clock_levels in SMUv7.0Lijo Lazar1-32/+55
Move to emit_clock_levels from print_clock_levels Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use emit_clk_levels in SMUv14.0.2Lijo Lazar1-11/+10
Move to emit_clk_levels from print_clk_levels Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use emit_clk_levels in SMUv14.0.0Lijo Lazar1-12/+12
Move to emit_clk_levels from print_clk_levels Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use emit_clk_levels in yellow carpLijo Lazar1-13/+12
Move to emit_clk_levels from print_clk_levels Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use emit_clk_levels in SMUv13.0.7Lijo Lazar1-11/+10
Move to emit_clk_levels from print_clk_levels Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/pm: Use emit_clk_levels in SMUv13.0.6Lijo Lazar1-15/+15
Move to emit_clk_levels from print_clk_levels Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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