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2026-02-03dt-bindings: trivial-devices: Add some more undocumented devicesRob Herring (Arm)1-0/+6
Add a few trivial devices which are already in use in Nuvoton and ASpeed DTS files. Link: https://patch.msgid.link/20260105211255.3431856-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2026-02-03of: property: stop creating callback for each pinctrl-N propertyRasmus Villemoes1-18/+14
While not a lot in the grand scheme of things, this eliminates 8*2 pointless function calls for almost every property present in the device tree (the exception are the few properties that were already matched). It also seems to reduce .text by about 1.5K - why gcc decides to inline parse_prop_cells() in every instantiation I don't know. Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Link: https://patch.msgid.link/20251219121811.390988-1-linux@rasmusvillemoes.dk [robh: Drop the commit msg comment that >9 doesn't work as it would] Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2026-02-03of: unittest: fix possible null-pointer dereferences in ↵Tuo Li1-2/+4
of_unittest_property_copy() This function first duplicates p1 and p2 into new, and then checks whether the duplication succeeds. However, if the duplication fails (e.g., kzalloc() returns NULL in __of_prop_dup()), new will be NULL but is still dereferenced in __of_prop_free(). To ensure that the unit test continues to run even when duplication fails, add a NULL check before calling __of_prop_free(). Fixes: 1c5e3d9bf33b ("of: Add a helper to free property struct") Signed-off-by: Tuo Li <islituo@gmail.com> Link: https://patch.msgid.link/20260105071438.156186-1-islituo@gmail.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2026-02-03dt-bindings: interrupt-controller: loongson,pch-pic: Document address-cellsBinbin Zhou1-0/+3
The Loongson PCH interrupt controller can be referenced in interrupt-map properties (e.g. in arch/loongarch/boot/dts/loongson-2k2000.dtsi), thus the nodes should have address-cells property. Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn> Link: https://patch.msgid.link/e531084ee65a695ec08d0f559caec067877fb9a5.1767505859.git.zhoubinbin@loongson.cn Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2026-02-03dt-bindings: interrupt-controller: loongson,eiointc: Document address-cellsBinbin Zhou1-0/+3
The Loongson Extend I/O interrupt controller can be referenced in interrupt-map properties (e.g. in arch/loongarch/boot/dts/loongson-2k0500.dtsi), thus the nodes should have address-cells property. Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn> Link: https://patch.msgid.link/3e903541d37432c88c27272094420b03418a607d.1767505859.git.zhoubinbin@loongson.cn Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2026-02-03dt-bindings: interrupt-controller: loongson,liointc: Document address-cellsBinbin Zhou1-0/+3
The Loongson local I/O interrupt controller can be referenced in interrupt-map properties (e.g. in arch/loongarch/boot/dts/loongson-2k1000.dtsi), thus the nodes should have address-cells property. Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn> Link: https://patch.msgid.link/fb3811b6bc387aa23adfc0aaf9a0a31c2d468e79.1767505859.git.zhoubinbin@loongson.cn Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2026-02-03dt-bindings: power: syscon-poweroff: Allow "reg" propertyRob Herring (Arm)1-1/+7
Similar to "syscon-reset", allow using the standard "reg" property rather than "offset". Link: https://patch.msgid.link/20251216211556.3047726-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2026-02-03dt-bindings: reset: syscon-reboot: Allow both 'reg' and 'offset'Rob Herring (Arm)1-1/+1
For compatibility, it is necessary to support both 'reg' and 'offset' at the same time. Link: https://patch.msgid.link/20251215212648.3320333-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2026-02-03of/platform: Simplify with scoped for each OF child loopKrzysztof Kozlowski1-8/+7
Use scoped for-each loop when iterating over device nodes to make code a bit simpler. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20251231120926.66185-2-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2026-02-03dt-bindings: mediatek: Drop inactive MandyJH LiuKrzysztof Kozlowski2-2/+3
There are no emails from MandyJH Liu, no reviews [1] of these bindings, so clearly no maintenance is happening here. Switch to Mediatek SoC maintainers. Cc: MandyJH Liu <mandyjh.liu@mediatek.com> Link: https://lore.kernel.org/all/?q=f%3Amandyjh.liu%40mediatek.com [1] Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20251219074035.13001-2-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2026-02-03dt-bindings: arm: Drop obsolete brcm,vulcan-soc bindingRob Herring (Arm)2-31/+0
The Cavium ThunderX2 aka Broadcom Vulcan doesn't use DT, but ACPI, so drop the SoC binding. Link: https://patch.msgid.link/20251215213022.3325133-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2026-02-03dt-bindings: net: brcm,amac: Allow "dma-coherent" propertyRob Herring (Arm)1-0/+2
The Broadcom AMAC controller is DMA coherent on some platforms, so allow the dma-coherent property. Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Link: https://patch.msgid.link/20251215212709.3320889-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2026-02-03dt-bindings: raspberrypi,bcm2835-firmware: Add 'power' and gpio-hog nodesRob Herring (Arm)1-0/+8
Add missing child nodes for the RaspberryPi firmware. The firmware implements a power domain provider in a 'power' node. GPIO hog nodes are also already in use. Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Link: https://patch.msgid.link/20251215213513.3331128-2-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2026-02-03dt-bindings: firmware: Convert cznic,turris-mox-rwtm to DT schemaRob Herring (Arm)3-20/+41
Convert the CZ.NIC Turris Mox rWTM firmware binding to DT schema format. Add the "marvell,armada-3700-rwtm-firmware" compatible which was not documented. Link: https://patch.msgid.link/20251215212545.3318816-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2026-02-03of: replace strcmp_suffix() with strends()Bartosz Golaszewski1-13/+2
string.h now provides strends() which fulfills the same role as the locally implemented strcmp_suffix(). Use it in of/property.c. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Link: https://patch.msgid.link/20251217134308.33839-1-bartosz.golaszewski@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2026-02-03dt-bindings: trivial-devices: Add socionext,uniphier-smpctrlRob Herring (Arm)1-0/+2
The "socionext,uniphier-smpctrl" binding is just a "compatible" and "reg" entry, so add it to trivial-devices.yaml. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20251215212532.3318546-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2026-02-03dt-bindings: firmware: xilinx: Add conditional pinctrl schemaRonak Jain1-1/+19
Updates the Device Tree bindings for Xilinx firmware by introducing conditional schema references for the pinctrl node. Previously, the pinctrl node directly referenced xlnx,zynqmp-pinctrl.yaml. However, this patch modifies the schema to conditionally apply the correct pinctrl schema based on the compatible property. Specifically: - If compatible contains "xlnx,zynqmp-pinctrl", reference xlnx,zynqmp-pinctrl.yaml. - If compatible contains "xlnx,versal-pinctrl", reference xlnx,versal-pinctrl.yaml. Additionally, an example entry for "xlnx,versal-pinctrl" has been added under the examples section. Signed-off-by: Ronak Jain <ronak.jain@amd.com> Link: https://patch.msgid.link/20251212100542.2756757-3-ronak.jain@amd.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2026-02-03dt-bindings: firmware: xilinx: Add xlnx,zynqmp-firmware compatibleRonak Jain1-0/+1
The absence of a compatible property caused dt_binding_check to skip the zynqmp_firmware node. To address this, add "xlnx,zynqmp-firmware" to the compatible property in the example section for the zynqmp_firmware node. Signed-off-by: Ronak Jain <ronak.jain@amd.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20251212100542.2756757-2-ronak.jain@amd.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2026-02-03dt-bindings: Remove unused includesRob Herring (Arm)16-1462/+0
Remove includes which are not referenced by either DTS files or drivers. There's a few more which are new, so they are excluded for now. Reviewed-by: Linus Walleij <linusw@kernel.org> Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20251212231203.727227-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2026-02-03dt-bindings: bus: stm32mp25-rifsc: Allow 2 size cellsRob Herring (Arm)1-1/+1
There are users already with 2 size cells, and there's no reason to not support that. Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Link: https://patch.msgid.link/20251215212700.3320634-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2026-02-03dt-bindings: arm: vexpress-config: Update clock and regulator node namesRob Herring (Arm)1-3/+3
The clock and regulator node names were updated to use standard node names, but the binding wasn't updated. Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> Link: https://patch.msgid.link/20251215212914.3323741-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2026-02-03dt-bindings: arm,vexpress-juno: Allow interrupt-map properties in bus nodeRob Herring (Arm)1-0/+6
Allow interrupt-map properties which are already used in the bus node. Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> Link: https://patch.msgid.link/20251215212932.3324144-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2026-02-03MAINTAINERS: Add Makefile.dtb* to DT maintainersRob Herring (Arm)1-0/+1
Since the DT related parts of kbuild are now split out to separate makefiles, list them in the DT maintainer section so they don't fall thru the cracks. Acked-by: Nathan Chancellor <nathan@kernel.org> Acked-by: Nicolas Schier <nsc@kernel.org> Link: https://patch.msgid.link/20251215191421.3137362-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2026-02-03scsi: ufs: core: Use a host-wide tagset in SDB modeBart Van Assche3-8/+2
In single-doorbell (SDB) mode there is only a single request queue. Hence, it doesn't matter whether or not the SCSI host tagset is configured as host-wide. Configure the host tagset as host-wide in SDB mode because this enables a simplification of the hot path. Signed-off-by: Bart Van Assche <bvanassche@acm.org> Reviewed-by: Peter Wang <peter.wang@mediatek.com> Link: https://patch.msgid.link/20260116180800.3085233-1-bvanassche@acm.org Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2026-02-04nouveau/gsp: fix suspend/resume regression on r570 firmwareDave Airlie4-7/+7
The r570 firmware with certain GPUs (at least RTX6000) needs this flag to reflect the suspend vs runtime PM state of the driver. This uses that info to set the correct flags to the firmware. This fixes a regression on RTX6000 and other GPUs since r570 firmware was enabled. Fixes: 53dac0623853 ("drm/nouveau/gsp: add support for 570.144") Cc: <stable@vger.kernel.org> Reviewed-by: Lyude Paul <lyude@redhat.com> Tested-by: Lyude Paul <lyude@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patch.msgid.link/20260203052431.2219998-4-airlied@gmail.com
2026-02-04nouveau: add a third state to the fini handler.Dave Airlie56-84/+139
This is just refactoring to allow the lower layers to distinguish between suspend and runtime suspend. GSP 570 needs to set a flag with the GPU is going into GCOFF, this flag taken from the opengpu driver is set whenever runtime suspend is enterning GCOFF but not for normal suspend paths. This just refactors the code, a subsequent patch use the information. Fixes: 53dac0623853 ("drm/nouveau/gsp: add support for 570.144") Cc: <stable@vger.kernel.org> Reviewed-by: Lyude Paul <lyude@redhat.com> Tested-by: Lyude Paul <lyude@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patch.msgid.link/20260203052431.2219998-3-airlied@gmail.com
2026-02-04nouveau/gsp: use rpc sequence numbers properly.Dave Airlie4-3/+15
There are two layers of sequence numbers, one at the msg level and one at the rpc level. 570 firmware started asserting on the sequence numbers being in the right order, and we would see nocat records with asserts in them. Add the rpc level sequence number support. Fixes: 53dac0623853 ("drm/nouveau/gsp: add support for 570.144") Cc: <stable@vger.kernel.org> Signed-off-by: Dave Airlie <airlied@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com> Tested-by: Lyude Paul <lyude@redhat.com> Link: https://patch.msgid.link/20260203052431.2219998-2-airlied@gmail.com
2026-02-03Merge branch 'net-stmmac-rk-cleanups-v3-mode-and-speed-for-most'Jakub Kicinski1-501/+347
Russell King says: ==================== net: stmmac: rk: cleanups v3: mode and speed for most Third installment in the rk cleanups, this converts the interface mode and speed configuration for most RK SoCs. ==================== Link: https://patch.msgid.link/aYB2cKRu3DQh6yXK@shell.armlinux.org.uk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-02-03net: stmmac: rk: convert px30Russell King (Oracle)1-34/+4
Use rk_set_clk_mac_speed() rather than px30 specific function for configuring RMII clock. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Link: https://patch.msgid.link/E1vmqnR-00000007VDE-2fM1@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-02-03net: stmmac: rk: remove need for ->set_speed() methodRussell King (Oracle)1-125/+29
As we can detect whether the SoC provides the parameters necessary for rk_set_reg_speed(), we don't need to have explicit calls to this. Instead, we can move the contents of this function to rk_set_clk_tx_rate(). This remsoves all the .set_speed() implementations that merely go on to invoke rk_set_reg_speed(). Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Link: https://patch.msgid.link/E1vmqnM-00000007VD8-1xWo@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-02-03net: stmmac: rk: use rk_encode_wm16() for RMII clockRussell King (Oracle)1-158/+33
The RMII clock is a single bit, which is set for 100M and clear for 10M. Move this out of struct rk_reg_speed_data (which gets rid of this structure) into the struct rk_clock_fields as the bitmask for this bit. This gets rid of the per-SoC variability in the calls to rk_set_reg_speed(). Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Link: https://patch.msgid.link/E1vmqnH-00000007VCz-1WmP@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-02-03net: stmmac: rk: use rk_encode_wm16() for RMII speedRussell King (Oracle)1-38/+31
The RMII speed configuration is encoded as a single bit, which is set for 100M and clean for 10M. Provide the bitfield definition in struct rk_clock_fields, moving it out of struct rk_reg_speed_data's rmii_10 and rmii_100 initialisers. Update rk_set_reg_speed() to handle the new definition location of this bit. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Link: https://patch.msgid.link/E1vmqnC-00000007VCt-0oRg@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-02-03net: stmmac: rk: use rk_encode_wm16() for RGMII clocksRussell King (Oracle)1-64/+36
As all of the RGMII clock selection bitfields (gmii_clk_sel) use the same encoding, parameterise this by providing the bitfield mask in the BSP private data. This is the last user of GRF_FIELD_CONST(), so remove that definition as well. One additional change is for RK3328 - as only gmac2io supports RGMII, only initialise the mask for this instance. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Link: https://patch.msgid.link/E1vmqn7-00000007VCn-0OZA@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-02-03net: stmmac: rk: remove rk3528 RMII clock initialisationRussell King (Oracle)1-2/+1
There is no need to pre-initialise the rk3528 RMII clock when selecting RMII mode on gmac0. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Link: https://patch.msgid.link/E1vmqn1-00000007VCh-47Sv@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-02-03net: stmmac: rk: convert rk3588 to rk_set_reg_speed()Russell King (Oracle)1-29/+34
Update rk_set_reg_speed() to use either the grf or php_grf regmap depending on the SoC's requirements and convert rk3588, removing its custom code. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Link: https://patch.msgid.link/E1vmqmw-00000007VCb-3glG@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-02-03net: stmmac: rk: move speed GRF register offset to private dataRussell King (Oracle)1-33/+81
Move the speed/clocking related GRF register offset into the driver private data, convert rk_set_reg_speed() to use it and initialise this member either from the corresponding member in struct rk_gmac_ops, or the SoC specific initialisation function. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Link: https://patch.msgid.link/E1vmqmr-00000007VCV-3Cz8@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-02-03net: stmmac: rk: convert rk3588 to mask-based interface mode configRussell King (Oracle)1-10/+35
rk3588 has a quirk compared to the other Rockchip implementations in that the interface mode configuration register is in the php_grf regmap rather than the grf regmap. Add a flag to indicate this, and a separate function to write to the appropriate regmap. This allows rk3588 to be converted. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Link: https://patch.msgid.link/E1vmqmm-00000007VCP-2XZc@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-02-03net: stmmac: rk: convert to mask-based interface mode configurationRussell King (Oracle)1-101/+156
The majority of Rockchip implementations require three common pieces of information to configure the PHY interface mode: - The grf register offset for configuring the GMAC phy_intf_sel field and the RMII mode bit. - The bitfield in this register for the GMAC's phy_intf_sel. - The bit position for RMII mode but clear for RGMII mode. Introduce members for this information into struct rk_priv_data and struct rk_gmac_ops, which will be used to pre-initialise the struct rk_priv_data members. We describe the register contents using bitfields, even for those that are a single bit for consistency. As each register comprises of two halves, where the upper half enables changing the bit state in the lower half, we can describe these bitfields using a 16-bit data type, and provide rk_encode_wm16() to generate the actual register values from the field mask and field value. We are unable to use the FIELD_PREP_WM16() macros for this as these require the field mask to be a constant. Add code to rk_gmac_powerup() to get the phy_intf_sel value, validating that the resulting mode is either RMII or RGMII. No other modes are supported by any of the Rockchip SoCs supported by this driver. If either of the bitfield mask values are populated in struct rk_priv_data, use these to generate the register contents, and write the resulting value to the specified GRF register. Convert many Rockchip implementations to use this new infrastructure. For those where there is a single GMAC instance, it is merely a case of filling in the new members of struct rk_gmac_ops. For those with multiple instances, one or more of these members depends on the GMAC instance, so setup of the members in struct rk_gmac has to be done via the .init method of struct rk_gmac_ops. The corresponding code is removed from the set_to_rgmii() and set_to_rmii() implementations. Since the member name documents the purpose of the field that is being initialised, providing preprocessor macros to define the bitfields is deemed to be less than useful given the massive size of this driver. The existing mechanisms remain behind for those SoCs that can not be converted to this scheme. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> v2: disable clocks on failure Link: https://patch.msgid.link/E1vmqmh-00000007VCJ-1xns@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-02-03fs/tests: exec: drop duplicate bprm_stack_limits test vectorsTitouan Ameline de Cadeville1-6/+0
Remove duplicate entries from the bprm_stack_limits KUnit test vector table. The duplicates do not add coverage and only increase test size. Signed-off-by: Titouan Ameline de Cadeville <titouan.ameline@gmail.com> Fixes: 60371f43e56b ("exec: Add KUnit test for bprm_stack_limits()") Link: https://patch.msgid.link/20260203175950.43710-1-titouan.ameline@gmail.com Signed-off-by: Kees Cook <kees@kernel.org>
2026-02-04i2c: designware: Remove dead code in AMD ISP caseAndy Shevchenko1-12/+1
The I²C bus shared with P-Unit is Intel only thing as far as I know. The AMD ISP driver has no relationship with P-Unit. Remove dead code that seems copied without much thinking. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Pratap Nirujogi <pratap.nirujogi@amd.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Link: https://lore.kernel.org/r/20260129103439.187478-1-andriy.shevchenko@linux.intel.com
2026-02-04i2c: designware: Support of controller with IC_EMPTYFIFO_HOLD_MASTER disabledBenoît Monin4-0/+42
If IC_EMPTYFIFO_HOLD_MASTER_EN parameter is 0, "Stop" and "Repeated Start" bits in command register do not exist, thus it is impossible to send several consecutive write messages in a single hardware batch. The existing implementation worked with such configuration incorrectly: all consecutive write messages are joined into a single message without any Start/Stop or Repeated Start conditions. For example, the following command: i2ctransfer -y 0 w1@0x55 0x00 w1@0x55 0x01 does the same as i2ctransfer -y 0 w2@0x55 0x00 0x01 In i2c_dw_msg_is_valid(), we ensure that we do not have such sequence of messages requiring a RESTART, aborting the transfer on controller that cannot emit them explicitly. This behavior is activated by compatible entries because the state of the IC_EMPTYFIFO_HOLD_MASTER_EN parameter cannot be detected at runtime. The new flag emptyfifo_hold_master reflects the state of the parameter, it is set to true for all controllers except those found in Mobileye SoCs. For now, the controllers in Mobileye SoCs are the only ones known to need the workaround. The behavior of the driver is left unmodified for other controllers. There is another possible problem with this controller configuration: When the CPU is putting commands to the FIFO, this process must not be interrupted because if FIFO buffer gets empty, the controller finishes the I2C transaction and generates STOP condition on the bus. If we continue writing the remainder of the message to the FIFO, the controller will start emitting a new transaction with those data. This turns a single message into multiple I2C transactions. To protect against FIFO underrun, two changes are done: First we flag the interrupt with IRQF_NO_THREAD, to prevent it from running in a thread on PREEMPT-RT kernel. This ensures that we are not interrupted when filling the FIFO as it is very time-senstive. For example, being preempted after writing a single byte in the FIFO with a 1MHz bus gives us only 18µs before an underrun. DMA would allow us to keep the interrupt threaded but it is not available on Mobileye SoC for I2C. Second in i2c_dw_process_transfer(), we abort if a STOP is detected while a read or a write is in progress. This can occur when processing a message larger than the FIFO. In that case the message is processed in parts, and rely on the TX EMPTY interrupt to refill the FIFO when it gets below a threshold. If servicing this interrupt is delayed for too long, it can trigger a FIFO underrun, thus an unwanted STOP. Originally-by: Dmitry Guzman <dmitry.guzman@mobileye.com> Signed-off-by: Benoît Monin <benoit.monin@bootlin.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Link: https://lore.kernel.org/r/20260130-i2c-dw-v6-3-08ca1e9ece07@bootlin.com
2026-02-04i2c: designware: Use runtime PM macro for auto-cleanupBenoît Monin1-9/+9
Simplify runtime PM handling in i2c_dw_xfer_common() by using the pm_runtime_active_auto_try guard. This adds the proper handling for runtime PM resume errors and allows us to get rid of the done and done_nolock labels. Also use the dedicated PM_RUNTIME macros in amd_i2c_dw_xfer_quirk() instead of ACQUIRE()/ACQUIRE_ERR(). Signed-off-by: Benoît Monin <benoit.monin@bootlin.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Link: https://lore.kernel.org/r/20260130-i2c-dw-v6-2-08ca1e9ece07@bootlin.com
2026-02-04i2c: designware: Implement I2C_M_STOP supportBenoît Monin1-39/+93
Add the support of the I2C_M_STOP flag in i2c_msg by splitting i2c_dw_xfer() in two: __i2c_dw_xfer_one_part() for the core transfer logic and i2c_dw_xfer() for handling the high-level transaction management. In detail __i2c_dw_xfer_one_part() starts a transaction and wait for its completion, either with a STOP on the bus or an error. i2c_dw_xfer() loops over the messages to search for the I2C_M_STOP flag and calls __i2c_dw_xfer_one_part() for each part of the messages up to a STOP or the end of the messages array. i2c_dw_xfer() takes care of runtime PM and holds the hardware lock on the bus while calling __i2c_dw_xfer_one_part(), this allows grouping multiple accesses to device that support a STOP in a transaction when done via i2c_dev I2C_RDWR ioctl. Also, now that we have a lookup of the messages in i2c_dw_xfer() prior to each transaction, we use it to make sure the messages are valid for the transaction, via a new function i2c_dw_msg_is_valid(). We check that the target address does not change before starting the transaction instead of aborting the transfer while it is happening, as it was done in i2c_dw_xfer_msg(). The target address can only be changed after an I2C_M_STOP flag, i.e after a STOP on the i2c bus. The I2C_FUNC_PROTOCOL_MANGLING flag is added to the list of functionalities supported by the controller, except for the AMD NAVI i2c controller which uses its own xfer() function and is left untouched. Signed-off-by: Benoît Monin <benoit.monin@bootlin.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Link: https://lore.kernel.org/r/20260130-i2c-dw-v6-1-08ca1e9ece07@bootlin.com
2026-02-03Merge branch 'bpf-avoid-locks-in-bpf_timer-and-bpf_wq'Andrii Nakryiko7-342/+851
Alexei Starovoitov says: ==================== bpf: Avoid locks in bpf_timer and bpf_wq From: Alexei Starovoitov <ast@kernel.org> This series reworks implementation of BPF timer and workqueue APIs to make them usable from any context. Signed-off-by: Alexei Starovoitov <ast@kernel.org> Signed-off-by: Mykyta Yatsenko <yatsenko@meta.com> Changes in v9: - Different approach for patches 1 and 3: - s/EBUSY/ENOENT/ when refcnt==0 to match existing - drop latch, use refcnt and kmalloc_nolock() instead - address race between timer/wq_start and delete_elem, add a test - Link to v8: https://lore.kernel.org/bpf/20260127-timer_nolock-v8-0-5a29a9571059@meta.com/ Changes in v8: - Return -EBUSY in bpf_async_read_op() if last_seq is failed to be set - In bpf_async_cancel_and_free() drop bpf_async_cb ref after calling bpf_async_process() - Link to v7: https://lore.kernel.org/r/20260122-timer_nolock-v7-0-04a45c55c2e2@meta.com Changes in v7: - Addressed Andrii's review points from the previous version - nothing very significang. - Added NMI stress tests for bpf_timer - hit few verifier failing checks and removed them. - Address sparse warning in the bpf_async_update_prog_callback() - Link to v6: https://lore.kernel.org/r/20260120-timer_nolock-v6-0-670ffdd787b4@meta.com Changes in v6: - Reworked destruction and refcnt use: - On cancel_and_free() set last_seq to BPF_ASYNC_DESTROY value, drop map's reference - In irq work callback, atomically switch DESTROY to DESTROYED, cancel timer/wq - Free bpf_async_cb on refcnt going to 0. - Link to v5: https://lore.kernel.org/r/20260115-timer_nolock-v5-0-15e3aef2703d@meta.com Changes in v5: - Extracted lock-free algorithm for updating cb->prog and cb->callback_fn into a function bpf_async_update_prog_callback(), added a new commit and introduces this function and uses it in __bpf_async_set_callback(), bpf_timer_cancel() and bpf_async_cancel_and_free(). This allows to move the change into the separate commit without breaking correctness. - Handle NULL prog in bpf_async_update_prog_callback(). - Link to v4: https://lore.kernel.org/r/20260114-timer_nolock-v4-0-fa6355f51fa7@meta.com Changes in v4: - Handle irq_work_queue failures in both schedule and cancel_and_free paths: introduced bpf_async_refcnt_dec_cleanup() that decrements refcnt and makes sure if last reference is put, there is at least one irq_work scheduled to execute final cleanup. - Additional refcnt inc/dec in set_callback() + rcu lock to make sure cleanup is not running at the same time as set_callback(). - Added READ_ONCE where it was needed. - Squash 'bpf: Refactor __bpf_async_set_callback()' commit into 'bpf: Add lock-free cell for NMI-safe async operations' - Removed mpmc_cell, use seqcount_latch_t instead. - Link to v3: https://lore.kernel.org/r/20260107-timer_nolock-v3-0-740d3ec3e5f9@meta.com Changes in v3: - Major rework - Introduce mpmc_cell, allowing concurrent writes and reads - Implement irq_work deferring - Adding selftests - Introduces bpf_timer_cancel_async kfunc - Link to v2: https://lore.kernel.org/r/20251105-timer_nolock-v2-0-32698db08bfa@meta.com Changes in v2: - Move refcnt initialization and put (from cancel_and_free()) from patch 5 into the patch 4, so that patch 4 has more clear and full implementation and use of refcnt - Link to v1: https://lore.kernel.org/r/20251031-timer_nolock-v1-0-b064ae403bfb@meta.com ==================== Link: https://patch.msgid.link/20260201025403.66625-1-alexei.starovoitov@gmail.com Signed-off-by: Andrii Nakryiko <andrii@kernel.org>
2026-02-03selftests/bpf: Add a test to stress bpf_timer_start and map_delete raceAlexei Starovoitov2-0/+203
Add a test to stress bpf_timer_start and map_delete race Signed-off-by: Alexei Starovoitov <ast@kernel.org> Signed-off-by: Andrii Nakryiko <andrii@kernel.org> Link: https://lore.kernel.org/bpf/20260201025403.66625-10-alexei.starovoitov@gmail.com
2026-02-03selftests/bpf: Removed obsolete testsMykyta Yatsenko1-111/+0
Now bpf_timer can be used in tracepoints, so these tests are no longer relevant. Signed-off-by: Mykyta Yatsenko <yatsenko@meta.com> Signed-off-by: Alexei Starovoitov <ast@kernel.org> Signed-off-by: Andrii Nakryiko <andrii@kernel.org> Link: https://lore.kernel.org/bpf/20260201025403.66625-9-alexei.starovoitov@gmail.com
2026-02-03selftests/bpf: Add timer stress test in NMI contextMykyta Yatsenko2-12/+231
Add stress tests for BPF timers that run in NMI context using perf_event programs attached to PERF_COUNT_HW_CPU_CYCLES. The tests cover three scenarios: - nmi_race: Tests concurrent timer start and async cancel operations - nmi_update: Tests updating a map element (effectively deleting and inserting new for array map) from within a timer callback - nmi_cancel: Tests timer self-cancellation attempt. A common test_common() helper is used to share timer setup logic across all test modes. The tests spawn multiple threads in a child process to generate perf events, which trigger the BPF programs in NMI context. Hit counters verify that the NMI code paths were actually exercised. Signed-off-by: Mykyta Yatsenko <yatsenko@meta.com> Signed-off-by: Alexei Starovoitov <ast@kernel.org> Signed-off-by: Andrii Nakryiko <andrii@kernel.org> Link: https://lore.kernel.org/bpf/20260201025403.66625-8-alexei.starovoitov@gmail.com
2026-02-03selftests/bpf: Verify bpf_timer_cancel_async worksMykyta Yatsenko2-0/+48
Add test that verifies that bpf_timer_cancel_async works: can cancel callback successfully. Signed-off-by: Mykyta Yatsenko <yatsenko@meta.com> Signed-off-by: Alexei Starovoitov <ast@kernel.org> Signed-off-by: Andrii Nakryiko <andrii@kernel.org> Link: https://lore.kernel.org/bpf/20260201025403.66625-7-alexei.starovoitov@gmail.com
2026-02-03selftests/bpf: Add stress test for timer async cancelMykyta Yatsenko2-4/+28
Extend BPF timer selftest to run stress test for async cancel. Signed-off-by: Mykyta Yatsenko <yatsenko@meta.com> Signed-off-by: Alexei Starovoitov <ast@kernel.org> Signed-off-by: Andrii Nakryiko <andrii@kernel.org> Link: https://lore.kernel.org/bpf/20260201025403.66625-6-alexei.starovoitov@gmail.com
2026-02-03selftests/bpf: Refactor timer selftestsMykyta Yatsenko1-19/+36
Refactor timer selftests, extracting stress test into a separate test. This makes it easier to debug test failures and allows to extend. Signed-off-by: Mykyta Yatsenko <yatsenko@meta.com> Signed-off-by: Alexei Starovoitov <ast@kernel.org> Signed-off-by: Andrii Nakryiko <andrii@kernel.org> Link: https://lore.kernel.org/bpf/20260201025403.66625-5-alexei.starovoitov@gmail.com