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2026-02-03net: stmmac: rk: move speed GRF register offset to private dataRussell King (Oracle)1-33/+81
Move the speed/clocking related GRF register offset into the driver private data, convert rk_set_reg_speed() to use it and initialise this member either from the corresponding member in struct rk_gmac_ops, or the SoC specific initialisation function. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Link: https://patch.msgid.link/E1vmqmr-00000007VCV-3Cz8@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-02-03net: stmmac: rk: convert rk3588 to mask-based interface mode configRussell King (Oracle)1-10/+35
rk3588 has a quirk compared to the other Rockchip implementations in that the interface mode configuration register is in the php_grf regmap rather than the grf regmap. Add a flag to indicate this, and a separate function to write to the appropriate regmap. This allows rk3588 to be converted. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Link: https://patch.msgid.link/E1vmqmm-00000007VCP-2XZc@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-02-03net: stmmac: rk: convert to mask-based interface mode configurationRussell King (Oracle)1-101/+156
The majority of Rockchip implementations require three common pieces of information to configure the PHY interface mode: - The grf register offset for configuring the GMAC phy_intf_sel field and the RMII mode bit. - The bitfield in this register for the GMAC's phy_intf_sel. - The bit position for RMII mode but clear for RGMII mode. Introduce members for this information into struct rk_priv_data and struct rk_gmac_ops, which will be used to pre-initialise the struct rk_priv_data members. We describe the register contents using bitfields, even for those that are a single bit for consistency. As each register comprises of two halves, where the upper half enables changing the bit state in the lower half, we can describe these bitfields using a 16-bit data type, and provide rk_encode_wm16() to generate the actual register values from the field mask and field value. We are unable to use the FIELD_PREP_WM16() macros for this as these require the field mask to be a constant. Add code to rk_gmac_powerup() to get the phy_intf_sel value, validating that the resulting mode is either RMII or RGMII. No other modes are supported by any of the Rockchip SoCs supported by this driver. If either of the bitfield mask values are populated in struct rk_priv_data, use these to generate the register contents, and write the resulting value to the specified GRF register. Convert many Rockchip implementations to use this new infrastructure. For those where there is a single GMAC instance, it is merely a case of filling in the new members of struct rk_gmac_ops. For those with multiple instances, one or more of these members depends on the GMAC instance, so setup of the members in struct rk_gmac has to be done via the .init method of struct rk_gmac_ops. The corresponding code is removed from the set_to_rgmii() and set_to_rmii() implementations. Since the member name documents the purpose of the field that is being initialised, providing preprocessor macros to define the bitfields is deemed to be less than useful given the massive size of this driver. The existing mechanisms remain behind for those SoCs that can not be converted to this scheme. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> v2: disable clocks on failure Link: https://patch.msgid.link/E1vmqmh-00000007VCJ-1xns@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-02-03fs/tests: exec: drop duplicate bprm_stack_limits test vectorsTitouan Ameline de Cadeville1-6/+0
Remove duplicate entries from the bprm_stack_limits KUnit test vector table. The duplicates do not add coverage and only increase test size. Signed-off-by: Titouan Ameline de Cadeville <titouan.ameline@gmail.com> Fixes: 60371f43e56b ("exec: Add KUnit test for bprm_stack_limits()") Link: https://patch.msgid.link/20260203175950.43710-1-titouan.ameline@gmail.com Signed-off-by: Kees Cook <kees@kernel.org>
2026-02-04i2c: designware: Remove dead code in AMD ISP caseAndy Shevchenko1-12/+1
The I²C bus shared with P-Unit is Intel only thing as far as I know. The AMD ISP driver has no relationship with P-Unit. Remove dead code that seems copied without much thinking. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Pratap Nirujogi <pratap.nirujogi@amd.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Link: https://lore.kernel.org/r/20260129103439.187478-1-andriy.shevchenko@linux.intel.com
2026-02-04i2c: designware: Support of controller with IC_EMPTYFIFO_HOLD_MASTER disabledBenoît Monin4-0/+42
If IC_EMPTYFIFO_HOLD_MASTER_EN parameter is 0, "Stop" and "Repeated Start" bits in command register do not exist, thus it is impossible to send several consecutive write messages in a single hardware batch. The existing implementation worked with such configuration incorrectly: all consecutive write messages are joined into a single message without any Start/Stop or Repeated Start conditions. For example, the following command: i2ctransfer -y 0 w1@0x55 0x00 w1@0x55 0x01 does the same as i2ctransfer -y 0 w2@0x55 0x00 0x01 In i2c_dw_msg_is_valid(), we ensure that we do not have such sequence of messages requiring a RESTART, aborting the transfer on controller that cannot emit them explicitly. This behavior is activated by compatible entries because the state of the IC_EMPTYFIFO_HOLD_MASTER_EN parameter cannot be detected at runtime. The new flag emptyfifo_hold_master reflects the state of the parameter, it is set to true for all controllers except those found in Mobileye SoCs. For now, the controllers in Mobileye SoCs are the only ones known to need the workaround. The behavior of the driver is left unmodified for other controllers. There is another possible problem with this controller configuration: When the CPU is putting commands to the FIFO, this process must not be interrupted because if FIFO buffer gets empty, the controller finishes the I2C transaction and generates STOP condition on the bus. If we continue writing the remainder of the message to the FIFO, the controller will start emitting a new transaction with those data. This turns a single message into multiple I2C transactions. To protect against FIFO underrun, two changes are done: First we flag the interrupt with IRQF_NO_THREAD, to prevent it from running in a thread on PREEMPT-RT kernel. This ensures that we are not interrupted when filling the FIFO as it is very time-senstive. For example, being preempted after writing a single byte in the FIFO with a 1MHz bus gives us only 18µs before an underrun. DMA would allow us to keep the interrupt threaded but it is not available on Mobileye SoC for I2C. Second in i2c_dw_process_transfer(), we abort if a STOP is detected while a read or a write is in progress. This can occur when processing a message larger than the FIFO. In that case the message is processed in parts, and rely on the TX EMPTY interrupt to refill the FIFO when it gets below a threshold. If servicing this interrupt is delayed for too long, it can trigger a FIFO underrun, thus an unwanted STOP. Originally-by: Dmitry Guzman <dmitry.guzman@mobileye.com> Signed-off-by: Benoît Monin <benoit.monin@bootlin.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Link: https://lore.kernel.org/r/20260130-i2c-dw-v6-3-08ca1e9ece07@bootlin.com
2026-02-04i2c: designware: Use runtime PM macro for auto-cleanupBenoît Monin1-9/+9
Simplify runtime PM handling in i2c_dw_xfer_common() by using the pm_runtime_active_auto_try guard. This adds the proper handling for runtime PM resume errors and allows us to get rid of the done and done_nolock labels. Also use the dedicated PM_RUNTIME macros in amd_i2c_dw_xfer_quirk() instead of ACQUIRE()/ACQUIRE_ERR(). Signed-off-by: Benoît Monin <benoit.monin@bootlin.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Link: https://lore.kernel.org/r/20260130-i2c-dw-v6-2-08ca1e9ece07@bootlin.com
2026-02-04i2c: designware: Implement I2C_M_STOP supportBenoît Monin1-39/+93
Add the support of the I2C_M_STOP flag in i2c_msg by splitting i2c_dw_xfer() in two: __i2c_dw_xfer_one_part() for the core transfer logic and i2c_dw_xfer() for handling the high-level transaction management. In detail __i2c_dw_xfer_one_part() starts a transaction and wait for its completion, either with a STOP on the bus or an error. i2c_dw_xfer() loops over the messages to search for the I2C_M_STOP flag and calls __i2c_dw_xfer_one_part() for each part of the messages up to a STOP or the end of the messages array. i2c_dw_xfer() takes care of runtime PM and holds the hardware lock on the bus while calling __i2c_dw_xfer_one_part(), this allows grouping multiple accesses to device that support a STOP in a transaction when done via i2c_dev I2C_RDWR ioctl. Also, now that we have a lookup of the messages in i2c_dw_xfer() prior to each transaction, we use it to make sure the messages are valid for the transaction, via a new function i2c_dw_msg_is_valid(). We check that the target address does not change before starting the transaction instead of aborting the transfer while it is happening, as it was done in i2c_dw_xfer_msg(). The target address can only be changed after an I2C_M_STOP flag, i.e after a STOP on the i2c bus. The I2C_FUNC_PROTOCOL_MANGLING flag is added to the list of functionalities supported by the controller, except for the AMD NAVI i2c controller which uses its own xfer() function and is left untouched. Signed-off-by: Benoît Monin <benoit.monin@bootlin.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Link: https://lore.kernel.org/r/20260130-i2c-dw-v6-1-08ca1e9ece07@bootlin.com
2026-02-03Merge branch 'bpf-avoid-locks-in-bpf_timer-and-bpf_wq'Andrii Nakryiko7-342/+851
Alexei Starovoitov says: ==================== bpf: Avoid locks in bpf_timer and bpf_wq From: Alexei Starovoitov <ast@kernel.org> This series reworks implementation of BPF timer and workqueue APIs to make them usable from any context. Signed-off-by: Alexei Starovoitov <ast@kernel.org> Signed-off-by: Mykyta Yatsenko <yatsenko@meta.com> Changes in v9: - Different approach for patches 1 and 3: - s/EBUSY/ENOENT/ when refcnt==0 to match existing - drop latch, use refcnt and kmalloc_nolock() instead - address race between timer/wq_start and delete_elem, add a test - Link to v8: https://lore.kernel.org/bpf/20260127-timer_nolock-v8-0-5a29a9571059@meta.com/ Changes in v8: - Return -EBUSY in bpf_async_read_op() if last_seq is failed to be set - In bpf_async_cancel_and_free() drop bpf_async_cb ref after calling bpf_async_process() - Link to v7: https://lore.kernel.org/r/20260122-timer_nolock-v7-0-04a45c55c2e2@meta.com Changes in v7: - Addressed Andrii's review points from the previous version - nothing very significang. - Added NMI stress tests for bpf_timer - hit few verifier failing checks and removed them. - Address sparse warning in the bpf_async_update_prog_callback() - Link to v6: https://lore.kernel.org/r/20260120-timer_nolock-v6-0-670ffdd787b4@meta.com Changes in v6: - Reworked destruction and refcnt use: - On cancel_and_free() set last_seq to BPF_ASYNC_DESTROY value, drop map's reference - In irq work callback, atomically switch DESTROY to DESTROYED, cancel timer/wq - Free bpf_async_cb on refcnt going to 0. - Link to v5: https://lore.kernel.org/r/20260115-timer_nolock-v5-0-15e3aef2703d@meta.com Changes in v5: - Extracted lock-free algorithm for updating cb->prog and cb->callback_fn into a function bpf_async_update_prog_callback(), added a new commit and introduces this function and uses it in __bpf_async_set_callback(), bpf_timer_cancel() and bpf_async_cancel_and_free(). This allows to move the change into the separate commit without breaking correctness. - Handle NULL prog in bpf_async_update_prog_callback(). - Link to v4: https://lore.kernel.org/r/20260114-timer_nolock-v4-0-fa6355f51fa7@meta.com Changes in v4: - Handle irq_work_queue failures in both schedule and cancel_and_free paths: introduced bpf_async_refcnt_dec_cleanup() that decrements refcnt and makes sure if last reference is put, there is at least one irq_work scheduled to execute final cleanup. - Additional refcnt inc/dec in set_callback() + rcu lock to make sure cleanup is not running at the same time as set_callback(). - Added READ_ONCE where it was needed. - Squash 'bpf: Refactor __bpf_async_set_callback()' commit into 'bpf: Add lock-free cell for NMI-safe async operations' - Removed mpmc_cell, use seqcount_latch_t instead. - Link to v3: https://lore.kernel.org/r/20260107-timer_nolock-v3-0-740d3ec3e5f9@meta.com Changes in v3: - Major rework - Introduce mpmc_cell, allowing concurrent writes and reads - Implement irq_work deferring - Adding selftests - Introduces bpf_timer_cancel_async kfunc - Link to v2: https://lore.kernel.org/r/20251105-timer_nolock-v2-0-32698db08bfa@meta.com Changes in v2: - Move refcnt initialization and put (from cancel_and_free()) from patch 5 into the patch 4, so that patch 4 has more clear and full implementation and use of refcnt - Link to v1: https://lore.kernel.org/r/20251031-timer_nolock-v1-0-b064ae403bfb@meta.com ==================== Link: https://patch.msgid.link/20260201025403.66625-1-alexei.starovoitov@gmail.com Signed-off-by: Andrii Nakryiko <andrii@kernel.org>
2026-02-03selftests/bpf: Add a test to stress bpf_timer_start and map_delete raceAlexei Starovoitov2-0/+203
Add a test to stress bpf_timer_start and map_delete race Signed-off-by: Alexei Starovoitov <ast@kernel.org> Signed-off-by: Andrii Nakryiko <andrii@kernel.org> Link: https://lore.kernel.org/bpf/20260201025403.66625-10-alexei.starovoitov@gmail.com
2026-02-03selftests/bpf: Removed obsolete testsMykyta Yatsenko1-111/+0
Now bpf_timer can be used in tracepoints, so these tests are no longer relevant. Signed-off-by: Mykyta Yatsenko <yatsenko@meta.com> Signed-off-by: Alexei Starovoitov <ast@kernel.org> Signed-off-by: Andrii Nakryiko <andrii@kernel.org> Link: https://lore.kernel.org/bpf/20260201025403.66625-9-alexei.starovoitov@gmail.com
2026-02-03selftests/bpf: Add timer stress test in NMI contextMykyta Yatsenko2-12/+231
Add stress tests for BPF timers that run in NMI context using perf_event programs attached to PERF_COUNT_HW_CPU_CYCLES. The tests cover three scenarios: - nmi_race: Tests concurrent timer start and async cancel operations - nmi_update: Tests updating a map element (effectively deleting and inserting new for array map) from within a timer callback - nmi_cancel: Tests timer self-cancellation attempt. A common test_common() helper is used to share timer setup logic across all test modes. The tests spawn multiple threads in a child process to generate perf events, which trigger the BPF programs in NMI context. Hit counters verify that the NMI code paths were actually exercised. Signed-off-by: Mykyta Yatsenko <yatsenko@meta.com> Signed-off-by: Alexei Starovoitov <ast@kernel.org> Signed-off-by: Andrii Nakryiko <andrii@kernel.org> Link: https://lore.kernel.org/bpf/20260201025403.66625-8-alexei.starovoitov@gmail.com
2026-02-03selftests/bpf: Verify bpf_timer_cancel_async worksMykyta Yatsenko2-0/+48
Add test that verifies that bpf_timer_cancel_async works: can cancel callback successfully. Signed-off-by: Mykyta Yatsenko <yatsenko@meta.com> Signed-off-by: Alexei Starovoitov <ast@kernel.org> Signed-off-by: Andrii Nakryiko <andrii@kernel.org> Link: https://lore.kernel.org/bpf/20260201025403.66625-7-alexei.starovoitov@gmail.com
2026-02-03selftests/bpf: Add stress test for timer async cancelMykyta Yatsenko2-4/+28
Extend BPF timer selftest to run stress test for async cancel. Signed-off-by: Mykyta Yatsenko <yatsenko@meta.com> Signed-off-by: Alexei Starovoitov <ast@kernel.org> Signed-off-by: Andrii Nakryiko <andrii@kernel.org> Link: https://lore.kernel.org/bpf/20260201025403.66625-6-alexei.starovoitov@gmail.com
2026-02-03selftests/bpf: Refactor timer selftestsMykyta Yatsenko1-19/+36
Refactor timer selftests, extracting stress test into a separate test. This makes it easier to debug test failures and allows to extend. Signed-off-by: Mykyta Yatsenko <yatsenko@meta.com> Signed-off-by: Alexei Starovoitov <ast@kernel.org> Signed-off-by: Andrii Nakryiko <andrii@kernel.org> Link: https://lore.kernel.org/bpf/20260201025403.66625-5-alexei.starovoitov@gmail.com
2026-02-03bpf: Introduce bpf_timer_cancel_async() kfuncAlexei Starovoitov1-0/+48
Introduce bpf_timer_cancel_async() that wraps hrtimer_try_to_cancel() and executes it either synchronously or defers to irq_work. Co-developed-by: Mykyta Yatsenko <yatsenko@meta.com> Signed-off-by: Mykyta Yatsenko <yatsenko@meta.com> Signed-off-by: Alexei Starovoitov <ast@kernel.org> Signed-off-by: Andrii Nakryiko <andrii@kernel.org> Link: https://lore.kernel.org/bpf/20260201025403.66625-4-alexei.starovoitov@gmail.com
2026-02-03bpf: Add verifier support for bpf_timer argument in kfuncsMykyta Yatsenko1-18/+37
Extend the verifier to recognize struct bpf_timer as a valid kfunc argument type. Previously, bpf_timer was only supported in BPF helpers. This prepares for adding timer-related kfuncs in subsequent patches. Signed-off-by: Mykyta Yatsenko <yatsenko@meta.com> Signed-off-by: Alexei Starovoitov <ast@kernel.org> Signed-off-by: Andrii Nakryiko <andrii@kernel.org> Acked-by: Andrii Nakryiko <andrii@kernel.org> Link: https://lore.kernel.org/bpf/20260201025403.66625-3-alexei.starovoitov@gmail.com
2026-02-03bpf: Enable bpf_timer and bpf_wq in any contextAlexei Starovoitov1-183/+225
Refactor bpf_timer and bpf_wq to allow calling them from any context: - add refcnt to bpf_async_cb - map_delete_elem or map_free will drop refcnt to zero via bpf_async_cancel_and_free() - once refcnt is zero timer/wq_start is not allowed to make sure that callback cannot rearm itself - if in_hardirq defer to start/cancel operations to irq_work Co-developed-by: Mykyta Yatsenko <yatsenko@meta.com> Signed-off-by: Mykyta Yatsenko <yatsenko@meta.com> Signed-off-by: Alexei Starovoitov <ast@kernel.org> Signed-off-by: Andrii Nakryiko <andrii@kernel.org> Acked-by: Kumar Kartikeya Dwivedi <memxor@gmail.com> Link: https://lore.kernel.org/bpf/20260201025403.66625-2-alexei.starovoitov@gmail.com
2026-02-04fs/ntfs3: allow explicit boolean acl/prealloc mount optionsKonstantin Komarov1-6/+14
This patch improves mount option parsing by allowing explicit boolean values for acl and prealloc. Previously those options were exposed only as presence/absence flags. Signed-off-by: Konstantin Komarov <almaz.alexandrovich@paragon-software.com>
2026-02-03Merge tag 'v6.19rc8-smb3-client-fixes' of git://git.samba.org/sfrench/cifs-2.6Linus Torvalds2-1/+4
Pull smb client fixes from Steve French: "Two small client memory leak fixes" * tag 'v6.19rc8-smb3-client-fixes' of git://git.samba.org/sfrench/cifs-2.6: smb/client: fix memory leak in SendReceive() smb/client: fix memory leak in smb2_open_file()
2026-02-03scripts/make_fit: Compress dtbs in parallelSimon Glass1-6/+50
When there are 1500 device tree files it takes quite a while to compress them. Do it in parallel. Signed-off-by: Simon Glass <sjg@chromium.org> Link: https://patch.msgid.link/20260106162738.2605574-7-sjg@chromium.org Signed-off-by: Nathan Chancellor <nathan@kernel.org>
2026-02-03scripts/make_fit: Support a few more parallel compressorsSimon Glass1-3/+9
Add support for pbzip2, xz and plzip which can compress in parallel. This speeds up the ramdisk compression. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Nicolas Schier <nsc@kernel.org> Link: https://patch.msgid.link/20260106162738.2605574-6-sjg@chromium.org Signed-off-by: Nathan Chancellor <nathan@kernel.org>
2026-02-03kbuild: Support a FIT_EXTRA_ARGS environment variableSimon Glass1-1/+1
In some cases it is useful to be able to pass additional flags to the make_fit.py script. For example, since ramdisks are typically large, passing -E to use external data can be helpful. Add a new FIT_EXTRA_ARGS variable for this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Nicolas Schier <nsc@kernel.org> Reviewed-by: Thomas Weißschuh <thomas.weissschuh@linutronix.de> Link: https://patch.msgid.link/20260106162738.2605574-5-sjg@chromium.org Signed-off-by: Nathan Chancellor <nathan@kernel.org>
2026-02-03scripts/make_fit: Move dtb processing into a functionSimon Glass1-23/+44
Since build_fit() is getting quite long, move the dtb processing into a separate function. Change the double quotes in the write() call to single, to match the rest of the script. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Nicolas Schier <nsc@kernel.org> Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://patch.msgid.link/20260106162738.2605574-4-sjg@chromium.org Signed-off-by: Nathan Chancellor <nathan@kernel.org>
2026-02-03scripts/make_fit: Support an initial ramdiskSimon Glass1-8/+44
FIT (Flat Image Tree) allows a ramdisk to be included in each configuration. Add support for this to the script. This feature is not available via 'make image.fit' since the ramdisk likely needs to be built separately anyway, e.g. using modules from the kernel build. Future work may provide support for doing that. Note that the uncompressed size is not correct when a ramdisk is used, since it is too expensive to decompress the ramdisk. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Nicolas Schier <nsc@kernel.org> Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://patch.msgid.link/20260106162738.2605574-3-sjg@chromium.org Signed-off-by: Nathan Chancellor <nathan@kernel.org>
2026-02-03scripts/make_fit: Speed up operationSimon Glass1-2/+4
The kernel is likely at least 16MB so we may as well use that as a step size when reallocating space for the FIT in memory. Pack the FIT at the end, so there is no wasted space. This reduces the time to pack by an order of magnitude, or so. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Nicolas Schier <nsc@kernel.org> Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Tested-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://patch.msgid.link/20260106162738.2605574-2-sjg@chromium.org Signed-off-by: Nathan Chancellor <nathan@kernel.org>
2026-02-03PCI: dwc: ep: Add comment explaining controller level PTM access in multi PF ↵Aksh Garg1-0/+12
setup PCIe r6.0, section 7.9.15 requires PTM capability in exactly one function to control all PTM-capable functions. This makes PTM registers controller level rather than per-function. Add a comment explaining why PTM capability registers are accessed using the standard DBI accessors instead of func_no indexed per-function accessors. Suggested-by: Niklas Cassel <cassel@kernel.org> Signed-off-by: Aksh Garg <a-garg7@ti.com> Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Niklas Cassel <cassel@kernel.org> Link: https://patch.msgid.link/20260130115516.515082-4-a-garg7@ti.com
2026-02-03PCI: dwc: ep: Add per-PF BAR and inbound ATU mapping supportAksh Garg2-37/+54
The commit 24ede430fa49 ("PCI: designware-ep: Add multiple PFs support for DWC") added support for multiple PFs in the DWC driver, but the implementation was incomplete. It did not properly support MSI/MSI-X, as well as BAR and inbound ATU mapping for multiple PFs. The MSI/MSI-X issue was later fixed by commit 47a062609a30 ("PCI: designware-ep: Modify MSI and MSIX CAP way of finding") by introducing a per-PF struct dw_pcie_ep_func. However, even with both commits, the multiple PF support in the driver remains broken because BAR configuration and ATU mappings are managed globally in struct dw_pcie_ep, meaning all PFs share the same BAR-to-ATU mapping table. This causes one PF's EPF to overwrite the address translation of another PF's EPF in the internal ATU region, creating conflicts when multiple physical functions attempt to configure their BARs independently. The commit cfbc98dbf44d ("PCI: dwc: ep: Support BAR subrange inbound mapping via Address Match Mode iATU") later introduced Address Match Mode support, which suffers from the same multi-PF conflict issue. Fix this by moving the required members from struct dw_pcie_ep to struct dw_pcie_ep_func, similar to what commit 47a062609a30 ("PCI: designware-ep: Modify MSI and MSIX CAP way of finding") did for MSI/MSI-X capability support, to allow proper multi-function endpoint operation, where each PF can configure its BARs and corresponding internal ATU region without interfering with other PFs. Fixes: 24ede430fa49 ("PCI: designware-ep: Add multiple PFs support for DWC") Fixes: cc839bef7727 ("PCI: dwc: ep: Support BAR subrange inbound mapping via Address Match Mode iATU") Signed-off-by: Aksh Garg <a-garg7@ti.com> Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Niklas Cassel <cassel@kernel.org> Link: https://patch.msgid.link/20260130115516.515082-3-a-garg7@ti.com
2026-02-03rust: kconfig: Don't require RUST_IS_AVAILABLE for rustc-optionMatthew Maurer1-2/+0
The final version of this macro does not fail in the absence of an invokable `$(RUSTC)`, so we don't need to be careful not to invoke it. Link: https://lore.kernel.org/all/CAGSQo01mQfcU1EiW53be1hcts0c1p-HQAab_HBk6VcVmhq3n2Q@mail.gmail.com/ Signed-off-by: Matthew Maurer <mmaurer@google.com> Link: https://patch.msgid.link/20250909-docrem-v1-1-dcc69059a5cb@google.com Signed-off-by: Nathan Chancellor <nathan@kernel.org>
2026-02-03MAINTAINERS: Add scripts/install.sh into Kbuild entryTiezhu Yang1-0/+1
The common installation code is in scripts/install.sh, add it into Kbuild entry to reflect the reality. With this updated entry, folks running get_maintainer.pl on patches that touch scripts/install.sh will know to send it to linux-kbuild@ as well. Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> Link: https://patch.msgid.link/20260120123730.30487-2-yangtiezhu@loongson.cn [nathan: Alphabetize entry] Signed-off-by: Nathan Chancellor <nathan@kernel.org>
2026-02-03modpost: Amend ppc64 save/restfpr symnames for -Os buildRené Rebe1-0/+4
Building a size optimized ppc64 kernel (-Os), gcc emits more FP save/restore symbols, that the linker generates on demand into the .sfpr section. Explicitly allow-list those in scripts/mod/modpost.c, too. They are needed for the amdgpu in-kernel floating point support. MODPOST Module.symvers ERROR: modpost: "_restfpr_20" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined! ERROR: modpost: "_restfpr_26" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined! ERROR: modpost: "_restfpr_22" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined! ERROR: modpost: "_savegpr1_27" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined! ERROR: modpost: "_savegpr1_25" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined! ERROR: modpost: "_restfpr_28" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined! ERROR: modpost: "_savegpr1_29" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined! ERROR: modpost: "_savefpr_20" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined! ERROR: modpost: "_savefpr_22" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined! ERROR: modpost: "_restfpr_15" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined! WARNING: modpost: suppressed 56 unresolved symbol warnings because there were too many) Signed-off-by: René Rebe <rene@exactco.de> Link: https://patch.msgid.link/20251123.131330.407910684435629198.rene@exactco.de Signed-off-by: Nathan Chancellor <nathan@kernel.org>
2026-02-03drm/amdgpu: Fix double deletion of validate_listHarish Kasiviswanathan1-7/+7
If amdgpu_amdkfd_gpuvm_free_memory_of_gpu() fails after kgd_mem is removed from validate_list, the mem handle still lingers in the KFD idr. This means when process is terminated, kfd_process_free_outstanding_kfd_bos() will call amdgpu_amdkfd_gpuvm_free_memory_of_gpu() again resulting in double deletion. To avoid this - (a) Check if list is empty before deleting it (b) Rearragne amdgpu_amdkfd_gpuvm_free_memory_of_gpu() such that it can be safely called again if it returns failure the first time. Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Reviewed-by: Philip Yang <Philip.Yang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit 6ba60345f45eaf7cb4f89105d26083a4b9fd1cba)
2026-02-03drm/amd/display: remove assert around dpp_base replacementMelissa Wen1-1/+0
There is nothing wrong if in_shaper_func type is DISTRIBUTED POINTS. Remove the assert placed for a TODO to avoid misinterpretations. Signed-off-by: Melissa Wen <mwen@igalia.com> Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit 1714dcc4c2c53e41190896eba263ed6328bcf415)
2026-02-03drm/amd/display: extend delta clamping logic to CM3 LUT helperMelissa Wen5-25/+49
Commit 27fc10d1095f ("drm/amd/display: Fix the delta clamping for shaper LUT") fixed banding when using plane shaper LUT in DCN10 CM helper. The problem is also present in DCN30 CM helper, fix banding by extending the same bug delta clamping fix to CM3. Signed-off-by: Melissa Wen <mwen@igalia.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit 0274a54897f356f9c78767c4a2a5863f7dde90c6)
2026-02-03drm/amd/display: fix wrong color value mapping on MCM shaper LUTMelissa Wen1-2/+5
Some shimmer/colorful points appears when using the steamOS color pipeline for HDR on gaming with DCN32. These points look like black values being wrongly mapped to red/blue/green values. It was caused because the number of hw points in regular LUTs and in a shaper LUT was treated as the same. DCN3+ regular LUTs have 257 bases and implicit deltas (i.e. HW calculates them), but shaper LUT is a special case: it has 256 bases and 256 deltas, as in DCN1-2 regular LUTs, and outputs 14-bit values. Fix that by setting by decreasing in 1 the number of HW points computed in the LUT segmentation so that shaper LUT (i.e. fixpoint == true) keeps the same DCN10 CM logic and regular LUTs go with `hw_points + 1`. CC: Krunoslav Kovac <Krunoslav.Kovac@amd.com> Fixes: 4d5fd3d08ea9 ("drm/amd/display: PQ tail accuracy") Signed-off-by: Melissa Wen <mwen@igalia.com> Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit 5006505b19a2119e71c008044d59f6d753c858b9)
2026-02-03Revert "drm/amd: Check if ASPM is enabled from PCIe subsystem"Bert Karwatzki1-3/+0
This reverts commit 7294863a6f01248d72b61d38478978d638641bee. This commit was erroneously applied again after commit 0ab5d711ec74 ("drm/amd: Refactor `amdgpu_aspm` to be evaluated per device") removed it, leading to very hard to debug crashes, when used with a system with two AMD GPUs of which only one supports ASPM. Link: https://lore.kernel.org/linux-acpi/20251006120944.7880-1-spasswolf@web.de/ Link: https://github.com/acpica/acpica/issues/1060 Fixes: 0ab5d711ec74 ("drm/amd: Refactor `amdgpu_aspm` to be evaluated per device") Signed-off-by: Bert Karwatzki <spasswolf@web.de> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Mario Limonciello (AMD) <superm1@kernel.org> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit 97a9689300eb2b393ba5efc17c8e5db835917080) Cc: stable@vger.kernel.org
2026-02-03drm/amd: Set minimum version for set_hw_resource_1 on gfx11 to 0x52Mario Limonciello1-1/+1
commit f81cd793119e ("drm/amd/amdgpu: Fix MES init sequence") caused a dependency on new enough MES firmware to use amdgpu. This was fixed on most gfx11 and gfx12 hardware with commit 0180e0a5dd5c ("drm/amdgpu/mes: add compatibility checks for set_hw_resource_1"), but this left out that GC 11.0.4 had breakage at MES 0x51. Bump the requirement to 0x52 instead. Reported-by: danijel@nausys.com Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/4576 Fixes: f81cd793119e ("drm/amd/amdgpu: Fix MES init sequence") Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit c2d2ccc85faf8cc6934d50c18e43097eb453ade2) Cc: stable@vger.kernel.org
2026-02-03drm/amd/pm: Remove buffer allocation in SMUv13.0.6Lijo Lazar1-14/+13
No longer required to allocate temporary buffer while fetching metrcis, instead, use metrics table cache data directly. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Asad Kamal <asad.kamal@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-02-03drm/amdgpu: Skip vcn poison irq release on VFLijo Lazar1-1/+3
VF doesn't enable VCN poison irq in VCNv2.5. Skip releasing it and avoid call trace during deinitialization. [ 71.913601] [drm] clean up the vf2pf work item [ 71.915088] ------------[ cut here ]------------ [ 71.915092] WARNING: CPU: 3 PID: 1079 at /tmp/amd.aFkFvSQl/amd/amdgpu/amdgpu_irq.c:641 amdgpu_irq_put+0xc6/0xe0 [amdgpu] [ 71.915355] Modules linked in: amdgpu(OE-) amddrm_ttm_helper(OE) amdttm(OE) amddrm_buddy(OE) amdxcp(OE) amddrm_exec(OE) amd_sched(OE) amdkcl(OE) drm_suballoc_helper drm_display_helper cec rc_core i2c_algo_bit video wmi binfmt_misc nls_iso8859_1 intel_rapl_msr intel_rapl_common input_leds joydev serio_raw mac_hid qemu_fw_cfg sch_fq_codel dm_multipath scsi_dh_rdac scsi_dh_emc scsi_dh_alua efi_pstore ip_tables x_tables autofs4 btrfs blake2b_generic raid10 raid456 async_raid6_recov async_memcpy async_pq async_xor async_tx xor raid6_pq libcrc32c raid1 raid0 hid_generic crct10dif_pclmul crc32_pclmul polyval_clmulni polyval_generic ghash_clmulni_intel usbhid 8139too sha256_ssse3 sha1_ssse3 hid psmouse bochs i2c_i801 ahci drm_vram_helper libahci i2c_smbus lpc_ich drm_ttm_helper 8139cp mii ttm aesni_intel crypto_simd cryptd [ 71.915484] CPU: 3 PID: 1079 Comm: rmmod Tainted: G OE 6.8.0-87-generic #88~22.04.1-Ubuntu [ 71.915489] Hardware name: Red Hat KVM/RHEL, BIOS 1.16.3-2.el9_5.1 04/01/2014 [ 71.915492] RIP: 0010:amdgpu_irq_put+0xc6/0xe0 [amdgpu] [ 71.915768] Code: 75 84 b8 ea ff ff ff eb d4 44 89 ea 48 89 de 4c 89 e7 e8 fd fc ff ff 5b 41 5c 41 5d 41 5e 5d 31 d2 31 f6 31 ff e9 55 30 3b c7 <0f> 0b eb d4 b8 fe ff ff ff eb a8 e9 b7 3b 8a 00 66 2e 0f 1f 84 00 [ 71.915771] RSP: 0018:ffffcf0800eafa30 EFLAGS: 00010246 [ 71.915775] RAX: 0000000000000000 RBX: ffff891bda4b0668 RCX: 0000000000000000 [ 71.915777] RDX: 0000000000000000 RSI: 0000000000000000 RDI: 0000000000000000 [ 71.915779] RBP: ffffcf0800eafa50 R08: 0000000000000000 R09: 0000000000000000 [ 71.915781] R10: 0000000000000000 R11: 0000000000000000 R12: ffff891bda480000 [ 71.915782] R13: 0000000000000000 R14: 0000000000000001 R15: 0000000000000000 [ 71.915792] FS: 000070cff87c4c40(0000) GS:ffff893abfb80000(0000) knlGS:0000000000000000 [ 71.915795] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 [ 71.915797] CR2: 00005fa13073e478 CR3: 000000010d634006 CR4: 0000000000770ef0 [ 71.915800] PKRU: 55555554 [ 71.915802] Call Trace: [ 71.915805] <TASK> [ 71.915809] vcn_v2_5_hw_fini+0x19e/0x1e0 [amdgpu] Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Mangesh Gadre <Mangesh.Gadre@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-02-03drm/amd/display: remove assert around dpp_base replacementMelissa Wen1-1/+0
There is nothing wrong if in_shaper_func type is DISTRIBUTED POINTS. Remove the assert placed for a TODO to avoid misinterpretations. Signed-off-by: Melissa Wen <mwen@igalia.com> Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-02-03drm/amd/display: extend delta clamping logic to CM3 LUT helperMelissa Wen5-25/+49
Commit 27fc10d1095f ("drm/amd/display: Fix the delta clamping for shaper LUT") fixed banding when using plane shaper LUT in DCN10 CM helper. The problem is also present in DCN30 CM helper, fix banding by extending the same bug delta clamping fix to CM3. Signed-off-by: Melissa Wen <mwen@igalia.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-02-03drm/amd/display: fix wrong color value mapping on MCM shaper LUTMelissa Wen1-2/+5
Some shimmer/colorful points appears when using the steamOS color pipeline for HDR on gaming with DCN32. These points look like black values being wrongly mapped to red/blue/green values. It was caused because the number of hw points in regular LUTs and in a shaper LUT was treated as the same. DCN3+ regular LUTs have 257 bases and implicit deltas (i.e. HW calculates them), but shaper LUT is a special case: it has 256 bases and 256 deltas, as in DCN1-2 regular LUTs, and outputs 14-bit values. Fix that by setting by decreasing in 1 the number of HW points computed in the LUT segmentation so that shaper LUT (i.e. fixpoint == true) keeps the same DCN10 CM logic and regular LUTs go with `hw_points + 1`. CC: Krunoslav Kovac <Krunoslav.Kovac@amd.com> Fixes: 4d5fd3d08ea9 ("drm/amd/display: PQ tail accuracy") Signed-off-by: Melissa Wen <mwen@igalia.com> Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-02-03drm/amdgpu: Fix double deletion of validate_listHarish Kasiviswanathan1-7/+7
If amdgpu_amdkfd_gpuvm_free_memory_of_gpu() fails after kgd_mem is removed from validate_list, the mem handle still lingers in the KFD idr. This means when process is terminated, kfd_process_free_outstanding_kfd_bos() will call amdgpu_amdkfd_gpuvm_free_memory_of_gpu() again resulting in double deletion. To avoid this - (a) Check if list is empty before deleting it (b) Rearragne amdgpu_amdkfd_gpuvm_free_memory_of_gpu() such that it can be safely called again if it returns failure the first time. Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Reviewed-by: Philip Yang <Philip.Yang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-02-03drm/amdgpu: Ignored various return codeAndrew Martin3-11/+14
The return code of a non void function should not be ignored. In cases where we do not care, the code needs to suppress it. Signed-off-by: Andrew Martin <andrew.martin@amd.com> Reviewed-by: Felix Kuehling <felix.kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-02-03drm/amdgpu/psp_v15_0_8: Add get ras capabilityJinzhou Su1-0/+21
Add get ras capability for psp 15.0.8. v2:Remove APU type check and IP version check. Signed-off-by: Jinzhou Su <jinzhou.su@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-02-03drm/amd/pm: Add default feature number definitionLijo Lazar7-8/+11
The number of default features could be different from the actual width of the bitmap. Use a different definition for it. Also increase the max width of bitmap to 128. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Asad Kamal <asad.kamal@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-02-03drm/amd/pm: Change get_enabled_mask signatureLijo Lazar21-117/+123
Use smu_feature_bits instead of uint64_t pointer and operate on feature bits. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Asad Kamal <asad.kamal@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-02-03drm/amd/pm: Use feature bits data structureLijo Lazar16-159/+237
Feature bits are not necessarily restricted to 64-bits. Use smu_feature_bits data structure to represent feature mask for checking DPM status. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Asad Kamal <asad.kamal@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-02-03Revert "drm/amd: Check if ASPM is enabled from PCIe subsystem"Bert Karwatzki1-3/+0
This reverts commit 7294863a6f01248d72b61d38478978d638641bee. This commit was erroneously applied again after commit 0ab5d711ec74 ("drm/amd: Refactor `amdgpu_aspm` to be evaluated per device") removed it, leading to very hard to debug crashes, when used with a system with two AMD GPUs of which only one supports ASPM. Link: https://lore.kernel.org/linux-acpi/20251006120944.7880-1-spasswolf@web.de/ Link: https://github.com/acpica/acpica/issues/1060 Fixes: 0ab5d711ec74 ("drm/amd: Refactor `amdgpu_aspm` to be evaluated per device") Signed-off-by: Bert Karwatzki <spasswolf@web.de> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Mario Limonciello (AMD) <superm1@kernel.org> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-02-03drm/amdgpu: statistic xgmi training error countStanley.Yang1-1/+1
Report xgmi training error uncorrectable error count. Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>